Mercurial > hg > truffle
annotate src/cpu/ppc/vm/register_ppc.hpp @ 20590:c47fcf523fff
8042428: CompileQueue::free_all() code is incorrect
Summary: Free task after getting next pointer of freelist.
Reviewed-by: kvn, adlertz
author | anoll |
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date | Tue, 06 May 2014 09:52:38 +0200 |
parents | fd1b9f02cc91 |
children | 92aa6797d639 |
rev | line source |
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1 /* |
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2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. |
17804 | 3 * Copyright 2012, 2014 SAP AG. All rights reserved. |
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4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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5 * |
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6 * This code is free software; you can redistribute it and/or modify it |
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7 * under the terms of the GNU General Public License version 2 only, as |
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8 * published by the Free Software Foundation. |
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9 * |
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10 * This code is distributed in the hope that it will be useful, but WITHOUT |
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11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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13 * version 2 for more details (a copy is included in the LICENSE file that |
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14 * accompanied this code). |
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15 * |
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16 * You should have received a copy of the GNU General Public License version |
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17 * 2 along with this work; if not, write to the Free Software Foundation, |
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18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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19 * |
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20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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21 * or visit www.oracle.com if you need additional information or have any |
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22 * questions. |
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23 * |
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24 */ |
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25 |
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26 #ifndef CPU_PPC_VM_REGISTER_PPC_HPP |
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27 #define CPU_PPC_VM_REGISTER_PPC_HPP |
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28 |
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29 #include "asm/register.hpp" |
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30 #include "vm_version_ppc.hpp" |
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31 |
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32 // forward declaration |
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33 class Address; |
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34 class VMRegImpl; |
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35 typedef VMRegImpl* VMReg; |
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36 |
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37 // PPC64 registers |
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38 // |
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39 // See "64-bit PowerPC ELF ABI Supplement 1.7", IBM Corp. (2003-10-29). |
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40 // (http://math-atlas.sourceforge.net/devel/assembly/PPC-elf64abi-1.7.pdf) |
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41 // |
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42 // r0 Register used in function prologs (volatile) |
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43 // r1 Stack pointer (nonvolatile) |
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44 // r2 TOC pointer (volatile) |
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45 // r3 Parameter and return value (volatile) |
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46 // r4-r10 Function parameters (volatile) |
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47 // r11 Register used in calls by pointer and as an environment pointer for languages which require one (volatile) |
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48 // r12 Register used for exception handling and glink code (volatile) |
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49 // r13 Reserved for use as system thread ID |
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50 // r14-r31 Local variables (nonvolatile) |
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51 // |
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52 // f0 Scratch register (volatile) |
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53 // f1-f4 Floating point parameters and return value (volatile) |
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54 // f5-f13 Floating point parameters (volatile) |
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55 // f14-f31 Floating point values (nonvolatile) |
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56 // |
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57 // LR Link register for return address (volatile) |
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58 // CTR Loop counter (volatile) |
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59 // XER Fixed point exception register (volatile) |
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60 // FPSCR Floating point status and control register (volatile) |
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61 // |
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62 // CR0-CR1 Condition code fields (volatile) |
14445 | 63 // CR2-CR4 Condition code fields (nonvolatile) |
64 // CR5-CR7 Condition code fields (volatile) | |
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65 // |
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66 // ---------------------------------------------- |
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67 // On processors with the VMX feature: |
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68 // v0-v1 Volatile scratch registers |
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69 // v2-v13 Volatile vector parameters registers |
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70 // v14-v19 Volatile scratch registers |
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71 // v20-v31 Non-volatile registers |
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72 // vrsave Non-volatile 32-bit register |
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73 |
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74 |
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75 // Use Register as shortcut |
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76 class RegisterImpl; |
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77 typedef RegisterImpl* Register; |
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78 |
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79 inline Register as_Register(int encoding) { |
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80 assert(encoding >= 0 && encoding < 32, "bad register encoding"); |
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81 return (Register)(intptr_t)encoding; |
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82 } |
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83 |
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84 // The implementation of integer registers for the Power architecture |
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85 class RegisterImpl: public AbstractRegisterImpl { |
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86 public: |
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87 enum { |
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88 number_of_registers = 32 |
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89 }; |
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90 |
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91 // general construction |
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92 inline friend Register as_Register(int encoding); |
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93 |
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94 // accessors |
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95 int encoding() const { assert(is_valid(), "invalid register"); return value(); } |
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96 VMReg as_VMReg(); |
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97 Register successor() const { return as_Register(encoding() + 1); } |
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98 |
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99 // testers |
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100 bool is_valid() const { return ( 0 <= (value()&0x7F) && (value()&0x7F) < number_of_registers); } |
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101 bool is_volatile() const { return ( 0 <= (value()&0x7F) && (value()&0x7F) <= 13 ); } |
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102 bool is_nonvolatile() const { return (14 <= (value()&0x7F) && (value()&0x7F) <= 31 ); } |
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103 |
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104 const char* name() const; |
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105 }; |
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106 |
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107 // The integer registers of the PPC architecture |
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108 CONSTANT_REGISTER_DECLARATION(Register, noreg, (-1)); |
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109 |
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110 CONSTANT_REGISTER_DECLARATION(Register, R0, (0)); |
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111 CONSTANT_REGISTER_DECLARATION(Register, R1, (1)); |
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112 CONSTANT_REGISTER_DECLARATION(Register, R2, (2)); |
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113 CONSTANT_REGISTER_DECLARATION(Register, R3, (3)); |
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114 CONSTANT_REGISTER_DECLARATION(Register, R4, (4)); |
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115 CONSTANT_REGISTER_DECLARATION(Register, R5, (5)); |
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116 CONSTANT_REGISTER_DECLARATION(Register, R6, (6)); |
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117 CONSTANT_REGISTER_DECLARATION(Register, R7, (7)); |
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118 CONSTANT_REGISTER_DECLARATION(Register, R8, (8)); |
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119 CONSTANT_REGISTER_DECLARATION(Register, R9, (9)); |
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120 CONSTANT_REGISTER_DECLARATION(Register, R10, (10)); |
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121 CONSTANT_REGISTER_DECLARATION(Register, R11, (11)); |
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122 CONSTANT_REGISTER_DECLARATION(Register, R12, (12)); |
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123 CONSTANT_REGISTER_DECLARATION(Register, R13, (13)); |
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124 CONSTANT_REGISTER_DECLARATION(Register, R14, (14)); |
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125 CONSTANT_REGISTER_DECLARATION(Register, R15, (15)); |
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126 CONSTANT_REGISTER_DECLARATION(Register, R16, (16)); |
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127 CONSTANT_REGISTER_DECLARATION(Register, R17, (17)); |
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128 CONSTANT_REGISTER_DECLARATION(Register, R18, (18)); |
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129 CONSTANT_REGISTER_DECLARATION(Register, R19, (19)); |
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130 CONSTANT_REGISTER_DECLARATION(Register, R20, (20)); |
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131 CONSTANT_REGISTER_DECLARATION(Register, R21, (21)); |
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132 CONSTANT_REGISTER_DECLARATION(Register, R22, (22)); |
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133 CONSTANT_REGISTER_DECLARATION(Register, R23, (23)); |
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134 CONSTANT_REGISTER_DECLARATION(Register, R24, (24)); |
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135 CONSTANT_REGISTER_DECLARATION(Register, R25, (25)); |
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136 CONSTANT_REGISTER_DECLARATION(Register, R26, (26)); |
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137 CONSTANT_REGISTER_DECLARATION(Register, R27, (27)); |
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138 CONSTANT_REGISTER_DECLARATION(Register, R28, (28)); |
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139 CONSTANT_REGISTER_DECLARATION(Register, R29, (29)); |
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140 CONSTANT_REGISTER_DECLARATION(Register, R30, (30)); |
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141 CONSTANT_REGISTER_DECLARATION(Register, R31, (31)); |
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142 |
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143 |
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144 // |
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145 // Because Power has many registers, #define'ing values for them is |
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146 // beneficial in code size and is worth the cost of some of the |
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147 // dangers of defines. If a particular file has a problem with these |
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148 // defines then it's possible to turn them off in that file by |
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149 // defining DONT_USE_REGISTER_DEFINES. Register_definition_ppc.cpp |
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150 // does that so that it's able to provide real definitions of these |
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151 // registers for use in debuggers and such. |
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152 // |
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153 |
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154 #ifndef DONT_USE_REGISTER_DEFINES |
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155 #define noreg ((Register)(noreg_RegisterEnumValue)) |
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156 |
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157 #define R0 ((Register)(R0_RegisterEnumValue)) |
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158 #define R1 ((Register)(R1_RegisterEnumValue)) |
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159 #define R2 ((Register)(R2_RegisterEnumValue)) |
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160 #define R3 ((Register)(R3_RegisterEnumValue)) |
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161 #define R4 ((Register)(R4_RegisterEnumValue)) |
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162 #define R5 ((Register)(R5_RegisterEnumValue)) |
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163 #define R6 ((Register)(R6_RegisterEnumValue)) |
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164 #define R7 ((Register)(R7_RegisterEnumValue)) |
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165 #define R8 ((Register)(R8_RegisterEnumValue)) |
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166 #define R9 ((Register)(R9_RegisterEnumValue)) |
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167 #define R10 ((Register)(R10_RegisterEnumValue)) |
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168 #define R11 ((Register)(R11_RegisterEnumValue)) |
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169 #define R12 ((Register)(R12_RegisterEnumValue)) |
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170 #define R13 ((Register)(R13_RegisterEnumValue)) |
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171 #define R14 ((Register)(R14_RegisterEnumValue)) |
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172 #define R15 ((Register)(R15_RegisterEnumValue)) |
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173 #define R16 ((Register)(R16_RegisterEnumValue)) |
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174 #define R17 ((Register)(R17_RegisterEnumValue)) |
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175 #define R18 ((Register)(R18_RegisterEnumValue)) |
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176 #define R19 ((Register)(R19_RegisterEnumValue)) |
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177 #define R20 ((Register)(R20_RegisterEnumValue)) |
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178 #define R21 ((Register)(R21_RegisterEnumValue)) |
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179 #define R22 ((Register)(R22_RegisterEnumValue)) |
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180 #define R23 ((Register)(R23_RegisterEnumValue)) |
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181 #define R24 ((Register)(R24_RegisterEnumValue)) |
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182 #define R25 ((Register)(R25_RegisterEnumValue)) |
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183 #define R26 ((Register)(R26_RegisterEnumValue)) |
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184 #define R27 ((Register)(R27_RegisterEnumValue)) |
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185 #define R28 ((Register)(R28_RegisterEnumValue)) |
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186 #define R29 ((Register)(R29_RegisterEnumValue)) |
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187 #define R30 ((Register)(R30_RegisterEnumValue)) |
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188 #define R31 ((Register)(R31_RegisterEnumValue)) |
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189 #endif |
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190 |
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191 // Use ConditionRegister as shortcut |
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192 class ConditionRegisterImpl; |
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193 typedef ConditionRegisterImpl* ConditionRegister; |
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194 |
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195 inline ConditionRegister as_ConditionRegister(int encoding) { |
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196 assert(encoding >= 0 && encoding < 8, "bad condition register encoding"); |
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197 return (ConditionRegister)(intptr_t)encoding; |
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198 } |
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199 |
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200 // The implementation of condition register(s) for the PPC architecture |
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201 class ConditionRegisterImpl: public AbstractRegisterImpl { |
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202 public: |
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203 enum { |
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204 number_of_registers = 8 |
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205 }; |
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206 |
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207 // construction. |
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208 inline friend ConditionRegister as_ConditionRegister(int encoding); |
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209 |
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210 // accessors |
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211 int encoding() const { assert(is_valid(), "invalid register"); return value(); } |
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212 VMReg as_VMReg(); |
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213 |
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214 // testers |
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215 bool is_valid() const { return (0 <= value() && value() < number_of_registers); } |
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216 bool is_nonvolatile() const { return (2 <= (value()&0x7F) && (value()&0x7F) <= 4 ); } |
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217 |
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218 const char* name() const; |
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219 }; |
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220 |
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221 // The (parts of the) condition register(s) of the PPC architecture |
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222 // sys/ioctl.h on AIX defines CR0-CR3, so I name these CCR. |
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223 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR0, (0)); |
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224 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR1, (1)); |
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225 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR2, (2)); |
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226 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR3, (3)); |
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227 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR4, (4)); |
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228 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR5, (5)); |
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229 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR6, (6)); |
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230 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR7, (7)); |
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231 |
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232 #ifndef DONT_USE_REGISTER_DEFINES |
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233 |
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234 #define CCR0 ((ConditionRegister)(CCR0_ConditionRegisterEnumValue)) |
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235 #define CCR1 ((ConditionRegister)(CCR1_ConditionRegisterEnumValue)) |
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236 #define CCR2 ((ConditionRegister)(CCR2_ConditionRegisterEnumValue)) |
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237 #define CCR3 ((ConditionRegister)(CCR3_ConditionRegisterEnumValue)) |
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238 #define CCR4 ((ConditionRegister)(CCR4_ConditionRegisterEnumValue)) |
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239 #define CCR5 ((ConditionRegister)(CCR5_ConditionRegisterEnumValue)) |
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240 #define CCR6 ((ConditionRegister)(CCR6_ConditionRegisterEnumValue)) |
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241 #define CCR7 ((ConditionRegister)(CCR7_ConditionRegisterEnumValue)) |
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242 |
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243 #endif // DONT_USE_REGISTER_DEFINES |
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244 |
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245 |
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246 // Use FloatRegister as shortcut |
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247 class FloatRegisterImpl; |
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248 typedef FloatRegisterImpl* FloatRegister; |
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249 |
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250 inline FloatRegister as_FloatRegister(int encoding) { |
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251 assert(encoding >= 0 && encoding < 32, "bad float register encoding"); |
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252 return (FloatRegister)(intptr_t)encoding; |
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253 } |
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254 |
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255 // The implementation of float registers for the PPC architecture |
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256 class FloatRegisterImpl: public AbstractRegisterImpl { |
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257 public: |
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258 enum { |
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259 number_of_registers = 32 |
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260 }; |
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261 |
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262 // construction |
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263 inline friend FloatRegister as_FloatRegister(int encoding); |
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264 |
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265 // accessors |
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266 int encoding() const { assert(is_valid(), "invalid register"); return value(); } |
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267 VMReg as_VMReg(); |
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268 FloatRegister successor() const { return as_FloatRegister(encoding() + 1); } |
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269 |
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270 // testers |
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271 bool is_valid() const { return (0 <= value() && value() < number_of_registers); } |
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272 |
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273 const char* name() const; |
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274 }; |
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275 |
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276 // The float registers of the PPC architecture |
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277 CONSTANT_REGISTER_DECLARATION(FloatRegister, fnoreg, (-1)); |
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278 |
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279 CONSTANT_REGISTER_DECLARATION(FloatRegister, F0, ( 0)); |
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280 CONSTANT_REGISTER_DECLARATION(FloatRegister, F1, ( 1)); |
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281 CONSTANT_REGISTER_DECLARATION(FloatRegister, F2, ( 2)); |
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282 CONSTANT_REGISTER_DECLARATION(FloatRegister, F3, ( 3)); |
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283 CONSTANT_REGISTER_DECLARATION(FloatRegister, F4, ( 4)); |
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284 CONSTANT_REGISTER_DECLARATION(FloatRegister, F5, ( 5)); |
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285 CONSTANT_REGISTER_DECLARATION(FloatRegister, F6, ( 6)); |
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286 CONSTANT_REGISTER_DECLARATION(FloatRegister, F7, ( 7)); |
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287 CONSTANT_REGISTER_DECLARATION(FloatRegister, F8, ( 8)); |
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288 CONSTANT_REGISTER_DECLARATION(FloatRegister, F9, ( 9)); |
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289 CONSTANT_REGISTER_DECLARATION(FloatRegister, F10, (10)); |
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290 CONSTANT_REGISTER_DECLARATION(FloatRegister, F11, (11)); |
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291 CONSTANT_REGISTER_DECLARATION(FloatRegister, F12, (12)); |
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292 CONSTANT_REGISTER_DECLARATION(FloatRegister, F13, (13)); |
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293 CONSTANT_REGISTER_DECLARATION(FloatRegister, F14, (14)); |
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294 CONSTANT_REGISTER_DECLARATION(FloatRegister, F15, (15)); |
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295 CONSTANT_REGISTER_DECLARATION(FloatRegister, F16, (16)); |
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296 CONSTANT_REGISTER_DECLARATION(FloatRegister, F17, (17)); |
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297 CONSTANT_REGISTER_DECLARATION(FloatRegister, F18, (18)); |
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298 CONSTANT_REGISTER_DECLARATION(FloatRegister, F19, (19)); |
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299 CONSTANT_REGISTER_DECLARATION(FloatRegister, F20, (20)); |
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300 CONSTANT_REGISTER_DECLARATION(FloatRegister, F21, (21)); |
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301 CONSTANT_REGISTER_DECLARATION(FloatRegister, F22, (22)); |
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302 CONSTANT_REGISTER_DECLARATION(FloatRegister, F23, (23)); |
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303 CONSTANT_REGISTER_DECLARATION(FloatRegister, F24, (24)); |
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304 CONSTANT_REGISTER_DECLARATION(FloatRegister, F25, (25)); |
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305 CONSTANT_REGISTER_DECLARATION(FloatRegister, F26, (26)); |
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306 CONSTANT_REGISTER_DECLARATION(FloatRegister, F27, (27)); |
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307 CONSTANT_REGISTER_DECLARATION(FloatRegister, F28, (28)); |
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308 CONSTANT_REGISTER_DECLARATION(FloatRegister, F29, (29)); |
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309 CONSTANT_REGISTER_DECLARATION(FloatRegister, F30, (30)); |
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310 CONSTANT_REGISTER_DECLARATION(FloatRegister, F31, (31)); |
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311 |
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312 #ifndef DONT_USE_REGISTER_DEFINES |
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313 #define fnoreg ((FloatRegister)(fnoreg_FloatRegisterEnumValue)) |
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314 #define F0 ((FloatRegister)( F0_FloatRegisterEnumValue)) |
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315 #define F1 ((FloatRegister)( F1_FloatRegisterEnumValue)) |
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316 #define F2 ((FloatRegister)( F2_FloatRegisterEnumValue)) |
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317 #define F3 ((FloatRegister)( F3_FloatRegisterEnumValue)) |
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318 #define F4 ((FloatRegister)( F4_FloatRegisterEnumValue)) |
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319 #define F5 ((FloatRegister)( F5_FloatRegisterEnumValue)) |
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320 #define F6 ((FloatRegister)( F6_FloatRegisterEnumValue)) |
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321 #define F7 ((FloatRegister)( F7_FloatRegisterEnumValue)) |
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322 #define F8 ((FloatRegister)( F8_FloatRegisterEnumValue)) |
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323 #define F9 ((FloatRegister)( F9_FloatRegisterEnumValue)) |
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324 #define F10 ((FloatRegister)( F10_FloatRegisterEnumValue)) |
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325 #define F11 ((FloatRegister)( F11_FloatRegisterEnumValue)) |
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326 #define F12 ((FloatRegister)( F12_FloatRegisterEnumValue)) |
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327 #define F13 ((FloatRegister)( F13_FloatRegisterEnumValue)) |
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328 #define F14 ((FloatRegister)( F14_FloatRegisterEnumValue)) |
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329 #define F15 ((FloatRegister)( F15_FloatRegisterEnumValue)) |
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330 #define F16 ((FloatRegister)( F16_FloatRegisterEnumValue)) |
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331 #define F17 ((FloatRegister)( F17_FloatRegisterEnumValue)) |
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332 #define F18 ((FloatRegister)( F18_FloatRegisterEnumValue)) |
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333 #define F19 ((FloatRegister)( F19_FloatRegisterEnumValue)) |
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334 #define F20 ((FloatRegister)( F20_FloatRegisterEnumValue)) |
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335 #define F21 ((FloatRegister)( F21_FloatRegisterEnumValue)) |
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336 #define F22 ((FloatRegister)( F22_FloatRegisterEnumValue)) |
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337 #define F23 ((FloatRegister)( F23_FloatRegisterEnumValue)) |
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338 #define F24 ((FloatRegister)( F24_FloatRegisterEnumValue)) |
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339 #define F25 ((FloatRegister)( F25_FloatRegisterEnumValue)) |
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340 #define F26 ((FloatRegister)( F26_FloatRegisterEnumValue)) |
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341 #define F27 ((FloatRegister)( F27_FloatRegisterEnumValue)) |
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342 #define F28 ((FloatRegister)( F28_FloatRegisterEnumValue)) |
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343 #define F29 ((FloatRegister)( F29_FloatRegisterEnumValue)) |
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344 #define F30 ((FloatRegister)( F30_FloatRegisterEnumValue)) |
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345 #define F31 ((FloatRegister)( F31_FloatRegisterEnumValue)) |
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346 #endif // DONT_USE_REGISTER_DEFINES |
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347 |
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348 // Use SpecialRegister as shortcut |
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349 class SpecialRegisterImpl; |
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350 typedef SpecialRegisterImpl* SpecialRegister; |
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351 |
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352 inline SpecialRegister as_SpecialRegister(int encoding) { |
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353 return (SpecialRegister)(intptr_t)encoding; |
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354 } |
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355 |
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356 // The implementation of special registers for the Power architecture (LR, CTR and friends) |
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357 class SpecialRegisterImpl: public AbstractRegisterImpl { |
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358 public: |
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359 enum { |
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360 number_of_registers = 6 |
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361 }; |
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362 |
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363 // construction |
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364 inline friend SpecialRegister as_SpecialRegister(int encoding); |
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365 |
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366 // accessors |
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367 int encoding() const { assert(is_valid(), "invalid register"); return value(); } |
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368 VMReg as_VMReg(); |
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369 |
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370 // testers |
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371 bool is_valid() const { return 0 <= value() && value() < number_of_registers; } |
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372 |
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373 const char* name() const; |
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374 }; |
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375 |
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376 // The special registers of the PPC architecture |
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377 CONSTANT_REGISTER_DECLARATION(SpecialRegister, SR_XER, (0)); |
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378 CONSTANT_REGISTER_DECLARATION(SpecialRegister, SR_LR, (1)); |
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379 CONSTANT_REGISTER_DECLARATION(SpecialRegister, SR_CTR, (2)); |
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380 CONSTANT_REGISTER_DECLARATION(SpecialRegister, SR_VRSAVE, (3)); |
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381 CONSTANT_REGISTER_DECLARATION(SpecialRegister, SR_SPEFSCR, (4)); |
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382 CONSTANT_REGISTER_DECLARATION(SpecialRegister, SR_PPR, (5)); |
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383 |
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384 #ifndef DONT_USE_REGISTER_DEFINES |
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385 #define SR_XER ((SpecialRegister)(SR_XER_SpecialRegisterEnumValue)) |
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386 #define SR_LR ((SpecialRegister)(SR_LR_SpecialRegisterEnumValue)) |
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387 #define SR_CTR ((SpecialRegister)(SR_CTR_SpecialRegisterEnumValue)) |
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388 #define SR_VRSAVE ((SpecialRegister)(SR_VRSAVE_SpecialRegisterEnumValue)) |
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389 #define SR_SPEFSCR ((SpecialRegister)(SR_SPEFSCR_SpecialRegisterEnumValue)) |
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390 #define SR_PPR ((SpecialRegister)(SR_PPR_SpecialRegisterEnumValue)) |
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391 #endif // DONT_USE_REGISTER_DEFINES |
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|
392 |
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|
393 |
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394 // Use VectorRegister as shortcut |
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395 class VectorRegisterImpl; |
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396 typedef VectorRegisterImpl* VectorRegister; |
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397 |
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398 inline VectorRegister as_VectorRegister(int encoding) { |
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399 return (VectorRegister)(intptr_t)encoding; |
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400 } |
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|
401 |
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402 // The implementation of vector registers for the Power architecture |
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403 class VectorRegisterImpl: public AbstractRegisterImpl { |
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404 public: |
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405 enum { |
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406 number_of_registers = 32 |
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407 }; |
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|
408 |
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409 // construction |
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410 inline friend VectorRegister as_VectorRegister(int encoding); |
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|
411 |
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412 // accessors |
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413 int encoding() const { assert(is_valid(), "invalid register"); return value(); } |
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414 |
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415 // testers |
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416 bool is_valid() const { return 0 <= value() && value() < number_of_registers; } |
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417 |
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418 const char* name() const; |
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419 }; |
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|
420 |
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421 // The Vector registers of the Power architecture |
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|
422 |
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423 CONSTANT_REGISTER_DECLARATION(VectorRegister, vnoreg, (-1)); |
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424 |
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425 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR0, ( 0)); |
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426 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR1, ( 1)); |
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427 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR2, ( 2)); |
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428 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR3, ( 3)); |
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429 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR4, ( 4)); |
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430 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR5, ( 5)); |
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431 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR6, ( 6)); |
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432 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR7, ( 7)); |
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433 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR8, ( 8)); |
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434 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR9, ( 9)); |
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435 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR10, (10)); |
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436 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR11, (11)); |
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437 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR12, (12)); |
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438 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR13, (13)); |
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439 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR14, (14)); |
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440 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR15, (15)); |
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441 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR16, (16)); |
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442 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR17, (17)); |
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443 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR18, (18)); |
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444 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR19, (19)); |
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445 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR20, (20)); |
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446 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR21, (21)); |
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447 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR22, (22)); |
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448 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR23, (23)); |
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449 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR24, (24)); |
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450 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR25, (25)); |
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451 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR26, (26)); |
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452 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR27, (27)); |
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453 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR28, (28)); |
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454 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR29, (29)); |
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455 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR30, (30)); |
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456 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR31, (31)); |
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457 |
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458 #ifndef DONT_USE_REGISTER_DEFINES |
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459 #define vnoreg ((VectorRegister)(vnoreg_VectorRegisterEnumValue)) |
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460 #define VR0 ((VectorRegister)( VR0_VectorRegisterEnumValue)) |
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461 #define VR1 ((VectorRegister)( VR1_VectorRegisterEnumValue)) |
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462 #define VR2 ((VectorRegister)( VR2_VectorRegisterEnumValue)) |
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463 #define VR3 ((VectorRegister)( VR3_VectorRegisterEnumValue)) |
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464 #define VR4 ((VectorRegister)( VR4_VectorRegisterEnumValue)) |
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465 #define VR5 ((VectorRegister)( VR5_VectorRegisterEnumValue)) |
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466 #define VR6 ((VectorRegister)( VR6_VectorRegisterEnumValue)) |
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467 #define VR7 ((VectorRegister)( VR7_VectorRegisterEnumValue)) |
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468 #define VR8 ((VectorRegister)( VR8_VectorRegisterEnumValue)) |
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469 #define VR9 ((VectorRegister)( VR9_VectorRegisterEnumValue)) |
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470 #define VR10 ((VectorRegister)( VR10_VectorRegisterEnumValue)) |
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471 #define VR11 ((VectorRegister)( VR11_VectorRegisterEnumValue)) |
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472 #define VR12 ((VectorRegister)( VR12_VectorRegisterEnumValue)) |
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473 #define VR13 ((VectorRegister)( VR13_VectorRegisterEnumValue)) |
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474 #define VR14 ((VectorRegister)( VR14_VectorRegisterEnumValue)) |
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475 #define VR15 ((VectorRegister)( VR15_VectorRegisterEnumValue)) |
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476 #define VR16 ((VectorRegister)( VR16_VectorRegisterEnumValue)) |
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477 #define VR17 ((VectorRegister)( VR17_VectorRegisterEnumValue)) |
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478 #define VR18 ((VectorRegister)( VR18_VectorRegisterEnumValue)) |
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479 #define VR19 ((VectorRegister)( VR19_VectorRegisterEnumValue)) |
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480 #define VR20 ((VectorRegister)( VR20_VectorRegisterEnumValue)) |
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481 #define VR21 ((VectorRegister)( VR21_VectorRegisterEnumValue)) |
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482 #define VR22 ((VectorRegister)( VR22_VectorRegisterEnumValue)) |
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483 #define VR23 ((VectorRegister)( VR23_VectorRegisterEnumValue)) |
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484 #define VR24 ((VectorRegister)( VR24_VectorRegisterEnumValue)) |
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485 #define VR25 ((VectorRegister)( VR25_VectorRegisterEnumValue)) |
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486 #define VR26 ((VectorRegister)( VR26_VectorRegisterEnumValue)) |
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487 #define VR27 ((VectorRegister)( VR27_VectorRegisterEnumValue)) |
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488 #define VR28 ((VectorRegister)( VR28_VectorRegisterEnumValue)) |
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489 #define VR29 ((VectorRegister)( VR29_VectorRegisterEnumValue)) |
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490 #define VR30 ((VectorRegister)( VR30_VectorRegisterEnumValue)) |
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491 #define VR31 ((VectorRegister)( VR31_VectorRegisterEnumValue)) |
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492 #endif // DONT_USE_REGISTER_DEFINES |
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|
493 |
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|
494 |
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495 // Maximum number of incoming arguments that can be passed in i registers. |
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496 const int PPC_ARGS_IN_REGS_NUM = 8; |
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|
497 |
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|
498 |
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499 // Need to know the total number of registers of all sorts for SharedInfo. |
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500 // Define a class that exports it. |
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501 class ConcreteRegisterImpl : public AbstractRegisterImpl { |
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502 public: |
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503 enum { |
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504 // This number must be large enough to cover REG_COUNT (defined by c2) registers. |
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505 // There is no requirement that any ordering here matches any ordering c2 gives |
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506 // it's optoregs. |
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507 number_of_registers = |
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508 ( RegisterImpl::number_of_registers + |
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|
509 FloatRegisterImpl::number_of_registers ) |
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|
510 * 2 // register halves |
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511 + ConditionRegisterImpl::number_of_registers // condition code registers |
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512 + SpecialRegisterImpl::number_of_registers // special registers |
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513 + VectorRegisterImpl::number_of_registers // vector registers |
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514 }; |
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|
515 |
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516 static const int max_gpr; |
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517 static const int max_fpr; |
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518 static const int max_cnd; |
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parents:
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changeset
|
519 }; |
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
520 |
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
521 // Common register declarations used in assembler code. |
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
522 REGISTER_DECLARATION(Register, R0_SCRATCH, R0); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
523 REGISTER_DECLARATION(Register, R1_SP, R1); // non-volatile |
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
524 REGISTER_DECLARATION(Register, R2_TOC, R2); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
525 REGISTER_DECLARATION(Register, R3_RET, R3); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
526 REGISTER_DECLARATION(Register, R3_ARG1, R3); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
527 REGISTER_DECLARATION(Register, R4_ARG2, R4); // volatile |
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
528 REGISTER_DECLARATION(Register, R5_ARG3, R5); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
529 REGISTER_DECLARATION(Register, R6_ARG4, R6); // volatile |
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8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
530 REGISTER_DECLARATION(Register, R7_ARG5, R7); // volatile |
ec28f9c041ff
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goetz
parents:
diff
changeset
|
531 REGISTER_DECLARATION(Register, R8_ARG6, R8); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
532 REGISTER_DECLARATION(Register, R9_ARG7, R9); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
533 REGISTER_DECLARATION(Register, R10_ARG8, R10); // volatile |
14445 | 534 REGISTER_DECLARATION(FloatRegister, F0_SCRATCH, F0); // volatile |
14408
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
535 REGISTER_DECLARATION(FloatRegister, F1_RET, F1); // volatile |
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8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
536 REGISTER_DECLARATION(FloatRegister, F1_ARG1, F1); // volatile |
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
537 REGISTER_DECLARATION(FloatRegister, F2_ARG2, F2); // volatile |
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8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
538 REGISTER_DECLARATION(FloatRegister, F3_ARG3, F3); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
539 REGISTER_DECLARATION(FloatRegister, F4_ARG4, F4); // volatile |
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
540 REGISTER_DECLARATION(FloatRegister, F5_ARG5, F5); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
541 REGISTER_DECLARATION(FloatRegister, F6_ARG6, F6); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
542 REGISTER_DECLARATION(FloatRegister, F7_ARG7, F7); // volatile |
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
543 REGISTER_DECLARATION(FloatRegister, F8_ARG8, F8); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
544 REGISTER_DECLARATION(FloatRegister, F9_ARG9, F9); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
545 REGISTER_DECLARATION(FloatRegister, F10_ARG10, F10); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
546 REGISTER_DECLARATION(FloatRegister, F11_ARG11, F11); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
547 REGISTER_DECLARATION(FloatRegister, F12_ARG12, F12); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
548 REGISTER_DECLARATION(FloatRegister, F13_ARG13, F13); // volatile |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
549 |
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
550 #ifndef DONT_USE_REGISTER_DEFINES |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
551 #define R0_SCRATCH AS_REGISTER(Register, R0) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
552 #define R1_SP AS_REGISTER(Register, R1) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
553 #define R2_TOC AS_REGISTER(Register, R2) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
554 #define R3_RET AS_REGISTER(Register, R3) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
555 #define R3_ARG1 AS_REGISTER(Register, R3) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
556 #define R4_ARG2 AS_REGISTER(Register, R4) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
557 #define R5_ARG3 AS_REGISTER(Register, R5) |
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
558 #define R6_ARG4 AS_REGISTER(Register, R6) |
ec28f9c041ff
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goetz
parents:
diff
changeset
|
559 #define R7_ARG5 AS_REGISTER(Register, R7) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
560 #define R8_ARG6 AS_REGISTER(Register, R8) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
561 #define R9_ARG7 AS_REGISTER(Register, R9) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
562 #define R10_ARG8 AS_REGISTER(Register, R10) |
14445 | 563 #define F0_SCRATCH AS_REGISTER(FloatRegister, F0) |
14408
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
564 #define F1_RET AS_REGISTER(FloatRegister, F1) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
565 #define F1_ARG1 AS_REGISTER(FloatRegister, F1) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
566 #define F2_ARG2 AS_REGISTER(FloatRegister, F2) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
567 #define F3_ARG3 AS_REGISTER(FloatRegister, F3) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
568 #define F4_ARG4 AS_REGISTER(FloatRegister, F4) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
569 #define F5_ARG5 AS_REGISTER(FloatRegister, F5) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
570 #define F6_ARG6 AS_REGISTER(FloatRegister, F6) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
571 #define F7_ARG7 AS_REGISTER(FloatRegister, F7) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
572 #define F8_ARG8 AS_REGISTER(FloatRegister, F8) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
573 #define F9_ARG9 AS_REGISTER(FloatRegister, F9) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
574 #define F10_ARG10 AS_REGISTER(FloatRegister, F10) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
575 #define F11_ARG11 AS_REGISTER(FloatRegister, F11) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
576 #define F12_ARG12 AS_REGISTER(FloatRegister, F12) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
577 #define F13_ARG13 AS_REGISTER(FloatRegister, F13) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
578 #endif |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
579 |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
580 // Register declarations to be used in frame manager assembly code. |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
581 // Use only non-volatile registers in order to keep values across C-calls. |
17804 | 582 #ifdef CC_INTERP |
14408
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
583 REGISTER_DECLARATION(Register, R14_state, R14); // address of new cInterpreter. |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
584 REGISTER_DECLARATION(Register, R15_prev_state, R15); // address of old cInterpreter |
17804 | 585 #else // CC_INTERP |
586 REGISTER_DECLARATION(Register, R14_bcp, R14); | |
587 REGISTER_DECLARATION(Register, R15_esp, R15); | |
588 REGISTER_DECLARATION(FloatRegister, F15_ftos, F15); | |
589 #endif // CC_INTERP | |
14408
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
590 REGISTER_DECLARATION(Register, R16_thread, R16); // address of current thread |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
591 REGISTER_DECLARATION(Register, R17_tos, R17); // address of Java tos (prepushed). |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
592 REGISTER_DECLARATION(Register, R18_locals, R18); // address of first param slot (receiver). |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
593 REGISTER_DECLARATION(Register, R19_method, R19); // address of current method |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
594 #ifndef DONT_USE_REGISTER_DEFINES |
17804 | 595 #ifdef CC_INTERP |
14408
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
596 #define R14_state AS_REGISTER(Register, R14) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
597 #define R15_prev_state AS_REGISTER(Register, R15) |
17804 | 598 #else // CC_INTERP |
599 #define R14_bcp AS_REGISTER(Register, R14) | |
600 #define R15_esp AS_REGISTER(Register, R15) | |
601 #define F15_ftos AS_REGISTER(FloatRegister, F15) | |
602 #endif // CC_INTERP | |
14408
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
603 #define R16_thread AS_REGISTER(Register, R16) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
604 #define R17_tos AS_REGISTER(Register, R17) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
605 #define R18_locals AS_REGISTER(Register, R18) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
606 #define R19_method AS_REGISTER(Register, R19) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
607 #define R21_sender_SP AS_REGISTER(Register, R21) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
608 #define R23_method_handle AS_REGISTER(Register, R23) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
609 #endif |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
610 |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
611 // Temporary registers to be used within frame manager. We can use |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
612 // the non-volatiles because the call stub has saved them. |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
613 // Use only non-volatile registers in order to keep values across C-calls. |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
614 REGISTER_DECLARATION(Register, R21_tmp1, R21); |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
615 REGISTER_DECLARATION(Register, R22_tmp2, R22); |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
616 REGISTER_DECLARATION(Register, R23_tmp3, R23); |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
617 REGISTER_DECLARATION(Register, R24_tmp4, R24); |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
618 REGISTER_DECLARATION(Register, R25_tmp5, R25); |
ec28f9c041ff
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goetz
parents:
diff
changeset
|
619 REGISTER_DECLARATION(Register, R26_tmp6, R26); |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
620 REGISTER_DECLARATION(Register, R27_tmp7, R27); |
ec28f9c041ff
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goetz
parents:
diff
changeset
|
621 REGISTER_DECLARATION(Register, R28_tmp8, R28); |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
622 REGISTER_DECLARATION(Register, R29_tmp9, R29); |
17804 | 623 #ifndef CC_INTERP |
624 REGISTER_DECLARATION(Register, R24_dispatch_addr, R24); | |
625 REGISTER_DECLARATION(Register, R25_templateTableBase, R25); | |
626 REGISTER_DECLARATION(Register, R26_monitor, R26); | |
627 REGISTER_DECLARATION(Register, R27_constPoolCache, R27); | |
628 REGISTER_DECLARATION(Register, R28_mdx, R28); | |
629 #endif // CC_INTERP | |
630 | |
14408
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
631 #ifndef DONT_USE_REGISTER_DEFINES |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
632 #define R21_tmp1 AS_REGISTER(Register, R21) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
633 #define R22_tmp2 AS_REGISTER(Register, R22) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
634 #define R23_tmp3 AS_REGISTER(Register, R23) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
635 #define R24_tmp4 AS_REGISTER(Register, R24) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
636 #define R25_tmp5 AS_REGISTER(Register, R25) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
637 #define R26_tmp6 AS_REGISTER(Register, R26) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
638 #define R27_tmp7 AS_REGISTER(Register, R27) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
639 #define R28_tmp8 AS_REGISTER(Register, R28) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
640 #define R29_tmp9 AS_REGISTER(Register, R29) |
17804 | 641 #ifndef CC_INTERP |
642 // Lmonitors : monitor pointer | |
643 // LcpoolCache: constant pool cache | |
644 // mdx: method data index | |
645 #define R24_dispatch_addr AS_REGISTER(Register, R24) | |
646 #define R25_templateTableBase AS_REGISTER(Register, R25) | |
647 #define R26_monitor AS_REGISTER(Register, R26) | |
648 #define R27_constPoolCache AS_REGISTER(Register, R27) | |
649 #define R28_mdx AS_REGISTER(Register, R28) | |
650 #endif | |
14408
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8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
651 |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff
changeset
|
652 #define CCR4_is_synced AS_REGISTER(ConditionRegister, CCR4) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
653 #endif |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
654 |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
655 // Scratch registers are volatile. |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
656 REGISTER_DECLARATION(Register, R11_scratch1, R11); |
ec28f9c041ff
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parents:
diff
changeset
|
657 REGISTER_DECLARATION(Register, R12_scratch2, R12); |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
658 #ifndef DONT_USE_REGISTER_DEFINES |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
659 #define R11_scratch1 AS_REGISTER(Register, R11) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
660 #define R12_scratch2 AS_REGISTER(Register, R12) |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
661 #endif |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff
changeset
|
662 |
ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
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663 #endif // CPU_PPC_VM_REGISTER_PPC_HPP |