Mercurial > hg > truffle
annotate src/cpu/x86/vm/globals_x86.hpp @ 17716:cdb71841f4bc
6498581: ThreadInterruptTest3 produces wrong output on Windows
Summary: There is race condition between os::interrupt and os::is_interrupted on Windows. In JVM_Sleep(Thread.sleep), check if thread gets interrupted, it may see interrupted but not really interrupted so cause spurious waking up (early return from sleep). Fix by checking if interrupt event really gets set thus prevent false return. For intrinsic of _isInterrupted, on Windows, go fastpath only on bit not set.
Reviewed-by: acorn, kvn
Contributed-by: david.holmes@oracle.com, yumin.qi@oracle.com
author | minqi |
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date | Wed, 26 Feb 2014 15:20:41 -0800 |
parents | 5ccbab1c69f3 |
children | 096c224171c4 41b780b43b74 8a8ff6b577ed |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #ifndef CPU_X86_VM_GLOBALS_X86_HPP |
26 #define CPU_X86_VM_GLOBALS_X86_HPP | |
27 | |
28 #include "utilities/globalDefinitions.hpp" | |
29 #include "utilities/macros.hpp" | |
30 | |
0 | 31 // Sets the default values for platform dependent flags used by the runtime system. |
32 // (see globals.hpp) | |
33 | |
1064 | 34 define_pd_global(bool, ConvertSleepToYield, true); |
35 define_pd_global(bool, ShareVtableStubs, true); | |
36 define_pd_global(bool, CountInterpCalls, true); | |
37 define_pd_global(bool, NeedsDeoptSuspend, false); // only register window machines need this | |
0 | 38 |
1064 | 39 define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks |
40 define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs past to check cast | |
0 | 41 |
42 // See 4827828 for this change. There is no globals_core_i486.hpp. I can't | |
43 // assign a different value for C2 without touching a number of files. Use | |
44 // #ifdef to minimize the change as it's late in Mantis. -- FIXME. | |
45 // c1 doesn't have this problem because the fix to 4858033 assures us | |
46 // the the vep is aligned at CodeEntryAlignment whereas c2 only aligns | |
47 // the uep and the vep doesn't get real alignment but just slops on by | |
48 // only assured that the entry instruction meets the 5 byte size requirement. | |
49 #ifdef COMPILER2 | |
1064 | 50 define_pd_global(intx, CodeEntryAlignment, 32); |
0 | 51 #else |
1064 | 52 define_pd_global(intx, CodeEntryAlignment, 16); |
0 | 53 #endif // COMPILER2 |
1365 | 54 define_pd_global(intx, OptoLoopAlignment, 16); |
1064 | 55 define_pd_global(intx, InlineFrequencyCount, 100); |
56 define_pd_global(intx, InlineSmallCode, 1000); | |
0 | 57 |
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58 define_pd_global(intx, StackYellowPages, NOT_WINDOWS(2) WINDOWS_ONLY(3)); |
1064 | 59 define_pd_global(intx, StackRedPages, 1); |
0 | 60 #ifdef AMD64 |
61 // Very large C++ stack frames using solaris-amd64 optimized builds | |
62 // due to lack of optimization caused by C++ compiler bugs | |
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63 define_pd_global(intx, StackShadowPages, NOT_WIN64(20) WIN64_ONLY(6) DEBUG_ONLY(+2)); |
0 | 64 #else |
4942 | 65 define_pd_global(intx, StackShadowPages, 4 DEBUG_ONLY(+5)); |
0 | 66 #endif // AMD64 |
67 | |
1064 | 68 define_pd_global(intx, PreInflateSpin, 10); |
0 | 69 |
70 define_pd_global(bool, RewriteBytecodes, true); | |
71 define_pd_global(bool, RewriteFrequentPairs, true); | |
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72 |
3960 | 73 #ifdef _ALLBSD_SOURCE |
74 define_pd_global(bool, UseMembar, true); | |
75 #else | |
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76 define_pd_global(bool, UseMembar, false); |
3960 | 77 #endif |
1972 | 78 |
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79 // GC Ergo Flags |
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80 define_pd_global(uintx, CMSYoungGenPerWorker, 64*M); // default max size of CMS young gen, per GC worker thread |
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81 |
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82 define_pd_global(uintx, TypeProfileLevel, 111); |
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83 |
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84 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \ |
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85 \ |
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86 develop(bool, IEEEPrecision, true, \ |
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87 "Enables IEEE precision (for INTEL only)") \ |
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88 \ |
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89 product(intx, FenceInstruction, 0, \ |
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90 "(Unsafe,Unstable) Experimental") \ |
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91 \ |
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92 product(intx, ReadPrefetchInstr, 0, \ |
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93 "Prefetch instruction to prefetch ahead") \ |
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94 \ |
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95 product(bool, UseStoreImmI16, true, \ |
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96 "Use store immediate 16-bits value instruction on x86") \ |
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97 \ |
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98 product(intx, UseAVX, 99, \ |
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99 "Highest supported AVX instructions set on x86/x64") \ |
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100 \ |
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101 product(bool, UseCLMUL, false, \ |
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102 "Control whether CLMUL instructions can be used on x86/x64") \ |
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103 \ |
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104 diagnostic(bool, UseIncDec, true, \ |
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105 "Use INC, DEC instructions on x86") \ |
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106 \ |
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107 product(bool, UseNewLongLShift, false, \ |
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108 "Use optimized bitwise shift left") \ |
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109 \ |
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110 product(bool, UseAddressNop, false, \ |
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111 "Use '0F 1F [addr]' NOP instructions on x86 cpus") \ |
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112 \ |
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113 product(bool, UseXmmLoadAndClearUpper, true, \ |
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114 "Load low part of XMM register and clear upper part") \ |
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115 \ |
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116 product(bool, UseXmmRegToRegMoveAll, false, \ |
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117 "Copy all XMM register bits when moving value between registers") \ |
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118 \ |
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119 product(bool, UseXmmI2D, false, \ |
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120 "Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \ |
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121 \ |
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122 product(bool, UseXmmI2F, false, \ |
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123 "Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \ |
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124 \ |
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125 product(bool, UseUnalignedLoadStores, false, \ |
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126 "Use SSE2 MOVDQU instruction for Arraycopy") \ |
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127 \ |
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128 product(bool, UseFastStosb, false, \ |
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129 "Use fast-string operation for zeroing: rep stosb") \ |
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130 \ |
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131 /* assembler */ \ |
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132 product(bool, Use486InstrsOnly, false, \ |
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133 "Use 80486 Compliant instruction subset") \ |
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134 \ |
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135 product(bool, UseCountLeadingZerosInstruction, false, \ |
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136 "Use count leading zeros instruction") \ |
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137 |
1972 | 138 #endif // CPU_X86_VM_GLOBALS_X86_HPP |