annotate src/cpu/x86/vm/icache_x86.cpp @ 17716:cdb71841f4bc

6498581: ThreadInterruptTest3 produces wrong output on Windows Summary: There is race condition between os::interrupt and os::is_interrupted on Windows. In JVM_Sleep(Thread.sleep), check if thread gets interrupted, it may see interrupted but not really interrupted so cause spurious waking up (early return from sleep). Fix by checking if interrupt event really gets set thus prevent false return. For intrinsic of _isInterrupted, on Windows, go fastpath only on bit not set. Reviewed-by: acorn, kvn Contributed-by: david.holmes@oracle.com, yumin.qi@oracle.com
author minqi
date Wed, 26 Feb 2014 15:20:41 -0800
parents cd3d6a6b95d9
children
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1 /*
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2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #include "precompiled.hpp"
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26 #include "asm/macroAssembler.hpp"
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27 #include "runtime/icache.hpp"
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29 #define __ _masm->
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30
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31 void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) {
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32 StubCodeMark mark(this, "ICache", "flush_icache_stub");
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33
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34 address start = __ pc();
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35 #ifdef AMD64
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36
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37 const Register addr = c_rarg0;
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38 const Register lines = c_rarg1;
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39 const Register magic = c_rarg2;
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40
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41 Label flush_line, done;
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42
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43 __ testl(lines, lines);
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44 __ jcc(Assembler::zero, done);
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45
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46 // Force ordering wrt cflush.
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47 // Other fence and sync instructions won't do the job.
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48 __ mfence();
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49
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50 __ bind(flush_line);
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51 __ clflush(Address(addr, 0));
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52 __ addptr(addr, ICache::line_size);
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53 __ decrementl(lines);
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54 __ jcc(Assembler::notZero, flush_line);
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55
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56 __ mfence();
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57
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58 __ bind(done);
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59
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60 #else
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61 const Address magic(rsp, 3*wordSize);
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62 __ lock(); __ addl(Address(rsp, 0), 0);
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63 #endif // AMD64
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64 __ movptr(rax, magic); // Handshake with caller to make sure it happened!
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65 __ ret(0);
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66
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67 // Must be set here so StubCodeMark destructor can call the flush stub.
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68 *flush_icache_stub = (ICache::flush_icache_stub_t)start;
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69 }
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71 #undef __