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annotate src/cpu/x86/vm/relocInfo_x86.hpp @ 12355:cefad50507d8

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Merge with hs25-b53
author Gilles Duboscq <duboscq@ssw.jku.at>
date Fri, 11 Oct 2013 10:38:03 +0200
parents f95d63e2154a
children
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1 /*
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2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #ifndef CPU_X86_VM_RELOCINFO_X86_HPP
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26 #define CPU_X86_VM_RELOCINFO_X86_HPP
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27
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28 // machine-dependent parts of class relocInfo
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29 private:
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30 enum {
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31 // Intel instructions are byte-aligned.
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32 offset_unit = 1,
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33
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34 // Encodes Assembler::disp32_operand vs. Assembler::imm32_operand.
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35 #ifndef AMD64
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36 format_width = 1
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37 #else
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38 // vs Assembler::narrow_oop_operand.
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39 format_width = 2
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40 #endif
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41 };
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42
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43 #endif // CPU_X86_VM_RELOCINFO_X86_HPP