Mercurial > hg > truffle
annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 12355:cefad50507d8
Merge with hs25-b53
| author | Gilles Duboscq <duboscq@ssw.jku.at> |
|---|---|
| date | Fri, 11 Oct 2013 10:38:03 +0200 |
| parents | 6b0fd0964b87 |
| children | 02f27ecb4f3a |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/macroAssembler.hpp" |
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27 #include "asm/macroAssembler.inline.hpp" |
| 1972 | 28 #include "code/debugInfoRec.hpp" |
| 29 #include "code/icBuffer.hpp" | |
| 30 #include "code/vtableStubs.hpp" | |
| 31 #include "interpreter/interpreter.hpp" | |
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32 #include "oops/compiledICHolder.hpp" |
| 1972 | 33 #include "prims/jvmtiRedefineClassesTrace.hpp" |
| 34 #include "runtime/sharedRuntime.hpp" | |
| 35 #include "runtime/vframeArray.hpp" | |
| 36 #include "vmreg_x86.inline.hpp" | |
| 37 #ifdef COMPILER1 | |
| 38 #include "c1/c1_Runtime1.hpp" | |
| 39 #endif | |
| 40 #ifdef COMPILER2 | |
| 41 #include "opto/runtime.hpp" | |
| 42 #endif | |
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43 #ifdef GRAAL |
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44 #include "graal/graalJavaAccess.hpp" |
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45 #endif |
| 0 | 46 |
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47 #define __ masm-> |
| 0 | 48 |
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49 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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50 |
| 0 | 51 class SimpleRuntimeFrame { |
| 52 | |
| 53 public: | |
| 54 | |
| 55 // Most of the runtime stubs have this simple frame layout. | |
| 56 // This class exists to make the layout shared in one place. | |
| 57 // Offsets are for compiler stack slots, which are jints. | |
| 58 enum layout { | |
| 59 // The frame sender code expects that rbp will be in the "natural" place and | |
| 60 // will override any oopMap setting for it. We must therefore force the layout | |
| 61 // so that it agrees with the frame sender code. | |
| 62 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, | |
| 63 rbp_off2, | |
| 64 return_off, return_off2, | |
| 65 framesize | |
| 66 }; | |
| 67 }; | |
| 68 | |
| 69 class RegisterSaver { | |
| 70 // Capture info about frame layout. Layout offsets are in jint | |
| 71 // units because compiler frame slots are jints. | |
| 72 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off | |
| 73 enum layout { | |
| 74 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area | |
| 75 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area | |
| 76 DEF_XMM_OFFS(0), | |
| 77 DEF_XMM_OFFS(1), | |
| 78 DEF_XMM_OFFS(2), | |
| 79 DEF_XMM_OFFS(3), | |
| 80 DEF_XMM_OFFS(4), | |
| 81 DEF_XMM_OFFS(5), | |
| 82 DEF_XMM_OFFS(6), | |
| 83 DEF_XMM_OFFS(7), | |
| 84 DEF_XMM_OFFS(8), | |
| 85 DEF_XMM_OFFS(9), | |
| 86 DEF_XMM_OFFS(10), | |
| 87 DEF_XMM_OFFS(11), | |
| 88 DEF_XMM_OFFS(12), | |
| 89 DEF_XMM_OFFS(13), | |
| 90 DEF_XMM_OFFS(14), | |
| 91 DEF_XMM_OFFS(15), | |
| 92 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt), | |
| 93 fpu_stateH_end, | |
| 94 r15_off, r15H_off, | |
| 95 r14_off, r14H_off, | |
| 96 r13_off, r13H_off, | |
| 97 r12_off, r12H_off, | |
| 98 r11_off, r11H_off, | |
| 99 r10_off, r10H_off, | |
| 100 r9_off, r9H_off, | |
| 101 r8_off, r8H_off, | |
| 102 rdi_off, rdiH_off, | |
| 103 rsi_off, rsiH_off, | |
| 104 ignore_off, ignoreH_off, // extra copy of rbp | |
| 105 rsp_off, rspH_off, | |
| 106 rbx_off, rbxH_off, | |
| 107 rdx_off, rdxH_off, | |
| 108 rcx_off, rcxH_off, | |
| 109 rax_off, raxH_off, | |
| 110 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state | |
| 111 align_off, alignH_off, | |
| 112 flags_off, flagsH_off, | |
| 113 // The frame sender code expects that rbp will be in the "natural" place and | |
| 114 // will override any oopMap setting for it. We must therefore force the layout | |
| 115 // so that it agrees with the frame sender code. | |
| 116 rbp_off, rbpH_off, // copy of rbp we will restore | |
| 117 return_off, returnH_off, // slot for return address | |
| 118 reg_save_size // size in compiler stack slots | |
| 119 }; | |
| 120 | |
| 121 public: | |
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122 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false); |
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123 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); |
| 0 | 124 |
| 125 // Offsets into the register save area | |
| 126 // Used by deoptimization when it is managing result register | |
| 127 // values on its own | |
| 128 | |
| 129 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } | |
| 304 | 130 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } |
| 0 | 131 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } |
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132 static int r10_offset_in_bytes(void) { return BytesPerInt * r10_off; } |
| 0 | 133 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } |
| 134 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } | |
| 135 | |
| 136 // During deoptimization only the result registers need to be restored, | |
| 137 // all the other values have already been extracted. | |
| 138 static void restore_result_registers(MacroAssembler* masm); | |
| 139 }; | |
| 140 | |
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141 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { |
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142 int vect_words = 0; |
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143 #ifdef COMPILER2 |
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144 if (save_vectors) { |
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145 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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146 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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147 // Save upper half of YMM registes |
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148 vect_words = 16 * 16 / wordSize; |
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149 additional_frame_words += vect_words; |
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150 } |
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151 #else |
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152 assert(!save_vectors, "vectors are generated only by C2"); |
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153 #endif |
| 0 | 154 |
| 155 // Always make the frame size 16-byte aligned | |
| 156 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + | |
| 157 reg_save_size*BytesPerInt, 16); | |
| 158 // OopMap frame size is in compiler stack slots (jint's) not bytes or words | |
| 159 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; | |
| 160 // The caller will allocate additional_frame_words | |
| 161 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; | |
| 162 // CodeBlob frame size is in words. | |
| 163 int frame_size_in_words = frame_size_in_bytes / wordSize; | |
| 164 *total_frame_words = frame_size_in_words; | |
| 165 | |
| 166 // Save registers, fpu state, and flags. | |
| 167 // We assume caller has already pushed the return address onto the | |
| 168 // stack, so rsp is 8-byte aligned here. | |
| 169 // We push rpb twice in this sequence because we want the real rbp | |
| 170 // to be under the return like a normal enter. | |
| 171 | |
| 172 __ enter(); // rsp becomes 16-byte aligned here | |
| 173 __ push_CPU_state(); // Push a multiple of 16 bytes | |
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174 |
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175 if (vect_words > 0) { |
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176 assert(vect_words*wordSize == 256, ""); |
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177 __ subptr(rsp, 256); // Save upper half of YMM registes |
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178 __ vextractf128h(Address(rsp, 0),xmm0); |
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179 __ vextractf128h(Address(rsp, 16),xmm1); |
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180 __ vextractf128h(Address(rsp, 32),xmm2); |
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181 __ vextractf128h(Address(rsp, 48),xmm3); |
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182 __ vextractf128h(Address(rsp, 64),xmm4); |
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183 __ vextractf128h(Address(rsp, 80),xmm5); |
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184 __ vextractf128h(Address(rsp, 96),xmm6); |
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185 __ vextractf128h(Address(rsp,112),xmm7); |
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186 __ vextractf128h(Address(rsp,128),xmm8); |
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187 __ vextractf128h(Address(rsp,144),xmm9); |
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188 __ vextractf128h(Address(rsp,160),xmm10); |
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189 __ vextractf128h(Address(rsp,176),xmm11); |
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190 __ vextractf128h(Address(rsp,192),xmm12); |
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191 __ vextractf128h(Address(rsp,208),xmm13); |
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192 __ vextractf128h(Address(rsp,224),xmm14); |
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193 __ vextractf128h(Address(rsp,240),xmm15); |
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194 } |
| 0 | 195 if (frame::arg_reg_save_area_bytes != 0) { |
| 196 // Allocate argument register save area | |
| 304 | 197 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 198 } |
| 199 | |
| 200 // Set an oopmap for the call site. This oopmap will map all | |
| 201 // oop-registers and debug-info registers as callee-saved. This | |
| 202 // will allow deoptimization at this safepoint to find all possible | |
| 203 // debug-info recordings, as well as let GC find all oops. | |
| 204 | |
| 205 OopMapSet *oop_maps = new OopMapSet(); | |
| 206 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
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207 |
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208 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_slots) |
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209 |
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210 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg()); |
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211 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg()); |
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212 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg()); |
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213 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg()); |
| 0 | 214 // rbp location is known implicitly by the frame sender code, needs no oopmap |
| 215 // and the location where rbp was saved by is ignored | |
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216 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg()); |
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217 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg()); |
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218 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg()); |
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219 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg()); |
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220 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg()); |
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221 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg()); |
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222 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg()); |
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223 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg()); |
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224 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg()); |
|
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225 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg()); |
|
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226 map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0->as_VMReg()); |
|
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227 map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1->as_VMReg()); |
|
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228 map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2->as_VMReg()); |
|
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229 map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3->as_VMReg()); |
|
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230 map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4->as_VMReg()); |
|
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231 map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5->as_VMReg()); |
|
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232 map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6->as_VMReg()); |
|
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233 map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7->as_VMReg()); |
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234 map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8->as_VMReg()); |
|
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235 map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9->as_VMReg()); |
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236 map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10->as_VMReg()); |
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237 map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11->as_VMReg()); |
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238 map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12->as_VMReg()); |
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239 map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13->as_VMReg()); |
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240 map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14->as_VMReg()); |
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241 map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15->as_VMReg()); |
| 0 | 242 |
| 243 // %%% These should all be a waste but we'll keep things as they were for now | |
| 244 if (true) { | |
|
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245 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next()); |
|
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246 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next()); |
|
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247 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next()); |
|
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248 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next()); |
| 0 | 249 // rbp location is known implicitly by the frame sender code, needs no oopmap |
|
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250 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next()); |
|
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251 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next()); |
|
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252 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next()); |
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253 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next()); |
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254 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next()); |
|
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255 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next()); |
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256 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next()); |
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257 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next()); |
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258 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next()); |
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259 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next()); |
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260 map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0->as_VMReg()->next()); |
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261 map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1->as_VMReg()->next()); |
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262 map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2->as_VMReg()->next()); |
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263 map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3->as_VMReg()->next()); |
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264 map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4->as_VMReg()->next()); |
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265 map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5->as_VMReg()->next()); |
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266 map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6->as_VMReg()->next()); |
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267 map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7->as_VMReg()->next()); |
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268 map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8->as_VMReg()->next()); |
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269 map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9->as_VMReg()->next()); |
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270 map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10->as_VMReg()->next()); |
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271 map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11->as_VMReg()->next()); |
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272 map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12->as_VMReg()->next()); |
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273 map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13->as_VMReg()->next()); |
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274 map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14->as_VMReg()->next()); |
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275 map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15->as_VMReg()->next()); |
| 0 | 276 } |
| 277 | |
| 278 return map; | |
| 279 } | |
| 280 | |
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281 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { |
| 0 | 282 if (frame::arg_reg_save_area_bytes != 0) { |
| 283 // Pop arg register save area | |
| 304 | 284 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 285 } |
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286 #ifdef COMPILER2 |
|
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287 if (restore_vectors) { |
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288 // Restore upper half of YMM registes. |
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289 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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290 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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291 __ vinsertf128h(xmm0, Address(rsp, 0)); |
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292 __ vinsertf128h(xmm1, Address(rsp, 16)); |
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293 __ vinsertf128h(xmm2, Address(rsp, 32)); |
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294 __ vinsertf128h(xmm3, Address(rsp, 48)); |
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295 __ vinsertf128h(xmm4, Address(rsp, 64)); |
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296 __ vinsertf128h(xmm5, Address(rsp, 80)); |
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297 __ vinsertf128h(xmm6, Address(rsp, 96)); |
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298 __ vinsertf128h(xmm7, Address(rsp,112)); |
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299 __ vinsertf128h(xmm8, Address(rsp,128)); |
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300 __ vinsertf128h(xmm9, Address(rsp,144)); |
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301 __ vinsertf128h(xmm10, Address(rsp,160)); |
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302 __ vinsertf128h(xmm11, Address(rsp,176)); |
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303 __ vinsertf128h(xmm12, Address(rsp,192)); |
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304 __ vinsertf128h(xmm13, Address(rsp,208)); |
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305 __ vinsertf128h(xmm14, Address(rsp,224)); |
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306 __ vinsertf128h(xmm15, Address(rsp,240)); |
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307 __ addptr(rsp, 256); |
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308 } |
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309 #else |
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310 assert(!restore_vectors, "vectors are generated only by C2"); |
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311 #endif |
| 0 | 312 // Recover CPU state |
| 313 __ pop_CPU_state(); | |
| 314 // Get the rbp described implicitly by the calling convention (no oopMap) | |
| 304 | 315 __ pop(rbp); |
| 0 | 316 } |
| 317 | |
| 318 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
| 319 | |
| 320 // Just restore result register. Only used by deoptimization. By | |
| 321 // now any callee save register that needs to be restored to a c2 | |
| 322 // caller of the deoptee has been extracted into the vframeArray | |
| 323 // and will be stuffed into the c2i adapter we create for later | |
| 324 // restoration so only result registers need to be restored here. | |
| 325 | |
| 326 // Restore fp result register | |
| 327 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); | |
| 328 // Restore integer result register | |
| 304 | 329 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); |
| 330 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); | |
| 331 | |
| 0 | 332 // Pop all of the register save are off the stack except the return address |
| 304 | 333 __ addptr(rsp, return_offset_in_bytes()); |
| 0 | 334 } |
| 335 | |
|
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336 // Is vector's size (in bytes) bigger than a size saved by default? |
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337 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions. |
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338 bool SharedRuntime::is_wide_vector(int size) { |
|
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339 return size > 16; |
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340 } |
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341 |
| 0 | 342 // The java_calling_convention describes stack locations as ideal slots on |
| 343 // a frame with no abi restrictions. Since we must observe abi restrictions | |
| 344 // (like the placement of the register window) the slots must be biased by | |
| 345 // the following value. | |
| 346 static int reg2offset_in(VMReg r) { | |
| 347 // Account for saved rbp and return address | |
| 348 // This should really be in_preserve_stack_slots | |
| 349 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; | |
| 350 } | |
| 351 | |
| 352 static int reg2offset_out(VMReg r) { | |
| 353 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
| 354 } | |
| 355 | |
| 356 // --------------------------------------------------------------------------- | |
| 357 // Read the array of BasicTypes from a signature, and compute where the | |
| 358 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
| 359 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
| 360 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
| 361 // as framesizes are fixed. | |
| 362 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
| 363 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
| 364 // up to RegisterImpl::number_of_registers) are the 64-bit | |
| 365 // integer registers. | |
| 366 | |
| 367 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
| 368 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
| 369 // units regardless of build. Of course for i486 there is no 64 bit build | |
| 370 | |
| 371 // The Java calling convention is a "shifted" version of the C ABI. | |
| 372 // By skipping the first C ABI register we can call non-static jni methods | |
| 373 // with small numbers of arguments without having to shuffle the arguments | |
| 374 // at all. Since we control the java ABI we ought to at least get some | |
| 375 // advantage out of it. | |
| 376 | |
| 377 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
| 378 VMRegPair *regs, | |
| 379 int total_args_passed, | |
| 380 int is_outgoing) { | |
| 381 | |
| 382 // Create the mapping between argument positions and | |
| 383 // registers. | |
| 384 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { | |
| 385 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 | |
| 386 }; | |
| 387 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { | |
| 388 j_farg0, j_farg1, j_farg2, j_farg3, | |
| 389 j_farg4, j_farg5, j_farg6, j_farg7 | |
| 390 }; | |
| 391 | |
| 392 | |
| 393 uint int_args = 0; | |
| 394 uint fp_args = 0; | |
| 395 uint stk_args = 0; // inc by 2 each time | |
| 396 | |
| 397 for (int i = 0; i < total_args_passed; i++) { | |
| 398 switch (sig_bt[i]) { | |
| 399 case T_BOOLEAN: | |
| 400 case T_CHAR: | |
| 401 case T_BYTE: | |
| 402 case T_SHORT: | |
| 403 case T_INT: | |
| 404 if (int_args < Argument::n_int_register_parameters_j) { | |
| 405 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
| 406 } else { | |
| 407 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 408 stk_args += 2; | |
| 409 } | |
| 410 break; | |
| 411 case T_VOID: | |
| 412 // halves of T_LONG or T_DOUBLE | |
| 413 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
| 414 regs[i].set_bad(); | |
| 415 break; | |
| 416 case T_LONG: | |
| 417 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 418 // fall through | |
| 419 case T_OBJECT: | |
| 420 case T_ARRAY: | |
| 421 case T_ADDRESS: | |
| 422 if (int_args < Argument::n_int_register_parameters_j) { | |
| 423 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
| 424 } else { | |
| 425 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 426 stk_args += 2; | |
| 427 } | |
| 428 break; | |
| 429 case T_FLOAT: | |
| 430 if (fp_args < Argument::n_float_register_parameters_j) { | |
| 431 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 432 } else { | |
| 433 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 434 stk_args += 2; | |
| 435 } | |
| 436 break; | |
| 437 case T_DOUBLE: | |
| 438 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 439 if (fp_args < Argument::n_float_register_parameters_j) { | |
| 440 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 441 } else { | |
| 442 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 443 stk_args += 2; | |
| 444 } | |
| 445 break; | |
| 446 default: | |
| 447 ShouldNotReachHere(); | |
| 448 break; | |
| 449 } | |
| 450 } | |
| 451 | |
| 452 return round_to(stk_args, 2); | |
| 453 } | |
| 454 | |
| 455 // Patch the callers callsite with entry to compiled code if it exists. | |
| 456 static void patch_callers_callsite(MacroAssembler *masm) { | |
| 457 Label L; | |
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458 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
| 0 | 459 __ jcc(Assembler::equal, L); |
| 460 | |
| 461 // Save the current stack pointer | |
| 304 | 462 __ mov(r13, rsp); |
| 0 | 463 // Schedule the branch target address early. |
| 464 // Call into the VM to patch the caller, then jump to compiled callee | |
| 465 // rax isn't live so capture return address while we easily can | |
| 304 | 466 __ movptr(rax, Address(rsp, 0)); |
| 0 | 467 |
| 468 // align stack so push_CPU_state doesn't fault | |
| 304 | 469 __ andptr(rsp, -(StackAlignmentInBytes)); |
| 0 | 470 __ push_CPU_state(); |
| 471 | |
| 472 // VM needs caller's callsite | |
| 473 // VM needs target method | |
| 474 // This needs to be a long call since we will relocate this adapter to | |
| 475 // the codeBuffer and it may not reach | |
| 476 | |
| 477 // Allocate argument register save area | |
| 478 if (frame::arg_reg_save_area_bytes != 0) { | |
| 304 | 479 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 480 } |
| 304 | 481 __ mov(c_rarg0, rbx); |
| 482 __ mov(c_rarg1, rax); | |
| 0 | 483 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
| 484 | |
| 485 // De-allocate argument register save area | |
| 486 if (frame::arg_reg_save_area_bytes != 0) { | |
| 304 | 487 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 488 } |
| 489 | |
| 490 __ pop_CPU_state(); | |
| 491 // restore sp | |
| 304 | 492 __ mov(rsp, r13); |
| 0 | 493 __ bind(L); |
| 494 } | |
| 495 | |
| 496 | |
| 497 static void gen_c2i_adapter(MacroAssembler *masm, | |
| 498 int total_args_passed, | |
| 499 int comp_args_on_stack, | |
| 500 const BasicType *sig_bt, | |
| 501 const VMRegPair *regs, | |
| 502 Label& skip_fixup) { | |
| 503 // Before we get into the guts of the C2I adapter, see if we should be here | |
| 504 // at all. We've come from compiled code and are attempting to jump to the | |
| 505 // interpreter, which means the caller made a static call to get here | |
| 506 // (vcalls always get a compiled target if there is one). Check for a | |
| 507 // compiled target. If there is one, we need to patch the caller's call. | |
| 508 patch_callers_callsite(masm); | |
| 509 | |
| 510 __ bind(skip_fixup); | |
| 511 | |
| 512 // Since all args are passed on the stack, total_args_passed * | |
| 513 // Interpreter::stackElementSize is the space we need. Plus 1 because | |
| 514 // we also account for the return address location since | |
| 515 // we store it first rather than hold it in rax across all the shuffling | |
| 516 | |
| 1506 | 517 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; |
| 0 | 518 |
| 519 // stack is aligned, keep it that way | |
| 520 extraspace = round_to(extraspace, 2*wordSize); | |
| 521 | |
| 522 // Get return address | |
| 304 | 523 __ pop(rax); |
| 0 | 524 |
| 525 // set senderSP value | |
| 304 | 526 __ mov(r13, rsp); |
| 527 | |
| 528 __ subptr(rsp, extraspace); | |
| 0 | 529 |
| 530 // Store the return address in the expected location | |
| 304 | 531 __ movptr(Address(rsp, 0), rax); |
| 0 | 532 |
| 533 // Now write the args into the outgoing interpreter space | |
| 534 for (int i = 0; i < total_args_passed; i++) { | |
| 535 if (sig_bt[i] == T_VOID) { | |
| 536 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 537 continue; | |
| 538 } | |
| 539 | |
| 540 // offset to start parameters | |
| 1506 | 541 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; |
| 542 int next_off = st_off - Interpreter::stackElementSize; | |
| 0 | 543 |
| 544 // Say 4 args: | |
| 545 // i st_off | |
| 546 // 0 32 T_LONG | |
| 547 // 1 24 T_VOID | |
| 548 // 2 16 T_OBJECT | |
| 549 // 3 8 T_BOOL | |
| 550 // - 0 return address | |
| 551 // | |
| 552 // However to make thing extra confusing. Because we can fit a long/double in | |
| 553 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter | |
| 554 // leaves one slot empty and only stores to a single slot. In this case the | |
| 555 // slot that is occupied is the T_VOID slot. See I said it was confusing. | |
| 556 | |
| 557 VMReg r_1 = regs[i].first(); | |
| 558 VMReg r_2 = regs[i].second(); | |
| 559 if (!r_1->is_valid()) { | |
| 560 assert(!r_2->is_valid(), ""); | |
| 561 continue; | |
| 562 } | |
| 563 if (r_1->is_stack()) { | |
| 564 // memory to memory use rax | |
| 565 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
| 566 if (!r_2->is_valid()) { | |
| 567 // sign extend?? | |
| 568 __ movl(rax, Address(rsp, ld_off)); | |
| 304 | 569 __ movptr(Address(rsp, st_off), rax); |
| 0 | 570 |
| 571 } else { | |
| 572 | |
| 573 __ movq(rax, Address(rsp, ld_off)); | |
| 574 | |
| 575 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
| 576 // T_DOUBLE and T_LONG use two slots in the interpreter | |
| 577 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
| 578 // ld_off == LSW, ld_off+wordSize == MSW | |
| 579 // st_off == MSW, next_off == LSW | |
| 580 __ movq(Address(rsp, next_off), rax); | |
| 581 #ifdef ASSERT | |
| 582 // Overwrite the unused slot with known junk | |
| 583 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
| 304 | 584 __ movptr(Address(rsp, st_off), rax); |
| 0 | 585 #endif /* ASSERT */ |
| 586 } else { | |
| 587 __ movq(Address(rsp, st_off), rax); | |
| 588 } | |
| 589 } | |
| 590 } else if (r_1->is_Register()) { | |
| 591 Register r = r_1->as_Register(); | |
| 592 if (!r_2->is_valid()) { | |
| 593 // must be only an int (or less ) so move only 32bits to slot | |
| 594 // why not sign extend?? | |
| 595 __ movl(Address(rsp, st_off), r); | |
| 596 } else { | |
| 597 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
| 598 // T_DOUBLE and T_LONG use two slots in the interpreter | |
| 599 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
| 600 // long/double in gpr | |
| 601 #ifdef ASSERT | |
| 602 // Overwrite the unused slot with known junk | |
| 603 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); | |
| 304 | 604 __ movptr(Address(rsp, st_off), rax); |
| 0 | 605 #endif /* ASSERT */ |
| 606 __ movq(Address(rsp, next_off), r); | |
| 607 } else { | |
| 304 | 608 __ movptr(Address(rsp, st_off), r); |
| 0 | 609 } |
| 610 } | |
| 611 } else { | |
| 612 assert(r_1->is_XMMRegister(), ""); | |
| 613 if (!r_2->is_valid()) { | |
| 614 // only a float use just part of the slot | |
| 615 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
| 616 } else { | |
| 617 #ifdef ASSERT | |
| 618 // Overwrite the unused slot with known junk | |
| 619 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); | |
| 304 | 620 __ movptr(Address(rsp, st_off), rax); |
| 0 | 621 #endif /* ASSERT */ |
| 622 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); | |
| 623 } | |
| 624 } | |
| 625 } | |
| 626 | |
| 627 // Schedule the branch target address early. | |
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628 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); |
| 0 | 629 __ jmp(rcx); |
| 630 } | |
| 631 | |
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632 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, |
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633 address code_start, address code_end, |
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634 Label& L_ok) { |
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635 Label L_fail; |
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636 __ lea(temp_reg, ExternalAddress(code_start)); |
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637 __ cmpptr(pc_reg, temp_reg); |
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638 __ jcc(Assembler::belowEqual, L_fail); |
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639 __ lea(temp_reg, ExternalAddress(code_end)); |
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640 __ cmpptr(pc_reg, temp_reg); |
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641 __ jcc(Assembler::below, L_ok); |
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642 __ bind(L_fail); |
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643 } |
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644 |
| 0 | 645 static void gen_i2c_adapter(MacroAssembler *masm, |
| 646 int total_args_passed, | |
| 647 int comp_args_on_stack, | |
| 648 const BasicType *sig_bt, | |
| 649 const VMRegPair *regs) { | |
| 650 | |
| 651 // Note: r13 contains the senderSP on entry. We must preserve it since | |
| 652 // we may do a i2c -> c2i transition if we lose a race where compiled | |
| 653 // code goes non-entrant while we get args ready. | |
| 654 // In addition we use r13 to locate all the interpreter args as | |
| 655 // we must align the stack to 16 bytes on an i2c entry else we | |
| 656 // lose alignment we expect in all compiled code and register | |
| 657 // save code can segv when fxsave instructions find improperly | |
| 658 // aligned stack pointer. | |
| 659 | |
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660 // Adapters can be frameless because they do not require the caller |
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661 // to perform additional cleanup work, such as correcting the stack pointer. |
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662 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
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663 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
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664 // even if a callee has modified the stack pointer. |
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665 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
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666 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
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667 // up via the senderSP register). |
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668 // In other words, if *either* the caller or callee is interpreted, we can |
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669 // get the stack pointer repaired after a call. |
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670 // This is why c2i and i2c adapters cannot be indefinitely composed. |
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671 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
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672 // both caller and callee would be compiled methods, and neither would |
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673 // clean up the stack pointer changes performed by the two adapters. |
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674 // If this happens, control eventually transfers back to the compiled |
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675 // caller, but with an uncorrected stack, causing delayed havoc. |
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676 |
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677 // Pick up the return address |
| 304 | 678 __ movptr(rax, Address(rsp, 0)); |
| 0 | 679 |
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680 if (VerifyAdapterCalls && |
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681 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
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682 // So, let's test for cascading c2i/i2c adapters right now. |
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683 // assert(Interpreter::contains($return_addr) || |
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684 // StubRoutines::contains($return_addr), |
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685 // "i2c adapter must return to an interpreter frame"); |
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686 __ block_comment("verify_i2c { "); |
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687 Label L_ok; |
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688 if (Interpreter::code() != NULL) |
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689 range_check(masm, rax, r11, |
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690 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
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691 L_ok); |
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692 if (StubRoutines::code1() != NULL) |
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693 range_check(masm, rax, r11, |
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694 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
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695 L_ok); |
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696 if (StubRoutines::code2() != NULL) |
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697 range_check(masm, rax, r11, |
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698 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
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699 L_ok); |
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700 const char* msg = "i2c adapter must return to an interpreter frame"; |
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701 __ block_comment(msg); |
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702 __ stop(msg); |
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703 __ bind(L_ok); |
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704 __ block_comment("} verify_i2ce "); |
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705 } |
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706 |
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707 // Must preserve original SP for loading incoming arguments because |
|
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708 // we need to align the outgoing SP for compiled code. |
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709 __ movptr(r11, rsp); |
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710 |
| 0 | 711 // Cut-out for having no stack args. Since up to 2 int/oop args are passed |
| 712 // in registers, we will occasionally have no stack args. | |
| 713 int comp_words_on_stack = 0; | |
| 714 if (comp_args_on_stack) { | |
| 715 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
| 716 // registers are below. By subtracting stack0, we either get a negative | |
| 717 // number (all values in registers) or the maximum stack slot accessed. | |
| 718 | |
| 719 // Convert 4-byte c2 stack slots to words. | |
| 720 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
| 721 // Round up to miminum stack alignment, in wordSize | |
| 722 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
| 304 | 723 __ subptr(rsp, comp_words_on_stack * wordSize); |
| 0 | 724 } |
| 725 | |
| 726 | |
| 727 // Ensure compiled code always sees stack at proper alignment | |
| 304 | 728 __ andptr(rsp, -16); |
| 0 | 729 |
| 730 // push the return address and misalign the stack that youngest frame always sees | |
| 731 // as far as the placement of the call instruction | |
| 304 | 732 __ push(rax); |
| 0 | 733 |
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734 // Put saved SP in another register |
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735 const Register saved_sp = rax; |
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736 __ movptr(saved_sp, r11); |
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737 |
| 0 | 738 // Will jump to the compiled code just as if compiled code was doing it. |
| 739 // Pre-load the register-jump target early, to schedule it better. | |
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740 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset()))); |
| 0 | 741 |
|
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742 #ifdef GRAAL |
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743 // check if this call should be routed towards a specific entry point |
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744 __ cmpptr(Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), 0); |
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745 Label no_alternative_target; |
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746 __ jcc(Assembler::equal, no_alternative_target); |
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747 __ movptr(r11, Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset()))); |
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748 __ movptr(Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), 0); |
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749 __ bind(no_alternative_target); |
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750 #endif |
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|
751 |
| 0 | 752 // Now generate the shuffle code. Pick up all register args and move the |
| 753 // rest through the floating point stack top. | |
| 754 for (int i = 0; i < total_args_passed; i++) { | |
| 755 if (sig_bt[i] == T_VOID) { | |
| 756 // Longs and doubles are passed in native word order, but misaligned | |
| 757 // in the 32-bit build. | |
| 758 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 759 continue; | |
| 760 } | |
| 761 | |
| 762 // Pick up 0, 1 or 2 words from SP+offset. | |
| 763 | |
| 764 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
| 765 "scrambled load targets?"); | |
| 766 // Load in argument order going down. | |
| 1506 | 767 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
| 0 | 768 // Point to interpreter value (vs. tag) |
| 1506 | 769 int next_off = ld_off - Interpreter::stackElementSize; |
| 0 | 770 // |
| 771 // | |
| 772 // | |
| 773 VMReg r_1 = regs[i].first(); | |
| 774 VMReg r_2 = regs[i].second(); | |
| 775 if (!r_1->is_valid()) { | |
| 776 assert(!r_2->is_valid(), ""); | |
| 777 continue; | |
| 778 } | |
| 779 if (r_1->is_stack()) { | |
| 780 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
| 781 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
|
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782 |
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783 // We can use r13 as a temp here because compiled code doesn't need r13 as an input |
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784 // and if we end up going thru a c2i because of a miss a reasonable value of r13 |
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785 // will be generated. |
| 0 | 786 if (!r_2->is_valid()) { |
| 787 // sign extend??? | |
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788 __ movl(r13, Address(saved_sp, ld_off)); |
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789 __ movptr(Address(rsp, st_off), r13); |
| 0 | 790 } else { |
| 791 // | |
| 792 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 793 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 794 // So we must adjust where to pick up the data to match the interpreter. | |
| 795 // | |
| 796 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
| 797 // are accessed as negative so LSW is at LOW address | |
| 798 | |
| 799 // ld_off is MSW so get LSW | |
| 800 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 801 next_off : ld_off; | |
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802 __ movq(r13, Address(saved_sp, offset)); |
| 0 | 803 // st_off is LSW (i.e. reg.first()) |
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804 __ movq(Address(rsp, st_off), r13); |
| 0 | 805 } |
| 806 } else if (r_1->is_Register()) { // Register argument | |
| 807 Register r = r_1->as_Register(); | |
| 808 assert(r != rax, "must be different"); | |
| 809 if (r_2->is_valid()) { | |
| 810 // | |
| 811 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 812 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 813 // So we must adjust where to pick up the data to match the interpreter. | |
| 814 | |
| 815 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 816 next_off : ld_off; | |
| 817 | |
| 818 // this can be a misaligned move | |
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819 __ movq(r, Address(saved_sp, offset)); |
| 0 | 820 } else { |
| 821 // sign extend and use a full word? | |
|
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822 __ movl(r, Address(saved_sp, ld_off)); |
| 0 | 823 } |
| 824 } else { | |
| 825 if (!r_2->is_valid()) { | |
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826 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); |
| 0 | 827 } else { |
|
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828 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); |
| 0 | 829 } |
| 830 } | |
| 831 } | |
| 832 | |
| 833 // 6243940 We might end up in handle_wrong_method if | |
| 834 // the callee is deoptimized as we race thru here. If that | |
| 835 // happens we don't want to take a safepoint because the | |
| 836 // caller frame will look interpreted and arguments are now | |
| 837 // "compiled" so it is much better to make this transition | |
| 838 // invisible to the stack walking code. Unfortunately if | |
| 839 // we try and find the callee by normal means a safepoint | |
| 840 // is possible. So we stash the desired callee in the thread | |
| 841 // and the vm will find there should this case occur. | |
| 842 | |
| 304 | 843 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); |
| 0 | 844 |
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845 // put Method* where a c2i would expect should we end up there |
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846 // only needed becaus eof c2 resolve stubs return Method* as a result in |
| 0 | 847 // rax |
| 304 | 848 __ mov(rax, rbx); |
| 0 | 849 __ jmp(r11); |
| 850 } | |
| 851 | |
| 852 // --------------------------------------------------------------- | |
| 853 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
| 854 int total_args_passed, | |
| 855 int comp_args_on_stack, | |
| 856 const BasicType *sig_bt, | |
|
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857 const VMRegPair *regs, |
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858 AdapterFingerPrint* fingerprint) { |
| 0 | 859 address i2c_entry = __ pc(); |
| 860 | |
| 861 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
| 862 | |
| 863 // ------------------------------------------------------------------------- | |
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864 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls |
| 0 | 865 // to the interpreter. The args start out packed in the compiled layout. They |
| 866 // need to be unpacked into the interpreter layout. This will almost always | |
| 867 // require some stack space. We grow the current (compiled) stack, then repack | |
| 868 // the args. We finally end in a jump to the generic interpreter entry point. | |
| 869 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
| 870 // compiled code, which relys solely on SP and not RBP, get sick). | |
| 871 | |
| 872 address c2i_unverified_entry = __ pc(); | |
| 873 Label skip_fixup; | |
| 874 Label ok; | |
| 875 | |
| 876 Register holder = rax; | |
| 877 Register receiver = j_rarg0; | |
| 878 Register temp = rbx; | |
| 879 | |
| 880 { | |
|
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881 __ load_klass(temp, receiver); |
|
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882 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); |
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883 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); |
| 0 | 884 __ jcc(Assembler::equal, ok); |
| 885 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 886 | |
| 887 __ bind(ok); | |
| 888 // Method might have been compiled since the call site was patched to | |
| 889 // interpreted if that is the case treat it as a miss so we can get | |
| 890 // the call site corrected. | |
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891 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
| 0 | 892 __ jcc(Assembler::equal, skip_fixup); |
| 893 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 894 } | |
| 895 | |
| 896 address c2i_entry = __ pc(); | |
| 897 | |
| 898 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
| 899 | |
| 900 __ flush(); | |
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901 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
| 0 | 902 } |
| 903 | |
| 904 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
| 905 VMRegPair *regs, | |
| 906 int total_args_passed) { | |
| 907 // We return the amount of VMRegImpl stack slots we need to reserve for all | |
| 908 // the arguments NOT counting out_preserve_stack_slots. | |
| 909 | |
| 910 // NOTE: These arrays will have to change when c1 is ported | |
| 911 #ifdef _WIN64 | |
| 912 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
| 913 c_rarg0, c_rarg1, c_rarg2, c_rarg3 | |
| 914 }; | |
| 915 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
| 916 c_farg0, c_farg1, c_farg2, c_farg3 | |
| 917 }; | |
| 918 #else | |
| 919 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
| 920 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 | |
| 921 }; | |
| 922 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
| 923 c_farg0, c_farg1, c_farg2, c_farg3, | |
| 924 c_farg4, c_farg5, c_farg6, c_farg7 | |
| 925 }; | |
| 926 #endif // _WIN64 | |
| 927 | |
| 928 | |
| 929 uint int_args = 0; | |
| 930 uint fp_args = 0; | |
| 931 uint stk_args = 0; // inc by 2 each time | |
| 932 | |
| 933 for (int i = 0; i < total_args_passed; i++) { | |
| 934 switch (sig_bt[i]) { | |
| 935 case T_BOOLEAN: | |
| 936 case T_CHAR: | |
| 937 case T_BYTE: | |
| 938 case T_SHORT: | |
| 939 case T_INT: | |
| 940 if (int_args < Argument::n_int_register_parameters_c) { | |
| 941 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
| 942 #ifdef _WIN64 | |
| 943 fp_args++; | |
| 944 // Allocate slots for callee to stuff register args the stack. | |
| 945 stk_args += 2; | |
| 946 #endif | |
| 947 } else { | |
| 948 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 949 stk_args += 2; | |
| 950 } | |
| 951 break; | |
| 952 case T_LONG: | |
| 953 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 954 // fall through | |
| 955 case T_OBJECT: | |
| 956 case T_ARRAY: | |
| 957 case T_ADDRESS: | |
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958 case T_METADATA: |
| 0 | 959 if (int_args < Argument::n_int_register_parameters_c) { |
| 960 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
| 961 #ifdef _WIN64 | |
| 962 fp_args++; | |
| 963 stk_args += 2; | |
| 964 #endif | |
| 965 } else { | |
| 966 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 967 stk_args += 2; | |
| 968 } | |
| 969 break; | |
| 970 case T_FLOAT: | |
| 971 if (fp_args < Argument::n_float_register_parameters_c) { | |
| 972 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 973 #ifdef _WIN64 | |
| 974 int_args++; | |
| 975 // Allocate slots for callee to stuff register args the stack. | |
| 976 stk_args += 2; | |
| 977 #endif | |
| 978 } else { | |
| 979 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 980 stk_args += 2; | |
| 981 } | |
| 982 break; | |
| 983 case T_DOUBLE: | |
| 984 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 985 if (fp_args < Argument::n_float_register_parameters_c) { | |
| 986 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 987 #ifdef _WIN64 | |
| 988 int_args++; | |
| 989 // Allocate slots for callee to stuff register args the stack. | |
| 990 stk_args += 2; | |
| 991 #endif | |
| 992 } else { | |
| 993 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 994 stk_args += 2; | |
| 995 } | |
| 996 break; | |
| 997 case T_VOID: // Halves of longs and doubles | |
| 998 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
| 999 regs[i].set_bad(); | |
| 1000 break; | |
| 1001 default: | |
| 1002 ShouldNotReachHere(); | |
| 1003 break; | |
| 1004 } | |
| 1005 } | |
| 1006 #ifdef _WIN64 | |
| 1007 // windows abi requires that we always allocate enough stack space | |
| 1008 // for 4 64bit registers to be stored down. | |
| 1009 if (stk_args < 8) { | |
| 1010 stk_args = 8; | |
| 1011 } | |
| 1012 #endif // _WIN64 | |
| 1013 | |
| 1014 return stk_args; | |
| 1015 } | |
| 1016 | |
| 1017 // On 64 bit we will store integer like items to the stack as | |
| 1018 // 64 bits items (sparc abi) even though java would only store | |
| 1019 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
| 1020 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
| 1021 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1022 if (src.first()->is_stack()) { | |
| 1023 if (dst.first()->is_stack()) { | |
| 1024 // stack to stack | |
| 1025 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 1026 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1027 } else { | |
| 1028 // stack to reg | |
| 1029 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); | |
| 1030 } | |
| 1031 } else if (dst.first()->is_stack()) { | |
| 1032 // reg to stack | |
| 1033 // Do we really have to sign extend??? | |
| 1034 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); | |
| 1035 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
| 1036 } else { | |
| 1037 // Do we really have to sign extend??? | |
| 1038 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); | |
| 1039 if (dst.first() != src.first()) { | |
| 1040 __ movq(dst.first()->as_Register(), src.first()->as_Register()); | |
| 1041 } | |
| 1042 } | |
| 1043 } | |
| 1044 | |
|
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1045 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
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1046 if (src.first()->is_stack()) { |
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1047 if (dst.first()->is_stack()) { |
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1048 // stack to stack |
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1049 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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1050 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); |
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1051 } else { |
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1052 // stack to reg |
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1053 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
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1054 } |
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1055 } else if (dst.first()->is_stack()) { |
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1056 // reg to stack |
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1057 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); |
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1058 } else { |
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1059 if (dst.first() != src.first()) { |
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1060 __ movq(dst.first()->as_Register(), src.first()->as_Register()); |
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1061 } |
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1062 } |
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1063 } |
| 0 | 1064 |
| 1065 // An oop arg. Must pass a handle not the oop itself | |
| 1066 static void object_move(MacroAssembler* masm, | |
| 1067 OopMap* map, | |
| 1068 int oop_handle_offset, | |
| 1069 int framesize_in_slots, | |
| 1070 VMRegPair src, | |
| 1071 VMRegPair dst, | |
| 1072 bool is_receiver, | |
| 1073 int* receiver_offset) { | |
| 1074 | |
| 1075 // must pass a handle. First figure out the location we use as a handle | |
| 1076 | |
| 1077 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); | |
| 1078 | |
| 1079 // See if oop is NULL if it is we need no handle | |
| 1080 | |
| 1081 if (src.first()->is_stack()) { | |
| 1082 | |
| 1083 // Oop is already on the stack as an argument | |
| 1084 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
| 1085 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
| 1086 if (is_receiver) { | |
| 1087 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
| 1088 } | |
| 1089 | |
| 304 | 1090 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); |
| 1091 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); | |
| 0 | 1092 // conditionally move a NULL |
| 304 | 1093 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); |
| 0 | 1094 } else { |
| 1095 | |
| 1096 // Oop is in an a register we must store it to the space we reserve | |
| 1097 // on the stack for oop_handles and pass a handle if oop is non-NULL | |
| 1098 | |
| 1099 const Register rOop = src.first()->as_Register(); | |
| 1100 int oop_slot; | |
| 1101 if (rOop == j_rarg0) | |
| 1102 oop_slot = 0; | |
| 1103 else if (rOop == j_rarg1) | |
| 1104 oop_slot = 1; | |
| 1105 else if (rOop == j_rarg2) | |
| 1106 oop_slot = 2; | |
| 1107 else if (rOop == j_rarg3) | |
| 1108 oop_slot = 3; | |
| 1109 else if (rOop == j_rarg4) | |
| 1110 oop_slot = 4; | |
| 1111 else { | |
| 1112 assert(rOop == j_rarg5, "wrong register"); | |
| 1113 oop_slot = 5; | |
| 1114 } | |
| 1115 | |
| 1116 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; | |
| 1117 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
| 1118 | |
| 1119 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
| 1120 // Store oop in handle area, may be NULL | |
| 304 | 1121 __ movptr(Address(rsp, offset), rOop); |
| 0 | 1122 if (is_receiver) { |
| 1123 *receiver_offset = offset; | |
| 1124 } | |
| 1125 | |
| 304 | 1126 __ cmpptr(rOop, (int32_t)NULL_WORD); |
| 1127 __ lea(rHandle, Address(rsp, offset)); | |
| 0 | 1128 // conditionally move a NULL from the handle area where it was just stored |
| 304 | 1129 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); |
| 0 | 1130 } |
| 1131 | |
| 1132 // If arg is on the stack then place it otherwise it is already in correct reg. | |
| 1133 if (dst.first()->is_stack()) { | |
| 304 | 1134 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
| 0 | 1135 } |
| 1136 } | |
| 1137 | |
| 1138 // A float arg may have to do float reg int reg conversion | |
| 1139 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1140 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
| 1141 | |
| 1142 // The calling conventions assures us that each VMregpair is either | |
| 1143 // all really one physical register or adjacent stack slots. | |
| 1144 // This greatly simplifies the cases here compared to sparc. | |
| 1145 | |
| 1146 if (src.first()->is_stack()) { | |
| 1147 if (dst.first()->is_stack()) { | |
| 1148 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 304 | 1149 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
| 0 | 1150 } else { |
| 1151 // stack to reg | |
| 1152 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
| 1153 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); | |
| 1154 } | |
| 1155 } else if (dst.first()->is_stack()) { | |
| 1156 // reg to stack | |
| 1157 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
| 1158 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1159 } else { | |
| 1160 // reg to reg | |
| 1161 // In theory these overlap but the ordering is such that this is likely a nop | |
| 1162 if ( src.first() != dst.first()) { | |
| 1163 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
| 1164 } | |
| 1165 } | |
| 1166 } | |
| 1167 | |
| 1168 // A long move | |
| 1169 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1170 | |
| 1171 // The calling conventions assures us that each VMregpair is either | |
| 1172 // all really one physical register or adjacent stack slots. | |
| 1173 // This greatly simplifies the cases here compared to sparc. | |
| 1174 | |
| 1175 if (src.is_single_phys_reg() ) { | |
| 1176 if (dst.is_single_phys_reg()) { | |
| 1177 if (dst.first() != src.first()) { | |
| 304 | 1178 __ mov(dst.first()->as_Register(), src.first()->as_Register()); |
| 0 | 1179 } |
| 1180 } else { | |
| 1181 assert(dst.is_single_reg(), "not a stack pair"); | |
| 1182 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
| 1183 } | |
| 1184 } else if (dst.is_single_phys_reg()) { | |
| 1185 assert(src.is_single_reg(), "not a stack pair"); | |
| 1186 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); | |
| 1187 } else { | |
| 1188 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
| 1189 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 1190 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1191 } | |
| 1192 } | |
| 1193 | |
| 1194 // A double move | |
| 1195 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1196 | |
| 1197 // The calling conventions assures us that each VMregpair is either | |
| 1198 // all really one physical register or adjacent stack slots. | |
| 1199 // This greatly simplifies the cases here compared to sparc. | |
| 1200 | |
| 1201 if (src.is_single_phys_reg() ) { | |
| 1202 if (dst.is_single_phys_reg()) { | |
| 1203 // In theory these overlap but the ordering is such that this is likely a nop | |
| 1204 if ( src.first() != dst.first()) { | |
| 1205 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
| 1206 } | |
| 1207 } else { | |
| 1208 assert(dst.is_single_reg(), "not a stack pair"); | |
| 1209 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1210 } | |
| 1211 } else if (dst.is_single_phys_reg()) { | |
| 1212 assert(src.is_single_reg(), "not a stack pair"); | |
| 1213 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); | |
| 1214 } else { | |
| 1215 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
| 1216 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 1217 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1218 } | |
| 1219 } | |
| 1220 | |
| 1221 | |
| 1222 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1223 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1224 // which by this time is free to use | |
| 1225 switch (ret_type) { | |
| 1226 case T_FLOAT: | |
| 1227 __ movflt(Address(rbp, -wordSize), xmm0); | |
| 1228 break; | |
| 1229 case T_DOUBLE: | |
| 1230 __ movdbl(Address(rbp, -wordSize), xmm0); | |
| 1231 break; | |
| 1232 case T_VOID: break; | |
| 1233 default: { | |
| 304 | 1234 __ movptr(Address(rbp, -wordSize), rax); |
| 0 | 1235 } |
| 1236 } | |
| 1237 } | |
| 1238 | |
| 1239 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1240 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1241 // which by this time is free to use | |
| 1242 switch (ret_type) { | |
| 1243 case T_FLOAT: | |
| 1244 __ movflt(xmm0, Address(rbp, -wordSize)); | |
| 1245 break; | |
| 1246 case T_DOUBLE: | |
| 1247 __ movdbl(xmm0, Address(rbp, -wordSize)); | |
| 1248 break; | |
| 1249 case T_VOID: break; | |
| 1250 default: { | |
| 304 | 1251 __ movptr(rax, Address(rbp, -wordSize)); |
| 0 | 1252 } |
| 1253 } | |
| 1254 } | |
| 1255 | |
| 1256 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
| 1257 for ( int i = first_arg ; i < arg_count ; i++ ) { | |
| 1258 if (args[i].first()->is_Register()) { | |
| 304 | 1259 __ push(args[i].first()->as_Register()); |
| 0 | 1260 } else if (args[i].first()->is_XMMRegister()) { |
| 304 | 1261 __ subptr(rsp, 2*wordSize); |
| 0 | 1262 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); |
| 1263 } | |
| 1264 } | |
| 1265 } | |
| 1266 | |
| 1267 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
| 1268 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { | |
| 1269 if (args[i].first()->is_Register()) { | |
| 304 | 1270 __ pop(args[i].first()->as_Register()); |
| 0 | 1271 } else if (args[i].first()->is_XMMRegister()) { |
| 1272 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); | |
| 304 | 1273 __ addptr(rsp, 2*wordSize); |
| 0 | 1274 } |
| 1275 } | |
| 1276 } | |
| 1277 | |
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1278 |
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1279 static void save_or_restore_arguments(MacroAssembler* masm, |
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1280 const int stack_slots, |
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1281 const int total_in_args, |
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1282 const int arg_save_area, |
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1283 OopMap* map, |
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1284 VMRegPair* in_regs, |
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1285 BasicType* in_sig_bt) { |
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1286 // if map is non-NULL then the code should store the values, |
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1287 // otherwise it should load them. |
| 5905 | 1288 int slot = arg_save_area; |
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1289 // Save down double word first |
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1290 for ( int i = 0; i < total_in_args; i++) { |
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1291 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1292 int offset = slot * VMRegImpl::stack_slot_size; |
| 5905 | 1293 slot += VMRegImpl::slots_per_word; |
| 1294 assert(slot <= stack_slots, "overflow"); | |
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1295 if (map != NULL) { |
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1296 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1297 } else { |
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1298 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1299 } |
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1300 } |
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1301 if (in_regs[i].first()->is_Register() && |
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1302 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) { |
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1303 int offset = slot * VMRegImpl::stack_slot_size; |
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1304 if (map != NULL) { |
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1305 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1306 if (in_sig_bt[i] == T_ARRAY) { |
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1307 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1308 } |
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1309 } else { |
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1310 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1311 } |
| 5907 | 1312 slot += VMRegImpl::slots_per_word; |
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1313 } |
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1314 } |
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1315 // Save or restore single word registers |
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1316 for ( int i = 0; i < total_in_args; i++) { |
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1317 if (in_regs[i].first()->is_Register()) { |
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1318 int offset = slot * VMRegImpl::stack_slot_size; |
| 5905 | 1319 slot++; |
| 1320 assert(slot <= stack_slots, "overflow"); | |
|
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1321 |
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1322 // Value is in an input register pass we must flush it to the stack |
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1323 const Register reg = in_regs[i].first()->as_Register(); |
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1324 switch (in_sig_bt[i]) { |
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1325 case T_BOOLEAN: |
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1326 case T_CHAR: |
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1327 case T_BYTE: |
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1328 case T_SHORT: |
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1329 case T_INT: |
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1330 if (map != NULL) { |
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1331 __ movl(Address(rsp, offset), reg); |
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1332 } else { |
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1333 __ movl(reg, Address(rsp, offset)); |
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1334 } |
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1335 break; |
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1336 case T_ARRAY: |
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1337 case T_LONG: |
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1338 // handled above |
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1339 break; |
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1340 case T_OBJECT: |
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1341 default: ShouldNotReachHere(); |
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1342 } |
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1343 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1344 if (in_sig_bt[i] == T_FLOAT) { |
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1345 int offset = slot * VMRegImpl::stack_slot_size; |
| 5905 | 1346 slot++; |
| 1347 assert(slot <= stack_slots, "overflow"); | |
|
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1348 if (map != NULL) { |
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1349 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1350 } else { |
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1351 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1352 } |
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1353 } |
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1354 } else if (in_regs[i].first()->is_stack()) { |
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1355 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1356 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
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1357 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
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1358 } |
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1359 } |
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1360 } |
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1361 } |
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1362 |
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1363 |
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1364 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
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1365 // keeps a new JNI critical region from starting until a GC has been |
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1366 // forced. Save down any oops in registers and describe them in an |
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1367 // OopMap. |
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1368 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
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1369 int stack_slots, |
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1370 int total_c_args, |
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1371 int total_in_args, |
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1372 int arg_save_area, |
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1373 OopMapSet* oop_maps, |
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1374 VMRegPair* in_regs, |
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1375 BasicType* in_sig_bt) { |
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1376 __ block_comment("check GC_locker::needs_gc"); |
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1377 Label cont; |
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1378 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
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1379 __ jcc(Assembler::equal, cont); |
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1380 |
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1381 // Save down any incoming oops and call into the runtime to halt for a GC |
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1382 |
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1383 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1384 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1385 arg_save_area, map, in_regs, in_sig_bt); |
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1386 |
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1387 address the_pc = __ pc(); |
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1388 oop_maps->add_gc_map( __ offset(), map); |
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1389 __ set_last_Java_frame(rsp, noreg, the_pc); |
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1390 |
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1391 __ block_comment("block_for_jni_critical"); |
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1392 __ movptr(c_rarg0, r15_thread); |
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1393 __ mov(r12, rsp); // remember sp |
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1394 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows |
|
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1395 __ andptr(rsp, -16); // align stack as required by ABI |
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1396 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
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1397 __ mov(rsp, r12); // restore sp |
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1398 __ reinit_heapbase(); |
|
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1399 |
|
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1400 __ reset_last_Java_frame(false, true); |
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1401 |
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1402 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1403 arg_save_area, NULL, in_regs, in_sig_bt); |
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1404 |
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1405 __ bind(cont); |
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1406 #ifdef ASSERT |
|
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1407 if (StressCriticalJNINatives) { |
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1408 // Stress register saving |
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1409 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1410 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1411 arg_save_area, map, in_regs, in_sig_bt); |
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1412 // Destroy argument registers |
|
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1413 for (int i = 0; i < total_in_args - 1; i++) { |
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1414 if (in_regs[i].first()->is_Register()) { |
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1415 const Register reg = in_regs[i].first()->as_Register(); |
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1416 __ xorptr(reg, reg); |
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1417 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1418 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1419 } else if (in_regs[i].first()->is_FloatRegister()) { |
|
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1420 ShouldNotReachHere(); |
|
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1421 } else if (in_regs[i].first()->is_stack()) { |
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1422 // Nothing to do |
|
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1423 } else { |
|
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1424 ShouldNotReachHere(); |
|
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1425 } |
|
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1426 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
|
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1427 i++; |
|
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1428 } |
|
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|
1429 } |
|
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|
1430 |
|
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|
1431 save_or_restore_arguments(masm, stack_slots, total_in_args, |
|
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1432 arg_save_area, NULL, in_regs, in_sig_bt); |
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1433 } |
|
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|
1434 #endif |
|
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1435 } |
|
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|
1436 |
|
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|
1437 // Unpack an array argument into a pointer to the body and the length |
|
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|
1438 // if the array is non-null, otherwise pass 0 for both. |
|
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|
1439 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
|
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1440 Register tmp_reg = rax; |
|
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|
1441 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
|
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1442 "possible collision"); |
|
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1443 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
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1444 "possible collision"); |
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1445 |
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1446 __ block_comment("unpack_array_argument {"); |
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1447 |
|
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1448 // Pass the length, ptr pair |
|
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1449 Label is_null, done; |
|
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1450 VMRegPair tmp; |
|
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1451 tmp.set_ptr(tmp_reg->as_VMReg()); |
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1452 if (reg.first()->is_stack()) { |
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1453 // Load the arg up from the stack |
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1454 move_ptr(masm, reg, tmp); |
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1455 reg = tmp; |
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1456 } |
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1457 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1458 __ jccb(Assembler::equal, is_null); |
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1459 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1460 move_ptr(masm, tmp, body_arg); |
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1461 // load the length relative to the body. |
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1462 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
|
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1463 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1464 move32_64(masm, tmp, length_arg); |
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1465 __ jmpb(done); |
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1466 __ bind(is_null); |
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1467 // Pass zeros |
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1468 __ xorptr(tmp_reg, tmp_reg); |
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1469 move_ptr(masm, tmp, body_arg); |
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1470 move32_64(masm, tmp, length_arg); |
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1471 __ bind(done); |
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1472 |
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1473 __ block_comment("} unpack_array_argument"); |
|
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1474 } |
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1475 |
| 5905 | 1476 |
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1477 // Different signatures may require very different orders for the move |
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1478 // to avoid clobbering other arguments. There's no simple way to |
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1479 // order them safely. Compute a safe order for issuing stores and |
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1480 // break any cycles in those stores. This code is fairly general but |
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1481 // it's not necessary on the other platforms so we keep it in the |
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1482 // platform dependent code instead of moving it into a shared file. |
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1483 // (See bugs 7013347 & 7145024.) |
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1484 // Note that this code is specific to LP64. |
| 5905 | 1485 class ComputeMoveOrder: public StackObj { |
| 1486 class MoveOperation: public ResourceObj { | |
| 1487 friend class ComputeMoveOrder; | |
| 1488 private: | |
| 1489 VMRegPair _src; | |
| 1490 VMRegPair _dst; | |
| 1491 int _src_index; | |
| 1492 int _dst_index; | |
| 1493 bool _processed; | |
| 1494 MoveOperation* _next; | |
| 1495 MoveOperation* _prev; | |
| 1496 | |
| 1497 static int get_id(VMRegPair r) { | |
| 1498 return r.first()->value(); | |
| 1499 } | |
| 1500 | |
| 1501 public: | |
| 1502 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst): | |
| 1503 _src(src) | |
| 1504 , _src_index(src_index) | |
| 1505 , _dst(dst) | |
| 1506 , _dst_index(dst_index) | |
| 1507 , _next(NULL) | |
| 1508 , _prev(NULL) | |
| 1509 , _processed(false) { | |
| 1510 } | |
| 1511 | |
| 1512 VMRegPair src() const { return _src; } | |
| 1513 int src_id() const { return get_id(src()); } | |
| 1514 int src_index() const { return _src_index; } | |
| 1515 VMRegPair dst() const { return _dst; } | |
| 1516 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; } | |
| 1517 int dst_index() const { return _dst_index; } | |
| 1518 int dst_id() const { return get_id(dst()); } | |
| 1519 MoveOperation* next() const { return _next; } | |
| 1520 MoveOperation* prev() const { return _prev; } | |
| 1521 void set_processed() { _processed = true; } | |
| 1522 bool is_processed() const { return _processed; } | |
| 1523 | |
| 1524 // insert | |
| 1525 void break_cycle(VMRegPair temp_register) { | |
| 1526 // create a new store following the last store | |
| 1527 // to move from the temp_register to the original | |
| 1528 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst()); | |
| 1529 | |
| 1530 // break the cycle of links and insert new_store at the end | |
| 1531 // break the reverse link. | |
| 1532 MoveOperation* p = prev(); | |
| 1533 assert(p->next() == this, "must be"); | |
| 1534 _prev = NULL; | |
| 1535 p->_next = new_store; | |
| 1536 new_store->_prev = p; | |
| 1537 | |
| 1538 // change the original store to save it's value in the temp. | |
| 1539 set_dst(-1, temp_register); | |
| 1540 } | |
| 1541 | |
| 1542 void link(GrowableArray<MoveOperation*>& killer) { | |
| 1543 // link this store in front the store that it depends on | |
| 1544 MoveOperation* n = killer.at_grow(src_id(), NULL); | |
| 1545 if (n != NULL) { | |
| 1546 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet"); | |
| 1547 _next = n; | |
| 1548 n->_prev = this; | |
| 1549 } | |
| 1550 } | |
| 1551 }; | |
| 1552 | |
| 1553 private: | |
| 1554 GrowableArray<MoveOperation*> edges; | |
| 1555 | |
| 1556 public: | |
| 1557 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs, | |
| 1558 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { | |
| 1559 // Move operations where the dest is the stack can all be | |
| 1560 // scheduled first since they can't interfere with the other moves. | |
| 1561 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
| 1562 if (in_sig_bt[i] == T_ARRAY) { | |
| 1563 c_arg--; | |
| 1564 if (out_regs[c_arg].first()->is_stack() && | |
| 1565 out_regs[c_arg + 1].first()->is_stack()) { | |
| 1566 arg_order.push(i); | |
| 1567 arg_order.push(c_arg); | |
| 1568 } else { | |
| 1569 if (out_regs[c_arg].first()->is_stack() || | |
| 1570 in_regs[i].first() == out_regs[c_arg].first()) { | |
| 1571 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]); | |
| 1572 } else { | |
| 1573 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
| 1574 } | |
| 1575 } | |
| 1576 } else if (in_sig_bt[i] == T_VOID) { | |
| 1577 arg_order.push(i); | |
| 1578 arg_order.push(c_arg); | |
| 1579 } else { | |
| 1580 if (out_regs[c_arg].first()->is_stack() || | |
| 1581 in_regs[i].first() == out_regs[c_arg].first()) { | |
| 1582 arg_order.push(i); | |
| 1583 arg_order.push(c_arg); | |
| 1584 } else { | |
| 1585 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
| 1586 } | |
| 1587 } | |
| 1588 } | |
| 1589 // Break any cycles in the register moves and emit the in the | |
| 1590 // proper order. | |
| 1591 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg); | |
| 1592 for (int i = 0; i < stores->length(); i++) { | |
| 1593 arg_order.push(stores->at(i)->src_index()); | |
| 1594 arg_order.push(stores->at(i)->dst_index()); | |
| 1595 } | |
| 1596 } | |
| 1597 | |
| 1598 // Collected all the move operations | |
| 1599 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { | |
| 1600 if (src.first() == dst.first()) return; | |
| 1601 edges.append(new MoveOperation(src_index, src, dst_index, dst)); | |
| 1602 } | |
| 1603 | |
| 1604 // Walk the edges breaking cycles between moves. The result list | |
| 1605 // can be walked in order to produce the proper set of loads | |
| 1606 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { | |
| 1607 // Record which moves kill which values | |
| 1608 GrowableArray<MoveOperation*> killer; | |
| 1609 for (int i = 0; i < edges.length(); i++) { | |
| 1610 MoveOperation* s = edges.at(i); | |
| 1611 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer"); | |
| 1612 killer.at_put_grow(s->dst_id(), s, NULL); | |
| 1613 } | |
| 1614 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL, | |
| 1615 "make sure temp isn't in the registers that are killed"); | |
| 1616 | |
| 1617 // create links between loads and stores | |
| 1618 for (int i = 0; i < edges.length(); i++) { | |
| 1619 edges.at(i)->link(killer); | |
| 1620 } | |
| 1621 | |
| 1622 // at this point, all the move operations are chained together | |
| 1623 // in a doubly linked list. Processing it backwards finds | |
| 1624 // the beginning of the chain, forwards finds the end. If there's | |
| 1625 // a cycle it can be broken at any point, so pick an edge and walk | |
| 1626 // backward until the list ends or we end where we started. | |
| 1627 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>(); | |
| 1628 for (int e = 0; e < edges.length(); e++) { | |
| 1629 MoveOperation* s = edges.at(e); | |
| 1630 if (!s->is_processed()) { | |
| 1631 MoveOperation* start = s; | |
| 1632 // search for the beginning of the chain or cycle | |
| 1633 while (start->prev() != NULL && start->prev() != s) { | |
| 1634 start = start->prev(); | |
| 1635 } | |
| 1636 if (start->prev() == s) { | |
| 1637 start->break_cycle(temp_register); | |
| 1638 } | |
| 1639 // walk the chain forward inserting to store list | |
| 1640 while (start != NULL) { | |
| 1641 stores->append(start); | |
| 1642 start->set_processed(); | |
| 1643 start = start->next(); | |
| 1644 } | |
| 1645 } | |
| 1646 } | |
| 1647 return stores; | |
| 1648 } | |
| 1649 }; | |
| 1650 | |
|
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1651 static void verify_oop_args(MacroAssembler* masm, |
|
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1652 methodHandle method, |
|
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1653 const BasicType* sig_bt, |
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1654 const VMRegPair* regs) { |
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1655 Register temp_reg = rbx; // not part of any compiled calling seq |
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1656 if (VerifyOops) { |
|
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1657 for (int i = 0; i < method->size_of_parameters(); i++) { |
|
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1658 if (sig_bt[i] == T_OBJECT || |
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1659 sig_bt[i] == T_ARRAY) { |
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1660 VMReg r = regs[i].first(); |
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1661 assert(r->is_valid(), "bad oop arg"); |
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1662 if (r->is_stack()) { |
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1663 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
|
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1664 __ verify_oop(temp_reg); |
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1665 } else { |
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1666 __ verify_oop(r->as_Register()); |
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1667 } |
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1668 } |
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1669 } |
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1670 } |
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1671 } |
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1672 |
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1673 static void gen_special_dispatch(MacroAssembler* masm, |
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1674 methodHandle method, |
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1675 const BasicType* sig_bt, |
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1676 const VMRegPair* regs) { |
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1677 verify_oop_args(masm, method, sig_bt, regs); |
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1678 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1679 |
|
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1680 #ifdef GRAAL |
|
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1681 if (iid == vmIntrinsics::_CompilerToVMImpl_executeCompiledMethod) { |
|
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1682 // We are called from compiled code here. The three object arguments |
|
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1683 // are already in the correct registers (j_rarg0, jrarg1, jrarg2). The |
|
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1684 // fourth argument (j_rarg3) is a pointer to the HotSpotInstalledCode object. |
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1685 |
|
3489047ffea2
Restructure the handling of HotSpotInstalledCode and their link to nmethods.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
10409
diff
changeset
|
1686 // Load the nmethod pointer from the HotSpotInstalledCode object |
|
10560
0b1b5356b566
Fixed issues around execute compiled code stub. Made TraceDeoptimization a product flag.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
10479
diff
changeset
|
1687 __ movq(j_rarg4, Address(j_rarg3, sizeof(oopDesc))); |
|
10475
3489047ffea2
Restructure the handling of HotSpotInstalledCode and their link to nmethods.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
10409
diff
changeset
|
1688 |
|
3489047ffea2
Restructure the handling of HotSpotInstalledCode and their link to nmethods.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
10409
diff
changeset
|
1689 // Check whether the nmethod was invalidated |
|
10560
0b1b5356b566
Fixed issues around execute compiled code stub. Made TraceDeoptimization a product flag.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
10479
diff
changeset
|
1690 __ testq(j_rarg4, j_rarg4); |
|
10475
3489047ffea2
Restructure the handling of HotSpotInstalledCode and their link to nmethods.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
10409
diff
changeset
|
1691 Label invalid_nmethod; |
|
3489047ffea2
Restructure the handling of HotSpotInstalledCode and their link to nmethods.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
10409
diff
changeset
|
1692 __ jcc(Assembler::zero, invalid_nmethod); |
|
3489047ffea2
Restructure the handling of HotSpotInstalledCode and their link to nmethods.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
10409
diff
changeset
|
1693 |
|
3489047ffea2
Restructure the handling of HotSpotInstalledCode and their link to nmethods.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
10409
diff
changeset
|
1694 // Perform a tail call to the verified entry point of the nmethod. |
|
10560
0b1b5356b566
Fixed issues around execute compiled code stub. Made TraceDeoptimization a product flag.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
10479
diff
changeset
|
1695 __ jmp(Address(j_rarg4, nmethod::verified_entry_point_offset())); |
|
10475
3489047ffea2
Restructure the handling of HotSpotInstalledCode and their link to nmethods.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
10409
diff
changeset
|
1696 |
|
3489047ffea2
Restructure the handling of HotSpotInstalledCode and their link to nmethods.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
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diff
changeset
|
1697 __ bind(invalid_nmethod); |
|
10479
40b8c383bc31
Throw InvalidInstalledCodeException directly in the stubs.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
10475
diff
changeset
|
1698 |
|
40b8c383bc31
Throw InvalidInstalledCodeException directly in the stubs.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
10475
diff
changeset
|
1699 __ jump(RuntimeAddress(StubRoutines::throw_InvalidInstalledCodeException_entry())); |
|
9025
ff5a32117e02
Implement fast invocation of installed code (direct tail call to the target machine code address).
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
8883
diff
changeset
|
1700 return; |
|
ff5a32117e02
Implement fast invocation of installed code (direct tail call to the target machine code address).
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
8883
diff
changeset
|
1701 } |
|
9046
c6a1ffc707ff
Comments and #ifdef GRAAL for recent changes to C++ code for calling nmethods directly.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
9025
diff
changeset
|
1702 #endif |
|
9025
ff5a32117e02
Implement fast invocation of installed code (direct tail call to the target machine code address).
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
8883
diff
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|
1703 |
|
6266
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|
1704 // Now write the args into the outgoing interpreter space |
|
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|
1705 bool has_receiver = false; |
|
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|
1706 Register receiver_reg = noreg; |
|
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|
1707 int member_arg_pos = -1; |
|
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|
1708 Register member_reg = noreg; |
|
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
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|
1709 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
|
6266
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|
1710 if (ref_kind != 0) { |
|
6790
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|
1711 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
|
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|
1712 member_reg = rbx; // known to be free at this point |
|
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|
1713 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
|
6790
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|
1714 } else if (iid == vmIntrinsics::_invokeBasic) { |
|
6266
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|
1715 has_receiver = true; |
|
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|
1716 } else { |
|
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|
1717 fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
|
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|
1718 } |
|
1d7922586cf6
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|
1719 |
|
1d7922586cf6
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|
1720 if (member_reg != noreg) { |
|
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diff
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|
1721 // Load the member_arg into register, if necessary. |
|
6790
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|
1722 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
|
6266
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|
1723 VMReg r = regs[member_arg_pos].first(); |
|
1d7922586cf6
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|
1724 if (r->is_stack()) { |
|
1d7922586cf6
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|
1725 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
|
1d7922586cf6
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|
1726 } else { |
|
1d7922586cf6
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diff
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|
1727 // no data motion is needed |
|
1d7922586cf6
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|
1728 member_reg = r->as_Register(); |
|
1d7922586cf6
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diff
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|
1729 } |
|
1d7922586cf6
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|
1730 } |
|
1d7922586cf6
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|
1731 |
|
1d7922586cf6
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|
1732 if (has_receiver) { |
|
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|
1733 // Make sure the receiver is loaded into a register. |
|
6790
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|
1734 assert(method->size_of_parameters() > 0, "oob"); |
|
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|
1735 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
|
1d7922586cf6
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|
1736 VMReg r = regs[0].first(); |
|
1d7922586cf6
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|
1737 assert(r->is_valid(), "bad receiver arg"); |
|
1d7922586cf6
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diff
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|
1738 if (r->is_stack()) { |
|
1d7922586cf6
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diff
changeset
|
1739 // Porting note: This assumes that compiled calling conventions always |
|
1d7922586cf6
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parents:
5907
diff
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|
1740 // pass the receiver oop in a register. If this is not true on some |
|
1d7922586cf6
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twisti
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5907
diff
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|
1741 // platform, pick a temp and load the receiver from stack. |
|
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
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parents:
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diff
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|
1742 fatal("receiver always in a register"); |
|
6266
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|
1743 receiver_reg = j_rarg0; // known to be free at this point |
|
1d7922586cf6
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5907
diff
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|
1744 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
|
1d7922586cf6
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parents:
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diff
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|
1745 } else { |
|
1d7922586cf6
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parents:
5907
diff
changeset
|
1746 // no data motion is needed |
|
1d7922586cf6
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parents:
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diff
changeset
|
1747 receiver_reg = r->as_Register(); |
|
1d7922586cf6
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parents:
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diff
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|
1748 } |
|
1d7922586cf6
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twisti
parents:
5907
diff
changeset
|
1749 } |
|
1d7922586cf6
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twisti
parents:
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diff
changeset
|
1750 |
|
1d7922586cf6
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5907
diff
changeset
|
1751 // Figure out which address we are really jumping to: |
|
6790
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7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
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|
1752 MethodHandles::generate_method_handle_dispatch(masm, iid, |
|
6266
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diff
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|
1753 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
|
1d7922586cf6
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diff
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|
1754 } |
| 5905 | 1755 |
| 0 | 1756 // --------------------------------------------------------------------------- |
| 1757 // Generate a native wrapper for a given method. The method takes arguments | |
| 1758 // in the Java compiled code convention, marshals them to the native | |
| 1759 // convention (handlizes oops, etc), transitions to native, makes the call, | |
| 1760 // returns to java state (possibly blocking), unhandlizes any result and | |
| 1761 // returns. | |
|
6266
1d7922586cf6
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diff
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|
1762 // |
|
1d7922586cf6
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5907
diff
changeset
|
1763 // Critical native functions are a shorthand for the use of |
|
1d7922586cf6
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parents:
5907
diff
changeset
|
1764 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
|
1d7922586cf6
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diff
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|
1765 // functions. The wrapper is expected to unpack the arguments before |
|
1d7922586cf6
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diff
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|
1766 // passing them to the callee and perform checks before and after the |
|
1d7922586cf6
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diff
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|
1767 // native call to ensure that they GC_locker |
|
1d7922586cf6
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diff
changeset
|
1768 // lock_critical/unlock_critical semantics are followed. Some other |
|
1d7922586cf6
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diff
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|
1769 // parts of JNI setup are skipped like the tear down of the JNI handle |
|
1d7922586cf6
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diff
changeset
|
1770 // block and the check for pending exceptions it's impossible for them |
|
1d7922586cf6
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diff
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|
1771 // to be thrown. |
|
1d7922586cf6
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parents:
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diff
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|
1772 // |
|
1d7922586cf6
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diff
changeset
|
1773 // They are roughly structured like this: |
|
1d7922586cf6
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diff
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|
1774 // if (GC_locker::needs_gc()) |
|
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|
1775 // SharedRuntime::block_for_jni_critical(); |
|
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|
1776 // tranistion to thread_in_native |
|
1d7922586cf6
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diff
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|
1777 // unpack arrray arguments and call native entry point |
|
1d7922586cf6
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|
1778 // check for safepoint in progress |
|
1d7922586cf6
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changeset
|
1779 // check if any thread suspend flags are set |
|
1d7922586cf6
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|
1780 // call into JVM and possible unlock the JNI critical |
|
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|
1781 // if a GC was suppressed while in the critical native. |
|
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|
1782 // transition back to thread_in_Java |
|
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diff
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|
1783 // return to caller |
|
1d7922586cf6
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|
1784 // |
|
1d7922586cf6
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changeset
|
1785 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
| 0 | 1786 methodHandle method, |
|
2405
3d58a4983660
7022998: JSR 292 recursive method handle calls inline themselves infinitely
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parents:
2245
diff
changeset
|
1787 int compile_id, |
|
6266
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|
1788 BasicType* in_sig_bt, |
|
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|
1789 VMRegPair* in_regs, |
| 0 | 1790 BasicType ret_type) { |
|
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|
1791 if (method->is_method_handle_intrinsic()) { |
|
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|
1792 vmIntrinsics::ID iid = method->intrinsic_id(); |
|
1d7922586cf6
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|
1793 intptr_t start = (intptr_t)__ pc(); |
|
1d7922586cf6
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diff
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|
1794 int vep_offset = ((intptr_t)__ pc()) - start; |
|
1d7922586cf6
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changeset
|
1795 gen_special_dispatch(masm, |
|
6790
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diff
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|
1796 method, |
|
6266
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diff
changeset
|
1797 in_sig_bt, |
|
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diff
changeset
|
1798 in_regs); |
|
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diff
changeset
|
1799 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
|
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|
1800 __ flush(); |
|
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diff
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|
1801 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
|
1d7922586cf6
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|
1802 return nmethod::new_native_nmethod(method, |
|
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|
1803 compile_id, |
|
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1804 masm->code(), |
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1805 vep_offset, |
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1806 frame_complete, |
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1807 stack_slots / VMRegImpl::slots_per_word, |
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1808 in_ByteSize(-1), |
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1809 in_ByteSize(-1), |
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1810 (OopMapSet*)NULL); |
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1811 } |
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1812 bool is_critical_native = true; |
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1813 address native_func = method->critical_native_function(); |
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1814 if (native_func == NULL) { |
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1815 native_func = method->native_function(); |
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1816 is_critical_native = false; |
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1817 } |
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1818 assert(native_func != NULL, "must have function"); |
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1819 |
| 0 | 1820 // An OopMap for lock (and class if static) |
| 1821 OopMapSet *oop_maps = new OopMapSet(); | |
| 1822 intptr_t start = (intptr_t)__ pc(); | |
| 1823 | |
| 1824 // We have received a description of where all the java arg are located | |
| 1825 // on entry to the wrapper. We need to convert these args to where | |
| 1826 // the jni function will expect them. To figure out where they go | |
| 1827 // we convert the java signature to a C signature by inserting | |
| 1828 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
| 1829 | |
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1830 const int total_in_args = method->size_of_parameters(); |
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1831 int total_c_args = total_in_args; |
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1832 if (!is_critical_native) { |
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1833 total_c_args += 1; |
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1834 if (method->is_static()) { |
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1835 total_c_args++; |
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1836 } |
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1837 } else { |
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1838 for (int i = 0; i < total_in_args; i++) { |
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1839 if (in_sig_bt[i] == T_ARRAY) { |
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1840 total_c_args++; |
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1841 } |
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1842 } |
| 0 | 1843 } |
| 1844 | |
| 1845 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
|
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1846 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
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1847 BasicType* in_elem_bt = NULL; |
| 0 | 1848 |
| 1849 int argc = 0; | |
|
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1850 if (!is_critical_native) { |
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1851 out_sig_bt[argc++] = T_ADDRESS; |
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1852 if (method->is_static()) { |
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1853 out_sig_bt[argc++] = T_OBJECT; |
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1854 } |
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1855 |
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1856 for (int i = 0; i < total_in_args ; i++ ) { |
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1857 out_sig_bt[argc++] = in_sig_bt[i]; |
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1858 } |
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1859 } else { |
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1860 Thread* THREAD = Thread::current(); |
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1861 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1862 SignatureStream ss(method->signature()); |
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1863 for (int i = 0; i < total_in_args ; i++ ) { |
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1864 if (in_sig_bt[i] == T_ARRAY) { |
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1865 // Arrays are passed as int, elem* pair |
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1866 out_sig_bt[argc++] = T_INT; |
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1867 out_sig_bt[argc++] = T_ADDRESS; |
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1868 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1869 const char* at = atype->as_C_string(); |
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1870 if (strlen(at) == 2) { |
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1871 assert(at[0] == '[', "must be"); |
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1872 switch (at[1]) { |
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1873 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1874 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1875 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1876 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1877 case 'I': in_elem_bt[i] = T_INT; break; |
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1878 case 'J': in_elem_bt[i] = T_LONG; break; |
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1879 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1880 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1881 default: ShouldNotReachHere(); |
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1882 } |
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1883 } |
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1884 } else { |
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1885 out_sig_bt[argc++] = in_sig_bt[i]; |
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1886 in_elem_bt[i] = T_VOID; |
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1887 } |
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1888 if (in_sig_bt[i] != T_VOID) { |
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1889 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1890 ss.next(); |
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1891 } |
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1892 } |
| 0 | 1893 } |
| 1894 | |
| 1895 // Now figure out where the args must be stored and how much stack space | |
| 1896 // they require. | |
| 1897 int out_arg_slots; | |
| 1898 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); | |
| 1899 | |
| 1900 // Compute framesize for the wrapper. We need to handlize all oops in | |
| 1901 // incoming registers | |
| 1902 | |
| 1903 // Calculate the total number of stack slots we will need. | |
| 1904 | |
| 1905 // First count the abi requirement plus all of the outgoing args | |
| 1906 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
| 1907 | |
| 1908 // Now the space for the inbound oop handle area | |
|
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1909 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers |
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1910 if (is_critical_native) { |
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1911 // Critical natives may have to call out so they need a save area |
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1912 // for register arguments. |
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1913 int double_slots = 0; |
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1914 int single_slots = 0; |
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1915 for ( int i = 0; i < total_in_args; i++) { |
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1916 if (in_regs[i].first()->is_Register()) { |
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1917 const Register reg = in_regs[i].first()->as_Register(); |
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1918 switch (in_sig_bt[i]) { |
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1919 case T_BOOLEAN: |
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1920 case T_BYTE: |
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1921 case T_SHORT: |
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1922 case T_CHAR: |
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1923 case T_INT: single_slots++; break; |
|
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1924 case T_ARRAY: // specific to LP64 (7145024) |
|
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1925 case T_LONG: double_slots++; break; |
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1926 default: ShouldNotReachHere(); |
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1927 } |
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1928 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1929 switch (in_sig_bt[i]) { |
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1930 case T_FLOAT: single_slots++; break; |
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1931 case T_DOUBLE: double_slots++; break; |
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1932 default: ShouldNotReachHere(); |
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1933 } |
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1934 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1935 ShouldNotReachHere(); |
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1936 } |
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1937 } |
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1938 total_save_slots = double_slots * 2 + single_slots; |
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1939 // align the save area |
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1940 if (double_slots != 0) { |
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1941 stack_slots = round_to(stack_slots, 2); |
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1942 } |
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1943 } |
| 0 | 1944 |
| 1945 int oop_handle_offset = stack_slots; | |
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1946 stack_slots += total_save_slots; |
| 0 | 1947 |
| 1948 // Now any space we need for handlizing a klass if static method | |
| 1949 | |
| 1950 int klass_slot_offset = 0; | |
| 1951 int klass_offset = -1; | |
| 1952 int lock_slot_offset = 0; | |
| 1953 bool is_static = false; | |
| 1954 | |
| 1955 if (method->is_static()) { | |
| 1956 klass_slot_offset = stack_slots; | |
| 1957 stack_slots += VMRegImpl::slots_per_word; | |
| 1958 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
| 1959 is_static = true; | |
| 1960 } | |
| 1961 | |
| 1962 // Plus a lock if needed | |
| 1963 | |
| 1964 if (method->is_synchronized()) { | |
| 1965 lock_slot_offset = stack_slots; | |
| 1966 stack_slots += VMRegImpl::slots_per_word; | |
| 1967 } | |
| 1968 | |
| 1969 // Now a place (+2) to save return values or temp during shuffling | |
| 1970 // + 4 for return address (which we own) and saved rbp | |
| 1971 stack_slots += 6; | |
| 1972 | |
| 1973 // Ok The space we have allocated will look like: | |
| 1974 // | |
| 1975 // | |
| 1976 // FP-> | | | |
| 1977 // |---------------------| | |
| 1978 // | 2 slots for moves | | |
| 1979 // |---------------------| | |
| 1980 // | lock box (if sync) | | |
| 1981 // |---------------------| <- lock_slot_offset | |
| 1982 // | klass (if static) | | |
| 1983 // |---------------------| <- klass_slot_offset | |
| 1984 // | oopHandle area | | |
| 1985 // |---------------------| <- oop_handle_offset (6 java arg registers) | |
| 1986 // | outbound memory | | |
| 1987 // | based arguments | | |
| 1988 // | | | |
| 1989 // |---------------------| | |
| 1990 // | | | |
| 1991 // SP-> | out_preserved_slots | | |
| 1992 // | |
| 1993 // | |
| 1994 | |
| 1995 | |
| 1996 // Now compute actual number of stack words we need rounding to make | |
| 1997 // stack properly aligned. | |
|
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1998 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
| 0 | 1999 |
| 2000 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
| 2001 | |
| 2002 // First thing make an ic check to see if we should even be here | |
| 2003 | |
| 2004 // We are free to use all registers as temps without saving them and | |
| 2005 // restoring them except rbp. rbp is the only callee save register | |
| 2006 // as far as the interpreter and the compiler(s) are concerned. | |
| 2007 | |
| 2008 | |
| 2009 const Register ic_reg = rax; | |
| 2010 const Register receiver = j_rarg0; | |
| 2011 | |
|
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2012 Label hit; |
| 0 | 2013 Label exception_pending; |
| 2014 | |
|
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2015 assert_different_registers(ic_reg, receiver, rscratch1); |
| 0 | 2016 __ verify_oop(receiver); |
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2017 __ load_klass(rscratch1, receiver); |
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2018 __ cmpq(ic_reg, rscratch1); |
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2019 __ jcc(Assembler::equal, hit); |
| 0 | 2020 |
| 2021 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 2022 | |
| 2023 // Verified entry point must be aligned | |
| 2024 __ align(8); | |
| 2025 | |
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2026 __ bind(hit); |
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2027 |
| 0 | 2028 int vep_offset = ((intptr_t)__ pc()) - start; |
| 2029 | |
| 2030 // The instruction at the verified entry point must be 5 bytes or longer | |
| 2031 // because it can be patched on the fly by make_non_entrant. The stack bang | |
| 2032 // instruction fits that requirement. | |
| 2033 | |
| 2034 // Generate stack overflow check | |
| 2035 | |
| 2036 if (UseStackBanging) { | |
| 2037 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
| 2038 } else { | |
| 2039 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
| 2040 __ fat_nop(); | |
| 2041 } | |
| 2042 | |
| 2043 // Generate a new frame for the wrapper. | |
| 2044 __ enter(); | |
| 2045 // -2 because return address is already present and so is saved rbp | |
| 304 | 2046 __ subptr(rsp, stack_size - 2*wordSize); |
| 0 | 2047 |
|
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2048 // Frame is now completed as far as size and linkage. |
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2049 int frame_complete = ((intptr_t)__ pc()) - start; |
| 0 | 2050 |
| 2051 #ifdef ASSERT | |
| 2052 { | |
| 2053 Label L; | |
| 304 | 2054 __ mov(rax, rsp); |
| 605 | 2055 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) |
| 304 | 2056 __ cmpptr(rax, rsp); |
| 0 | 2057 __ jcc(Assembler::equal, L); |
| 2058 __ stop("improperly aligned stack"); | |
| 2059 __ bind(L); | |
| 2060 } | |
| 2061 #endif /* ASSERT */ | |
| 2062 | |
| 2063 | |
| 2064 // We use r14 as the oop handle for the receiver/klass | |
| 2065 // It is callee save so it survives the call to native | |
| 2066 | |
| 2067 const Register oop_handle_reg = r14; | |
| 2068 | |
|
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2069 if (is_critical_native) { |
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2070 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, |
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2071 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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2072 } |
| 0 | 2073 |
| 2074 // | |
| 2075 // We immediately shuffle the arguments so that any vm call we have to | |
| 2076 // make from here on out (sync slow path, jvmti, etc.) we will have | |
| 2077 // captured the oops from our caller and have a valid oopMap for | |
| 2078 // them. | |
| 2079 | |
| 2080 // ----------------- | |
| 2081 // The Grand Shuffle | |
| 2082 | |
| 2083 // The Java calling convention is either equal (linux) or denser (win64) than the | |
| 2084 // c calling convention. However the because of the jni_env argument the c calling | |
| 2085 // convention always has at least one more (and two for static) arguments than Java. | |
| 2086 // Therefore if we move the args from java -> c backwards then we will never have | |
| 2087 // a register->register conflict and we don't have to build a dependency graph | |
| 2088 // and figure out how to break any cycles. | |
| 2089 // | |
| 2090 | |
| 2091 // Record esp-based slot for receiver on stack for non-static methods | |
| 2092 int receiver_offset = -1; | |
| 2093 | |
| 2094 // This is a trick. We double the stack slots so we can claim | |
| 2095 // the oops in the caller's frame. Since we are sure to have | |
| 2096 // more args than the caller doubling is enough to make | |
| 2097 // sure we can capture all the incoming oop args from the | |
| 2098 // caller. | |
| 2099 // | |
| 2100 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
| 2101 | |
| 2102 // Mark location of rbp (someday) | |
| 2103 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); | |
| 2104 | |
| 2105 // Use eax, ebx as temporaries during any memory-memory moves we have to do | |
| 2106 // All inbound args are referenced based on rbp and all outbound args via rsp. | |
| 2107 | |
| 2108 | |
| 2109 #ifdef ASSERT | |
| 2110 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
| 2111 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; | |
| 2112 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
| 2113 reg_destroyed[r] = false; | |
| 2114 } | |
| 2115 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { | |
| 2116 freg_destroyed[f] = false; | |
| 2117 } | |
| 2118 | |
| 2119 #endif /* ASSERT */ | |
| 2120 | |
|
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2121 // This may iterate in two different directions depending on the |
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2122 // kind of native it is. The reason is that for regular JNI natives |
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2123 // the incoming and outgoing registers are offset upwards and for |
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2124 // critical natives they are offset down. |
| 5905 | 2125 GrowableArray<int> arg_order(2 * total_in_args); |
| 2126 VMRegPair tmp_vmreg; | |
| 2127 tmp_vmreg.set1(rbx->as_VMReg()); | |
| 2128 | |
| 2129 if (!is_critical_native) { | |
| 2130 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
| 2131 arg_order.push(i); | |
| 2132 arg_order.push(c_arg); | |
| 2133 } | |
| 2134 } else { | |
| 2135 // Compute a valid move order, using tmp_vmreg to break any cycles | |
| 2136 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg); | |
|
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2137 } |
| 5905 | 2138 |
| 2139 int temploc = -1; | |
| 2140 for (int ai = 0; ai < arg_order.length(); ai += 2) { | |
| 2141 int i = arg_order.at(ai); | |
| 2142 int c_arg = arg_order.at(ai + 1); | |
| 2143 __ block_comment(err_msg("move %d -> %d", i, c_arg)); | |
| 2144 if (c_arg == -1) { | |
| 2145 assert(is_critical_native, "should only be required for critical natives"); | |
| 2146 // This arg needs to be moved to a temporary | |
| 2147 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register()); | |
| 2148 in_regs[i] = tmp_vmreg; | |
| 2149 temploc = i; | |
| 2150 continue; | |
| 2151 } else if (i == -1) { | |
| 2152 assert(is_critical_native, "should only be required for critical natives"); | |
| 2153 // Read from the temporary location | |
| 2154 assert(temploc != -1, "must be valid"); | |
| 2155 i = temploc; | |
| 2156 temploc = -1; | |
| 2157 } | |
| 0 | 2158 #ifdef ASSERT |
| 2159 if (in_regs[i].first()->is_Register()) { | |
| 2160 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); | |
| 2161 } else if (in_regs[i].first()->is_XMMRegister()) { | |
| 2162 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); | |
| 2163 } | |
| 2164 if (out_regs[c_arg].first()->is_Register()) { | |
| 2165 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
| 2166 } else if (out_regs[c_arg].first()->is_XMMRegister()) { | |
| 2167 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; | |
| 2168 } | |
| 2169 #endif /* ASSERT */ | |
| 2170 switch (in_sig_bt[i]) { | |
| 2171 case T_ARRAY: | |
|
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2172 if (is_critical_native) { |
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2173 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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2174 c_arg++; |
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2175 #ifdef ASSERT |
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2176 if (out_regs[c_arg].first()->is_Register()) { |
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2177 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; |
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2178 } else if (out_regs[c_arg].first()->is_XMMRegister()) { |
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2179 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; |
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2180 } |
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2181 #endif |
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2182 break; |
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2183 } |
| 0 | 2184 case T_OBJECT: |
|
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2185 assert(!is_critical_native, "no oop arguments"); |
| 0 | 2186 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
| 2187 ((i == 0) && (!is_static)), | |
| 2188 &receiver_offset); | |
| 2189 break; | |
| 2190 case T_VOID: | |
| 2191 break; | |
| 2192 | |
| 2193 case T_FLOAT: | |
| 2194 float_move(masm, in_regs[i], out_regs[c_arg]); | |
| 2195 break; | |
| 2196 | |
| 2197 case T_DOUBLE: | |
| 2198 assert( i + 1 < total_in_args && | |
| 2199 in_sig_bt[i + 1] == T_VOID && | |
| 2200 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
| 2201 double_move(masm, in_regs[i], out_regs[c_arg]); | |
| 2202 break; | |
| 2203 | |
| 2204 case T_LONG : | |
| 2205 long_move(masm, in_regs[i], out_regs[c_arg]); | |
| 2206 break; | |
| 2207 | |
| 2208 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
| 2209 | |
| 2210 default: | |
| 2211 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
| 2212 } | |
| 2213 } | |
| 2214 | |
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2215 int c_arg; |
| 0 | 2216 |
| 2217 // Pre-load a static method's oop into r14. Used both by locking code and | |
| 2218 // the normal JNI call code. | |
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2219 if (!is_critical_native) { |
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2220 // point c_arg at the first arg that is already loaded in case we |
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2221 // need to spill before we call out |
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2222 c_arg = total_c_args - total_in_args; |
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2223 |
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2224 if (method->is_static()) { |
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2225 |
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2226 // load oop into a register |
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2227 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); |
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2228 |
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2229 // Now handlize the static class mirror it's known not-null. |
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2230 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
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2231 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
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2232 |
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2233 // Now get the handle |
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2234 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
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2235 // store the klass handle as second argument |
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2236 __ movptr(c_rarg1, oop_handle_reg); |
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2237 // and protect the arg if we must spill |
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2238 c_arg--; |
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2239 } |
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2240 } else { |
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2241 // For JNI critical methods we need to save all registers in save_args. |
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2242 c_arg = 0; |
| 0 | 2243 } |
| 2244 | |
| 2245 // Change state to native (we save the return address in the thread, since it might not | |
| 2246 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
| 2247 // points into the right code segment. It does not have to be the correct return pc. | |
| 2248 // We use the same pc/oopMap repeatedly when we call out | |
| 2249 | |
| 2250 intptr_t the_pc = (intptr_t) __ pc(); | |
| 2251 oop_maps->add_gc_map(the_pc - start, map); | |
| 2252 | |
| 2253 __ set_last_Java_frame(rsp, noreg, (address)the_pc); | |
| 2254 | |
| 2255 | |
| 2256 // We have all of the arguments setup at this point. We must not touch any register | |
| 2257 // argument registers at this point (what if we save/restore them there are no oop? | |
| 2258 | |
| 2259 { | |
| 2260 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
| 2261 // protect the args we've loaded | |
| 2262 save_args(masm, total_c_args, c_arg, out_regs); | |
|
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2263 __ mov_metadata(c_rarg1, method()); |
| 0 | 2264 __ call_VM_leaf( |
| 2265 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
| 2266 r15_thread, c_rarg1); | |
| 2267 restore_args(masm, total_c_args, c_arg, out_regs); | |
| 2268 } | |
| 2269 | |
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2270 // RedefineClasses() tracing support for obsolete method entry |
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2271 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
|
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2272 // protect the args we've loaded |
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2273 save_args(masm, total_c_args, c_arg, out_regs); |
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2274 __ mov_metadata(c_rarg1, method()); |
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2275 __ call_VM_leaf( |
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2276 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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2277 r15_thread, c_rarg1); |
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2278 restore_args(masm, total_c_args, c_arg, out_regs); |
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2279 } |
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2280 |
| 0 | 2281 // Lock a synchronized method |
| 2282 | |
| 2283 // Register definitions used by locking and unlocking | |
| 2284 | |
| 2285 const Register swap_reg = rax; // Must use rax for cmpxchg instruction | |
| 2286 const Register obj_reg = rbx; // Will contain the oop | |
| 2287 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) | |
| 2288 const Register old_hdr = r13; // value of old header at unlock time | |
| 2289 | |
| 2290 Label slow_path_lock; | |
| 2291 Label lock_done; | |
| 2292 | |
| 2293 if (method->is_synchronized()) { | |
|
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2294 assert(!is_critical_native, "unhandled"); |
| 0 | 2295 |
| 2296 | |
| 2297 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
| 2298 | |
| 2299 // Get the handle (the 2nd argument) | |
| 304 | 2300 __ mov(oop_handle_reg, c_rarg1); |
| 0 | 2301 |
| 2302 // Get address of the box | |
| 2303 | |
| 304 | 2304 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 0 | 2305 |
| 2306 // Load the oop from the handle | |
| 304 | 2307 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 2308 |
| 2309 if (UseBiasedLocking) { | |
| 2310 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); | |
| 2311 } | |
| 2312 | |
| 2313 // Load immediate 1 into swap_reg %rax | |
| 2314 __ movl(swap_reg, 1); | |
| 2315 | |
| 2316 // Load (object->mark() | 1) into swap_reg %rax | |
| 304 | 2317 __ orptr(swap_reg, Address(obj_reg, 0)); |
| 0 | 2318 |
| 2319 // Save (object->mark() | 1) into BasicLock's displaced header | |
| 304 | 2320 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 2321 |
| 2322 if (os::is_MP()) { | |
| 2323 __ lock(); | |
| 2324 } | |
| 2325 | |
| 2326 // src -> dest iff dest == rax else rax <- dest | |
| 304 | 2327 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
| 0 | 2328 __ jcc(Assembler::equal, lock_done); |
| 2329 | |
| 2330 // Hmm should this move to the slow path code area??? | |
| 2331 | |
| 2332 // Test if the oopMark is an obvious stack pointer, i.e., | |
| 2333 // 1) (mark & 3) == 0, and | |
| 2334 // 2) rsp <= mark < mark + os::pagesize() | |
| 2335 // These 3 tests can be done by evaluating the following | |
| 2336 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
| 2337 // assuming both stack pointer and pagesize have their | |
| 2338 // least significant 2 bits clear. | |
| 2339 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg | |
| 2340 | |
| 304 | 2341 __ subptr(swap_reg, rsp); |
| 2342 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
| 0 | 2343 |
| 2344 // Save the test result, for recursive case, the result is zero | |
| 304 | 2345 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 2346 __ jcc(Assembler::notEqual, slow_path_lock); |
| 2347 | |
| 2348 // Slow path will re-enter here | |
| 2349 | |
| 2350 __ bind(lock_done); | |
| 2351 } | |
| 2352 | |
| 2353 | |
| 2354 // Finally just about ready to make the JNI call | |
| 2355 | |
| 2356 | |
| 2357 // get JNIEnv* which is first argument to native | |
|
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2358 if (!is_critical_native) { |
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2359 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); |
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2360 } |
| 0 | 2361 |
| 2362 // Now set thread in native | |
| 304 | 2363 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); |
| 0 | 2364 |
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2365 __ call(RuntimeAddress(native_func)); |
| 0 | 2366 |
|
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2367 // Verify or restore cpu control state after JNI call |
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2368 __ restore_cpu_control_state_after_jni(); |
| 0 | 2369 |
| 2370 // Unpack native results. | |
| 2371 switch (ret_type) { | |
| 2372 case T_BOOLEAN: __ c2bool(rax); break; | |
| 2373 case T_CHAR : __ movzwl(rax, rax); break; | |
| 2374 case T_BYTE : __ sign_extend_byte (rax); break; | |
| 2375 case T_SHORT : __ sign_extend_short(rax); break; | |
| 2376 case T_INT : /* nothing to do */ break; | |
| 2377 case T_DOUBLE : | |
| 2378 case T_FLOAT : | |
| 2379 // Result is in xmm0 we'll save as needed | |
| 2380 break; | |
| 2381 case T_ARRAY: // Really a handle | |
| 2382 case T_OBJECT: // Really a handle | |
| 2383 break; // can't de-handlize until after safepoint check | |
| 2384 case T_VOID: break; | |
| 2385 case T_LONG: break; | |
| 2386 default : ShouldNotReachHere(); | |
| 2387 } | |
| 2388 | |
| 2389 // Switch thread to "native transition" state before reading the synchronization state. | |
| 2390 // This additional state is necessary because reading and testing the synchronization | |
| 2391 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
| 2392 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
| 2393 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
| 2394 // Thread A is resumed to finish this native method, but doesn't block here since it | |
| 2395 // didn't see any synchronization is progress, and escapes. | |
| 304 | 2396 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); |
| 0 | 2397 |
| 2398 if(os::is_MP()) { | |
| 2399 if (UseMembar) { | |
| 2400 // Force this write out before the read below | |
| 2401 __ membar(Assembler::Membar_mask_bits( | |
| 2402 Assembler::LoadLoad | Assembler::LoadStore | | |
| 2403 Assembler::StoreLoad | Assembler::StoreStore)); | |
| 2404 } else { | |
| 2405 // Write serialization page so VM thread can do a pseudo remote membar. | |
| 2406 // We use the current thread pointer to calculate a thread specific | |
| 2407 // offset to write to within the page. This minimizes bus traffic | |
| 2408 // due to cache line collision. | |
| 2409 __ serialize_memory(r15_thread, rcx); | |
| 2410 } | |
| 2411 } | |
| 2412 | |
|
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2413 Label after_transition; |
| 0 | 2414 |
| 2415 // check for safepoint operation in progress and/or pending suspend requests | |
| 2416 { | |
| 2417 Label Continue; | |
| 2418 | |
| 2419 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
| 2420 SafepointSynchronize::_not_synchronized); | |
| 2421 | |
| 2422 Label L; | |
| 2423 __ jcc(Assembler::notEqual, L); | |
| 2424 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); | |
| 2425 __ jcc(Assembler::equal, Continue); | |
| 2426 __ bind(L); | |
| 2427 | |
| 2428 // Don't use call_VM as it will see a possible pending exception and forward it | |
| 2429 // and never return here preventing us from clearing _last_native_pc down below. | |
| 2430 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
| 2431 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
| 2432 // by hand. | |
| 2433 // | |
| 2434 save_native_result(masm, ret_type, stack_slots); | |
| 304 | 2435 __ mov(c_rarg0, r15_thread); |
| 2436 __ mov(r12, rsp); // remember sp | |
| 2437 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 2438 __ andptr(rsp, -16); // align stack as required by ABI | |
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2439 if (!is_critical_native) { |
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2440 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); |
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2441 } else { |
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2442 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2443 } |
| 304 | 2444 __ mov(rsp, r12); // restore sp |
|
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2445 __ reinit_heapbase(); |
| 0 | 2446 // Restore any method result value |
| 2447 restore_native_result(masm, ret_type, stack_slots); | |
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2448 |
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2449 if (is_critical_native) { |
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2450 // The call above performed the transition to thread_in_Java so |
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2451 // skip the transition logic below. |
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2452 __ jmpb(after_transition); |
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2453 } |
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2454 |
| 0 | 2455 __ bind(Continue); |
| 2456 } | |
| 2457 | |
| 2458 // change thread state | |
| 2459 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2460 __ bind(after_transition); |
| 0 | 2461 |
| 2462 Label reguard; | |
| 2463 Label reguard_done; | |
| 2464 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
| 2465 __ jcc(Assembler::equal, reguard); | |
| 2466 __ bind(reguard_done); | |
| 2467 | |
| 2468 // native result if any is live | |
| 2469 | |
| 2470 // Unlock | |
| 2471 Label unlock_done; | |
| 2472 Label slow_path_unlock; | |
| 2473 if (method->is_synchronized()) { | |
| 2474 | |
| 2475 // Get locked oop from the handle we passed to jni | |
| 304 | 2476 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 2477 |
| 2478 Label done; | |
| 2479 | |
| 2480 if (UseBiasedLocking) { | |
| 2481 __ biased_locking_exit(obj_reg, old_hdr, done); | |
| 2482 } | |
| 2483 | |
| 2484 // Simple recursive lock? | |
| 2485 | |
| 304 | 2486 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); |
| 0 | 2487 __ jcc(Assembler::equal, done); |
| 2488 | |
| 2489 // Must save rax if if it is live now because cmpxchg must use it | |
| 2490 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 2491 save_native_result(masm, ret_type, stack_slots); | |
| 2492 } | |
| 2493 | |
| 2494 | |
| 2495 // get address of the stack lock | |
| 304 | 2496 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 0 | 2497 // get old displaced header |
| 304 | 2498 __ movptr(old_hdr, Address(rax, 0)); |
| 0 | 2499 |
| 2500 // Atomic swap old header if oop still contains the stack lock | |
| 2501 if (os::is_MP()) { | |
| 2502 __ lock(); | |
| 2503 } | |
| 304 | 2504 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); |
| 0 | 2505 __ jcc(Assembler::notEqual, slow_path_unlock); |
| 2506 | |
| 2507 // slow path re-enters here | |
| 2508 __ bind(unlock_done); | |
| 2509 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 2510 restore_native_result(masm, ret_type, stack_slots); | |
| 2511 } | |
| 2512 | |
| 2513 __ bind(done); | |
| 2514 | |
| 2515 } | |
| 2516 { | |
| 2517 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
| 2518 save_native_result(masm, ret_type, stack_slots); | |
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2519 __ mov_metadata(c_rarg1, method()); |
| 0 | 2520 __ call_VM_leaf( |
| 2521 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
| 2522 r15_thread, c_rarg1); | |
| 2523 restore_native_result(masm, ret_type, stack_slots); | |
| 2524 } | |
| 2525 | |
| 2526 __ reset_last_Java_frame(false, true); | |
| 2527 | |
| 2528 // Unpack oop result | |
| 2529 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
| 2530 Label L; | |
| 304 | 2531 __ testptr(rax, rax); |
| 0 | 2532 __ jcc(Assembler::zero, L); |
| 304 | 2533 __ movptr(rax, Address(rax, 0)); |
| 0 | 2534 __ bind(L); |
| 2535 __ verify_oop(rax); | |
| 2536 } | |
| 2537 | |
|
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2538 if (!is_critical_native) { |
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2539 // reset handle block |
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2540 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); |
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2541 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); |
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2542 } |
| 0 | 2543 |
| 2544 // pop our frame | |
| 2545 | |
| 2546 __ leave(); | |
| 2547 | |
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2548 if (!is_critical_native) { |
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2549 // Any exception pending? |
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2550 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2551 __ jcc(Assembler::notEqual, exception_pending); |
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2552 } |
| 0 | 2553 |
| 2554 // Return | |
| 2555 | |
| 2556 __ ret(0); | |
| 2557 | |
| 2558 // Unexpected paths are out of line and go here | |
| 2559 | |
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2560 if (!is_critical_native) { |
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2561 // forward the exception |
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2562 __ bind(exception_pending); |
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2563 |
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2564 // and forward the exception |
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2565 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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2566 } |
| 0 | 2567 |
| 2568 // Slow path locking & unlocking | |
| 2569 if (method->is_synchronized()) { | |
| 2570 | |
| 2571 // BEGIN Slow path lock | |
| 2572 __ bind(slow_path_lock); | |
| 2573 | |
| 2574 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
| 2575 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
| 2576 | |
| 2577 // protect the args we've loaded | |
| 2578 save_args(masm, total_c_args, c_arg, out_regs); | |
| 2579 | |
| 304 | 2580 __ mov(c_rarg0, obj_reg); |
| 2581 __ mov(c_rarg1, lock_reg); | |
| 2582 __ mov(c_rarg2, r15_thread); | |
| 0 | 2583 |
| 2584 // Not a leaf but we have last_Java_frame setup as we want | |
| 2585 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); | |
| 2586 restore_args(masm, total_c_args, c_arg, out_regs); | |
| 2587 | |
| 2588 #ifdef ASSERT | |
| 2589 { Label L; | |
| 304 | 2590 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
| 0 | 2591 __ jcc(Assembler::equal, L); |
| 2592 __ stop("no pending exception allowed on exit from monitorenter"); | |
| 2593 __ bind(L); | |
| 2594 } | |
| 2595 #endif | |
| 2596 __ jmp(lock_done); | |
| 2597 | |
| 2598 // END Slow path lock | |
| 2599 | |
| 2600 // BEGIN Slow path unlock | |
| 2601 __ bind(slow_path_unlock); | |
| 2602 | |
| 2603 // If we haven't already saved the native result we must save it now as xmm registers | |
| 2604 // are still exposed. | |
| 2605 | |
| 2606 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 2607 save_native_result(masm, ret_type, stack_slots); | |
| 2608 } | |
| 2609 | |
| 304 | 2610 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 2611 | |
| 2612 __ mov(c_rarg0, obj_reg); | |
| 2613 __ mov(r12, rsp); // remember sp | |
| 2614 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 2615 __ andptr(rsp, -16); // align stack as required by ABI | |
| 0 | 2616 |
| 2617 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
| 2618 // NOTE that obj_reg == rbx currently | |
| 304 | 2619 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); |
| 2620 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); | |
| 0 | 2621 |
| 2622 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); | |
| 304 | 2623 __ mov(rsp, r12); // restore sp |
|
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2624 __ reinit_heapbase(); |
| 0 | 2625 #ifdef ASSERT |
| 2626 { | |
| 2627 Label L; | |
| 304 | 2628 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
| 0 | 2629 __ jcc(Assembler::equal, L); |
| 2630 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
| 2631 __ bind(L); | |
| 2632 } | |
| 2633 #endif /* ASSERT */ | |
| 2634 | |
| 304 | 2635 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); |
| 0 | 2636 |
| 2637 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 2638 restore_native_result(masm, ret_type, stack_slots); | |
| 2639 } | |
| 2640 __ jmp(unlock_done); | |
| 2641 | |
| 2642 // END Slow path unlock | |
| 2643 | |
| 2644 } // synchronized | |
| 2645 | |
| 2646 // SLOW PATH Reguard the stack if needed | |
| 2647 | |
| 2648 __ bind(reguard); | |
| 2649 save_native_result(masm, ret_type, stack_slots); | |
| 304 | 2650 __ mov(r12, rsp); // remember sp |
| 2651 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 2652 __ andptr(rsp, -16); // align stack as required by ABI | |
| 0 | 2653 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); |
| 304 | 2654 __ mov(rsp, r12); // restore sp |
|
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2655 __ reinit_heapbase(); |
| 0 | 2656 restore_native_result(masm, ret_type, stack_slots); |
| 2657 // and continue | |
| 2658 __ jmp(reguard_done); | |
| 2659 | |
| 2660 | |
| 2661 | |
| 2662 __ flush(); | |
| 2663 | |
| 2664 nmethod *nm = nmethod::new_native_nmethod(method, | |
|
2405
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2665 compile_id, |
| 0 | 2666 masm->code(), |
| 2667 vep_offset, | |
| 2668 frame_complete, | |
| 2669 stack_slots / VMRegImpl::slots_per_word, | |
| 2670 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
| 2671 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
| 2672 oop_maps); | |
|
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2673 |
|
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|
2674 if (is_critical_native) { |
|
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2675 nm->set_lazy_critical_native(true); |
|
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|
2676 } |
|
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2677 |
| 0 | 2678 return nm; |
| 2679 | |
| 2680 } | |
| 2681 | |
|
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2682 #ifdef HAVE_DTRACE_H |
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2683 // --------------------------------------------------------------------------- |
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2684 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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2685 // in the Java compiled code convention, marshals them to the native |
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2686 // abi and then leaves nops at the position you would expect to call a native |
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2687 // function. When the probe is enabled the nops are replaced with a trap |
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2688 // instruction that dtrace inserts and the trace will cause a notification |
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2689 // to dtrace. |
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2690 // |
|
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2691 // The probes are only able to take primitive types and java/lang/String as |
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2692 // arguments. No other java types are allowed. Strings are converted to utf8 |
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2693 // strings so that from dtrace point of view java strings are converted to C |
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2694 // strings. There is an arbitrary fixed limit on the total space that a method |
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2695 // can use for converting the strings. (256 chars per string in the signature). |
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2696 // So any java string larger then this is truncated. |
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2697 |
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2698 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
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2699 static bool offsets_initialized = false; |
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2700 |
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2701 |
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2702 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm, |
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2703 methodHandle method) { |
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2704 |
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2705 |
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2706 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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2707 // be single threaded in this method. |
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2708 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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2709 |
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2710 if (!offsets_initialized) { |
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2711 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; |
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2712 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; |
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2713 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; |
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2714 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; |
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2715 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; |
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2716 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; |
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2717 |
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2718 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; |
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2719 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; |
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2720 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; |
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2721 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; |
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2722 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; |
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2723 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; |
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2724 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; |
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2725 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; |
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2726 |
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2727 offsets_initialized = true; |
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2728 } |
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2729 // Fill in the signature array, for the calling-convention call. |
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2730 int total_args_passed = method->size_of_parameters(); |
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2731 |
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2732 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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2733 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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2734 |
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2735 // The signature we are going to use for the trap that dtrace will see |
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2736 // java/lang/String is converted. We drop "this" and any other object |
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2737 // is converted to NULL. (A one-slot java/lang/Long object reference |
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2738 // is converted to a two-slot long, which is why we double the allocation). |
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2739 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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2740 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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2741 |
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2742 int i=0; |
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2743 int total_strings = 0; |
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2744 int first_arg_to_pass = 0; |
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2745 int total_c_args = 0; |
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2746 |
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2747 // Skip the receiver as dtrace doesn't want to see it |
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2748 if( !method->is_static() ) { |
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2749 in_sig_bt[i++] = T_OBJECT; |
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2750 first_arg_to_pass = 1; |
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2751 } |
|
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2752 |
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2753 // We need to convert the java args to where a native (non-jni) function |
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2754 // would expect them. To figure out where they go we convert the java |
|
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2755 // signature to a C signature. |
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2756 |
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2757 SignatureStream ss(method->signature()); |
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2758 for ( ; !ss.at_return_type(); ss.next()) { |
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2759 BasicType bt = ss.type(); |
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2760 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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2761 out_sig_bt[total_c_args++] = bt; |
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2762 if( bt == T_OBJECT) { |
|
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2763 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
|
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2764 if (s == vmSymbols::java_lang_String()) { |
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2765 total_strings++; |
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2766 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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2767 } else if (s == vmSymbols::java_lang_Boolean() || |
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2768 s == vmSymbols::java_lang_Character() || |
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2769 s == vmSymbols::java_lang_Byte() || |
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2770 s == vmSymbols::java_lang_Short() || |
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2771 s == vmSymbols::java_lang_Integer() || |
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2772 s == vmSymbols::java_lang_Float()) { |
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2773 out_sig_bt[total_c_args-1] = T_INT; |
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2774 } else if (s == vmSymbols::java_lang_Long() || |
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2775 s == vmSymbols::java_lang_Double()) { |
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2776 out_sig_bt[total_c_args-1] = T_LONG; |
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2777 out_sig_bt[total_c_args++] = T_VOID; |
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2778 } |
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2779 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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2780 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2781 // We convert double to long |
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2782 out_sig_bt[total_c_args-1] = T_LONG; |
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2783 out_sig_bt[total_c_args++] = T_VOID; |
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2784 } else if ( bt == T_FLOAT) { |
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2785 // We convert float to int |
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2786 out_sig_bt[total_c_args-1] = T_INT; |
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2787 } |
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2788 } |
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2789 |
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2790 assert(i==total_args_passed, "validly parsed signature"); |
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2791 |
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2792 // Now get the compiled-Java layout as input arguments |
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2793 int comp_args_on_stack; |
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2794 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2795 in_sig_bt, in_regs, total_args_passed, false); |
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2796 |
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2797 // Now figure out where the args must be stored and how much stack space |
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2798 // they require (neglecting out_preserve_stack_slots but space for storing |
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2799 // the 1st six register arguments). It's weird see int_stk_helper. |
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2800 |
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2801 int out_arg_slots; |
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2802 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
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2803 |
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2804 // Calculate the total number of stack slots we will need. |
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2805 |
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2806 // First count the abi requirement plus all of the outgoing args |
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2807 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2808 |
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2809 // Now space for the string(s) we must convert |
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2810 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2811 for (i = 0; i < total_strings ; i++) { |
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2812 string_locs[i] = stack_slots; |
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2813 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2814 } |
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2815 |
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2816 // Plus the temps we might need to juggle register args |
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2817 // regs take two slots each |
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2818 stack_slots += (Argument::n_int_register_parameters_c + |
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2819 Argument::n_float_register_parameters_c) * 2; |
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2820 |
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2821 |
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2822 // + 4 for return address (which we own) and saved rbp, |
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2823 |
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2824 stack_slots += 4; |
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2825 |
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2826 // Ok The space we have allocated will look like: |
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2827 // |
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2828 // |
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2829 // FP-> | | |
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2830 // |---------------------| |
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2831 // | string[n] | |
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2832 // |---------------------| <- string_locs[n] |
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2833 // | string[n-1] | |
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2834 // |---------------------| <- string_locs[n-1] |
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2835 // | ... | |
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2836 // | ... | |
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2837 // |---------------------| <- string_locs[1] |
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2838 // | string[0] | |
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2839 // |---------------------| <- string_locs[0] |
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2840 // | outbound memory | |
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2841 // | based arguments | |
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2842 // | | |
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2843 // |---------------------| |
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2844 // | | |
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2845 // SP-> | out_preserved_slots | |
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2846 // |
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2847 // |
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2848 |
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2849 // Now compute actual number of stack words we need rounding to make |
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2850 // stack properly aligned. |
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2851 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
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2852 |
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2853 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2854 |
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2855 intptr_t start = (intptr_t)__ pc(); |
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2856 |
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2857 // First thing make an ic check to see if we should even be here |
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2858 |
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2859 // We are free to use all registers as temps without saving them and |
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2860 // restoring them except rbp. rbp, is the only callee save register |
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2861 // as far as the interpreter and the compiler(s) are concerned. |
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2862 |
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2863 const Register ic_reg = rax; |
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2864 const Register receiver = rcx; |
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2865 Label hit; |
|
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2866 Label exception_pending; |
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2867 |
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2868 |
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2869 __ verify_oop(receiver); |
|
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2870 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
|
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2871 __ jcc(Assembler::equal, hit); |
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2872 |
|
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2873 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2874 |
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2875 // verified entry must be aligned for code patching. |
|
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2876 // and the first 5 bytes must be in the same cache line |
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2877 // if we align at 8 then we will be sure 5 bytes are in the same line |
|
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2878 __ align(8); |
|
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2879 |
|
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2880 __ bind(hit); |
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2881 |
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2882 int vep_offset = ((intptr_t)__ pc()) - start; |
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2883 |
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2884 |
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2885 // The instruction at the verified entry point must be 5 bytes or longer |
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2886 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2887 // instruction fits that requirement. |
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2888 |
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2889 // Generate stack overflow check |
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2890 |
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2891 if (UseStackBanging) { |
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2892 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2893 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2894 } else { |
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2895 __ movl(rax, stack_size); |
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2896 __ bang_stack_size(rax, rbx); |
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2897 } |
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2898 } else { |
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2899 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2900 __ fat_nop(); |
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2901 } |
|
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2902 |
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2903 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5, |
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2904 "valid size for make_non_entrant"); |
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2905 |
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2906 // Generate a new frame for the wrapper. |
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2907 __ enter(); |
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2908 |
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2909 // -4 because return address is already present and so is saved rbp, |
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2910 if (stack_size - 2*wordSize != 0) { |
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2911 __ subq(rsp, stack_size - 2*wordSize); |
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2912 } |
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2913 |
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2914 // Frame is now completed as far a size and linkage. |
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2915 |
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2916 int frame_complete = ((intptr_t)__ pc()) - start; |
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2917 |
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2918 int c_arg, j_arg; |
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2919 |
|
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2920 // State of input register args |
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2921 |
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2922 bool live[ConcreteRegisterImpl::number_of_registers]; |
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2923 |
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2924 live[j_rarg0->as_VMReg()->value()] = false; |
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2925 live[j_rarg1->as_VMReg()->value()] = false; |
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2926 live[j_rarg2->as_VMReg()->value()] = false; |
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2927 live[j_rarg3->as_VMReg()->value()] = false; |
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2928 live[j_rarg4->as_VMReg()->value()] = false; |
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2929 live[j_rarg5->as_VMReg()->value()] = false; |
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2930 |
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2931 live[j_farg0->as_VMReg()->value()] = false; |
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2932 live[j_farg1->as_VMReg()->value()] = false; |
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2933 live[j_farg2->as_VMReg()->value()] = false; |
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2934 live[j_farg3->as_VMReg()->value()] = false; |
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2935 live[j_farg4->as_VMReg()->value()] = false; |
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2936 live[j_farg5->as_VMReg()->value()] = false; |
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2937 live[j_farg6->as_VMReg()->value()] = false; |
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2938 live[j_farg7->as_VMReg()->value()] = false; |
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2939 |
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2940 |
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2941 bool rax_is_zero = false; |
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2942 |
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2943 // All args (except strings) destined for the stack are moved first |
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2944 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2945 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
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2946 VMRegPair src = in_regs[j_arg]; |
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2947 VMRegPair dst = out_regs[c_arg]; |
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2948 |
|
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2949 // Get the real reg value or a dummy (rsp) |
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2950 |
|
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2951 int src_reg = src.first()->is_reg() ? |
|
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2952 src.first()->value() : |
|
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2953 rsp->as_VMReg()->value(); |
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2954 |
|
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2955 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2956 (in_sig_bt[j_arg] == T_OBJECT && |
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2957 out_sig_bt[c_arg] != T_INT && |
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2958 out_sig_bt[c_arg] != T_ADDRESS && |
|
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2959 out_sig_bt[c_arg] != T_LONG); |
|
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2960 |
|
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2961 live[src_reg] = !useless; |
|
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2962 |
|
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2963 if (dst.first()->is_stack()) { |
|
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2964 |
|
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2965 // Even though a string arg in a register is still live after this loop |
|
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2966 // after the string conversion loop (next) it will be dead so we take |
|
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2967 // advantage of that now for simpler code to manage live. |
|
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2968 |
|
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2969 live[src_reg] = false; |
|
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2970 switch (in_sig_bt[j_arg]) { |
|
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2971 |
|
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2972 case T_ARRAY: |
|
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2973 case T_OBJECT: |
|
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2974 { |
|
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2975 Address stack_dst(rsp, reg2offset_out(dst.first())); |
|
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2976 |
|
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2977 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
|
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2978 // need to unbox a one-word value |
|
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2979 Register in_reg = rax; |
|
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2980 if ( src.first()->is_reg() ) { |
|
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2981 in_reg = src.first()->as_Register(); |
|
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2982 } else { |
|
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2983 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
|
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2984 rax_is_zero = false; |
|
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2985 } |
|
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2986 Label skipUnbox; |
|
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2987 __ movptr(Address(rsp, reg2offset_out(dst.first())), |
|
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2988 (int32_t)NULL_WORD); |
|
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2989 __ testq(in_reg, in_reg); |
|
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2990 __ jcc(Assembler::zero, skipUnbox); |
|
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2991 |
|
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2992 BasicType bt = out_sig_bt[c_arg]; |
|
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2993 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
|
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2994 Address src1(in_reg, box_offset); |
|
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2995 if ( bt == T_LONG ) { |
|
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2996 __ movq(in_reg, src1); |
|
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2997 __ movq(stack_dst, in_reg); |
|
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|
2998 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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2999 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
|
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|
3000 } else { |
|
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|
3001 __ movl(in_reg, src1); |
|
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|
3002 __ movl(stack_dst, in_reg); |
|
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|
3003 } |
|
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diff
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|
3004 |
|
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diff
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|
3005 __ bind(skipUnbox); |
|
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113
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|
3006 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
|
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|
3007 // Convert the arg to NULL |
|
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|
3008 if (!rax_is_zero) { |
|
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|
3009 __ xorq(rax, rax); |
|
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3010 rax_is_zero = true; |
|
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|
3011 } |
|
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|
3012 __ movq(stack_dst, rax); |
|
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diff
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|
3013 } |
|
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diff
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|
3014 } |
|
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diff
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|
3015 break; |
|
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diff
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|
3016 |
|
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|
3017 case T_VOID: |
|
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|
3018 break; |
|
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kamg
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diff
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|
3019 |
|
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|
3020 case T_FLOAT: |
|
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|
3021 // This does the right thing since we know it is destined for the |
|
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|
3022 // stack |
|
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|
3023 float_move(masm, src, dst); |
|
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|
3024 break; |
|
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kamg
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113
diff
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|
3025 |
|
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|
3026 case T_DOUBLE: |
|
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3027 // This does the right thing since we know it is destined for the |
|
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|
3028 // stack |
|
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|
3029 double_move(masm, src, dst); |
|
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|
3030 break; |
|
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kamg
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113
diff
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|
3031 |
|
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|
3032 case T_LONG : |
|
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|
3033 long_move(masm, src, dst); |
|
018d5b58dd4f
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kamg
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113
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|
3034 break; |
|
018d5b58dd4f
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kamg
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113
diff
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|
3035 |
|
018d5b58dd4f
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|
3036 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
|
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kamg
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113
diff
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|
3037 |
|
018d5b58dd4f
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kamg
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113
diff
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|
3038 default: |
|
018d5b58dd4f
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|
3039 move32_64(masm, src, dst); |
|
018d5b58dd4f
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kamg
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113
diff
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|
3040 } |
|
018d5b58dd4f
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kamg
parents:
113
diff
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|
3041 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3042 |
|
018d5b58dd4f
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kamg
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113
diff
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|
3043 } |
|
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
3044 |
|
018d5b58dd4f
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kamg
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113
diff
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|
3045 // If we have any strings we must store any register based arg to the stack |
|
018d5b58dd4f
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kamg
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113
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|
3046 // This includes any still live xmm registers too. |
|
018d5b58dd4f
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kamg
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113
diff
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|
3047 |
|
018d5b58dd4f
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113
diff
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|
3048 int sid = 0; |
|
018d5b58dd4f
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kamg
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113
diff
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|
3049 |
|
018d5b58dd4f
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113
diff
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|
3050 if (total_strings > 0 ) { |
|
018d5b58dd4f
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113
diff
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|
3051 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
018d5b58dd4f
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kamg
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113
diff
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|
3052 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
018d5b58dd4f
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113
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|
3053 VMRegPair src = in_regs[j_arg]; |
|
018d5b58dd4f
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kamg
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113
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|
3054 VMRegPair dst = out_regs[c_arg]; |
|
018d5b58dd4f
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kamg
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113
diff
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|
3055 |
|
018d5b58dd4f
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113
diff
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|
3056 if (src.first()->is_reg()) { |
|
018d5b58dd4f
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kamg
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113
diff
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|
3057 Address src_tmp(rbp, fp_offset[src.first()->value()]); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3058 |
|
018d5b58dd4f
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kamg
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113
diff
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|
3059 // string oops were left untouched by the previous loop even if the |
|
018d5b58dd4f
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113
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|
3060 // eventual (converted) arg is destined for the stack so park them |
|
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113
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|
3061 // away now (except for first) |
|
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
3062 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3063 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
018d5b58dd4f
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kamg
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113
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|
3064 Address utf8_addr = Address( |
|
018d5b58dd4f
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kamg
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113
diff
changeset
|
3065 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
|
018d5b58dd4f
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kamg
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113
diff
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|
3066 if (sid != 1) { |
|
018d5b58dd4f
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kamg
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113
diff
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|
3067 // The first string arg won't be killed until after the utf8 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3068 // conversion |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
changeset
|
3069 __ movq(utf8_addr, src.first()->as_Register()); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3070 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3071 } else if (dst.first()->is_reg()) { |
|
018d5b58dd4f
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kamg
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113
diff
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|
3072 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) { |
|
018d5b58dd4f
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kamg
parents:
113
diff
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|
3073 |
|
018d5b58dd4f
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kamg
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113
diff
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|
3074 // Convert the xmm register to an int and store it in the reserved |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3075 // location for the eventual c register arg |
|
018d5b58dd4f
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kamg
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113
diff
changeset
|
3076 XMMRegister f = src.first()->as_XMMRegister(); |
|
018d5b58dd4f
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kamg
parents:
113
diff
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|
3077 if (in_sig_bt[j_arg] == T_FLOAT) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3078 __ movflt(src_tmp, f); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3079 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3080 __ movdbl(src_tmp, f); |
|
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
3081 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3082 } else { |
|
018d5b58dd4f
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kamg
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113
diff
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|
3083 // If the arg is an oop type we don't support don't bother to store |
|
018d5b58dd4f
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kamg
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113
diff
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|
3084 // it remember string was handled above. |
|
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113
diff
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|
3085 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
|
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kamg
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113
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|
3086 (in_sig_bt[j_arg] == T_OBJECT && |
|
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kamg
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113
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|
3087 out_sig_bt[c_arg] != T_INT && |
|
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113
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|
3088 out_sig_bt[c_arg] != T_LONG); |
|
018d5b58dd4f
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kamg
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113
diff
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|
3089 |
|
018d5b58dd4f
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kamg
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113
diff
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|
3090 if (!useless) { |
|
018d5b58dd4f
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113
diff
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|
3091 __ movq(src_tmp, src.first()->as_Register()); |
|
018d5b58dd4f
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kamg
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113
diff
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|
3092 } |
|
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
3093 } |
|
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
3094 } |
|
018d5b58dd4f
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kamg
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113
diff
changeset
|
3095 } |
|
018d5b58dd4f
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kamg
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113
diff
changeset
|
3096 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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113
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|
3097 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
018d5b58dd4f
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|
3098 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
|
018d5b58dd4f
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kamg
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113
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|
3099 } |
|
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
3100 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3101 |
|
018d5b58dd4f
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kamg
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113
diff
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|
3102 // Now that the volatile registers are safe, convert all the strings |
|
018d5b58dd4f
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|
3103 sid = 0; |
|
018d5b58dd4f
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kamg
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113
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|
3104 |
|
018d5b58dd4f
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113
diff
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|
3105 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
018d5b58dd4f
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|
3106 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
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|
3107 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
018d5b58dd4f
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|
3108 // It's a string |
|
018d5b58dd4f
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|
3109 Address utf8_addr = Address( |
|
018d5b58dd4f
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113
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|
3110 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
|
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|
3111 // The first string we find might still be in the original java arg |
|
018d5b58dd4f
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113
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|
3112 // register |
|
018d5b58dd4f
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113
diff
changeset
|
3113 |
|
018d5b58dd4f
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changeset
|
3114 VMReg src = in_regs[j_arg].first(); |
|
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3115 |
|
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3116 // We will need to eventually save the final argument to the trap |
|
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3117 // in the von-volatile location dedicated to src. This is the offset |
|
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3118 // from fp we will use. |
|
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3119 int src_off = src->is_reg() ? |
|
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3120 fp_offset[src->value()] : reg2offset_in(src); |
|
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3121 |
|
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3122 // This is where the argument will eventually reside |
|
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3123 VMRegPair dst = out_regs[c_arg]; |
|
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3124 |
|
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3125 if (src->is_reg()) { |
|
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3126 if (sid == 1) { |
|
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3127 __ movq(c_rarg0, src->as_Register()); |
|
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3128 } else { |
|
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3129 __ movq(c_rarg0, utf8_addr); |
|
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|
3130 } |
|
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|
3131 } else { |
|
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3132 // arg is still in the original location |
|
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3133 __ movq(c_rarg0, Address(rbp, reg2offset_in(src))); |
|
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|
3134 } |
|
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|
3135 Label done, convert; |
|
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|
3136 |
|
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|
3137 // see if the oop is NULL |
|
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3138 __ testq(c_rarg0, c_rarg0); |
|
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3139 __ jcc(Assembler::notEqual, convert); |
|
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|
3140 |
|
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|
3141 if (dst.first()->is_reg()) { |
|
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3142 // Save the ptr to utf string in the origina src loc or the tmp |
|
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3143 // dedicated to it |
|
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|
3144 __ movq(Address(rbp, src_off), c_rarg0); |
|
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|
3145 } else { |
|
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3146 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0); |
|
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|
3147 } |
|
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|
3148 __ jmp(done); |
|
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|
3149 |
|
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|
3150 __ bind(convert); |
|
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|
3151 |
|
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|
3152 __ lea(c_rarg1, utf8_addr); |
|
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|
3153 if (dst.first()->is_reg()) { |
|
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3154 __ movq(Address(rbp, src_off), c_rarg1); |
|
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|
3155 } else { |
|
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3156 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1); |
|
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|
3157 } |
|
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|
3158 // And do the conversion |
|
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|
3159 __ call(RuntimeAddress( |
|
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|
3160 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf))); |
|
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|
3161 |
|
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|
3162 __ bind(done); |
|
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|
3163 } |
|
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|
3164 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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|
3165 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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|
3166 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
|
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|
3167 } |
|
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|
3168 } |
|
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|
3169 // The get_utf call killed all the c_arg registers |
|
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|
3170 live[c_rarg0->as_VMReg()->value()] = false; |
|
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|
3171 live[c_rarg1->as_VMReg()->value()] = false; |
|
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|
3172 live[c_rarg2->as_VMReg()->value()] = false; |
|
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|
3173 live[c_rarg3->as_VMReg()->value()] = false; |
|
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|
3174 live[c_rarg4->as_VMReg()->value()] = false; |
|
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|
3175 live[c_rarg5->as_VMReg()->value()] = false; |
|
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|
3176 |
|
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|
3177 live[c_farg0->as_VMReg()->value()] = false; |
|
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|
3178 live[c_farg1->as_VMReg()->value()] = false; |
|
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|
3179 live[c_farg2->as_VMReg()->value()] = false; |
|
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|
3180 live[c_farg3->as_VMReg()->value()] = false; |
|
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|
3181 live[c_farg4->as_VMReg()->value()] = false; |
|
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|
3182 live[c_farg5->as_VMReg()->value()] = false; |
|
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|
3183 live[c_farg6->as_VMReg()->value()] = false; |
|
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|
3184 live[c_farg7->as_VMReg()->value()] = false; |
|
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|
3185 } |
|
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|
3186 |
|
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|
3187 // Now we can finally move the register args to their desired locations |
|
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|
3188 |
|
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|
3189 rax_is_zero = false; |
|
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|
3190 |
|
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|
3191 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
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|
3192 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
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|
3193 |
|
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|
3194 VMRegPair src = in_regs[j_arg]; |
|
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|
3195 VMRegPair dst = out_regs[c_arg]; |
|
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|
3196 |
|
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|
3197 // Only need to look for args destined for the interger registers (since we |
|
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|
3198 // convert float/double args to look like int/long outbound) |
|
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|
3199 if (dst.first()->is_reg()) { |
|
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|
3200 Register r = dst.first()->as_Register(); |
|
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|
3201 |
|
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|
3202 // Check if the java arg is unsupported and thereofre useless |
|
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|
3203 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
|
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|
3204 (in_sig_bt[j_arg] == T_OBJECT && |
|
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|
3205 out_sig_bt[c_arg] != T_INT && |
|
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|
3206 out_sig_bt[c_arg] != T_ADDRESS && |
|
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|
3207 out_sig_bt[c_arg] != T_LONG); |
|
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|
3208 |
|
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|
3209 |
|
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|
3210 // If we're going to kill an existing arg save it first |
|
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|
3211 if (live[dst.first()->value()]) { |
|
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3212 // you can't kill yourself |
|
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3213 if (src.first() != dst.first()) { |
|
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3214 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r); |
|
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|
3215 } |
|
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|
3216 } |
|
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|
3217 if (src.first()->is_reg()) { |
|
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3218 if (live[src.first()->value()] ) { |
|
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3219 if (in_sig_bt[j_arg] == T_FLOAT) { |
|
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|
3220 __ movdl(r, src.first()->as_XMMRegister()); |
|
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3221 } else if (in_sig_bt[j_arg] == T_DOUBLE) { |
|
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3222 __ movdq(r, src.first()->as_XMMRegister()); |
|
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3223 } else if (r != src.first()->as_Register()) { |
|
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3224 if (!useless) { |
|
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|
3225 __ movq(r, src.first()->as_Register()); |
|
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3226 } |
|
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3227 } |
|
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3228 } else { |
|
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3229 // If the arg is an oop type we don't support don't bother to store |
|
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3230 // it |
|
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3231 if (!useless) { |
|
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3232 if (in_sig_bt[j_arg] == T_DOUBLE || |
|
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3233 in_sig_bt[j_arg] == T_LONG || |
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3234 in_sig_bt[j_arg] == T_OBJECT ) { |
|
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3235 __ movq(r, Address(rbp, fp_offset[src.first()->value()])); |
|
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3236 } else { |
|
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3237 __ movl(r, Address(rbp, fp_offset[src.first()->value()])); |
|
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3238 } |
|
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3239 } |
|
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3240 } |
|
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3241 live[src.first()->value()] = false; |
|
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3242 } else if (!useless) { |
|
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3243 // full sized move even for int should be ok |
|
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3244 __ movq(r, Address(rbp, reg2offset_in(src.first()))); |
|
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3245 } |
|
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3246 |
|
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3247 // At this point r has the original java arg in the final location |
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3248 // (assuming it wasn't useless). If the java arg was an oop |
|
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3249 // we have a bit more to do |
|
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3250 |
|
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3251 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) { |
|
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3252 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
|
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3253 // need to unbox a one-word value |
|
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3254 Label skip; |
|
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3255 __ testq(r, r); |
|
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3256 __ jcc(Assembler::equal, skip); |
|
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3257 BasicType bt = out_sig_bt[c_arg]; |
|
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3258 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
|
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3259 Address src1(r, box_offset); |
|
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3260 if ( bt == T_LONG ) { |
|
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3261 __ movq(r, src1); |
|
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3262 } else { |
|
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3263 __ movl(r, src1); |
|
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3264 } |
|
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3265 __ bind(skip); |
|
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3266 |
|
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3267 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
|
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3268 // Convert the arg to NULL |
|
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3269 __ xorq(r, r); |
|
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3270 } |
|
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3271 } |
|
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3272 |
|
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3273 // dst can longer be holding an input value |
|
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3274 live[dst.first()->value()] = false; |
|
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3275 } |
|
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3276 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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3277 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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3278 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3279 } |
|
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|
3280 } |
|
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|
3281 |
|
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|
3282 |
|
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3283 // Ok now we are done. Need to place the nop that dtrace wants in order to |
|
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3284 // patch in the trap |
|
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3285 int patch_offset = ((intptr_t)__ pc()) - start; |
|
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3286 |
|
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3287 __ nop(); |
|
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3288 |
|
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|
3289 |
|
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|
3290 // Return |
|
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3291 |
|
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|
3292 __ leave(); |
|
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3293 __ ret(0); |
|
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3294 |
|
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|
3295 __ flush(); |
|
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3296 |
|
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|
3297 nmethod *nm = nmethod::new_dtrace_nmethod( |
|
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3298 method, masm->code(), vep_offset, patch_offset, frame_complete, |
|
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3299 stack_slots / VMRegImpl::slots_per_word); |
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3300 return nm; |
|
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3301 |
|
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|
3302 } |
|
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3303 |
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|
3304 #endif // HAVE_DTRACE_H |
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3305 |
| 0 | 3306 // this function returns the adjust size (in number of words) to a c2i adapter |
| 3307 // activation for use during deoptimization | |
| 3308 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
| 1506 | 3309 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
| 0 | 3310 } |
| 3311 | |
| 3312 | |
| 3313 uint SharedRuntime::out_preserve_stack_slots() { | |
| 3314 return 0; | |
| 3315 } | |
| 3316 | |
| 3317 //------------------------------generate_deopt_blob---------------------------- | |
| 3318 void SharedRuntime::generate_deopt_blob() { | |
| 3319 // Allocate space for the code | |
| 3320 ResourceMark rm; | |
| 3321 // Setup code generation tools | |
| 3322 CodeBuffer buffer("deopt_blob", 2048, 1024); | |
| 3323 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3324 int frame_size_in_words; | |
| 3325 OopMap* map = NULL; | |
| 3326 OopMapSet *oop_maps = new OopMapSet(); | |
| 3327 | |
| 3328 // ------------- | |
| 3329 // This code enters when returning to a de-optimized nmethod. A return | |
| 3330 // address has been pushed on the the stack, and return values are in | |
| 3331 // registers. | |
| 3332 // If we are doing a normal deopt then we were called from the patched | |
| 3333 // nmethod from the point we returned to the nmethod. So the return | |
| 3334 // address on the stack is wrong by NativeCall::instruction_size | |
| 3335 // We will adjust the value so it looks like we have the original return | |
| 3336 // address on the stack (like when we eagerly deoptimized). | |
| 3337 // In the case of an exception pending when deoptimizing, we enter | |
| 3338 // with a return address on the stack that points after the call we patched | |
| 3339 // into the exception handler. We have the following register state from, | |
| 3340 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). | |
| 3341 // rax: exception oop | |
| 3342 // rbx: exception handler | |
| 3343 // rdx: throwing pc | |
| 3344 // So in this case we simply jam rdx into the useless return address and | |
| 3345 // the stack looks just like we want. | |
| 3346 // | |
| 3347 // At this point we need to de-opt. We save the argument return | |
| 3348 // registers. We call the first C routine, fetch_unroll_info(). This | |
| 3349 // routine captures the return values and returns a structure which | |
| 3350 // describes the current frame size and the sizes of all replacement frames. | |
| 3351 // The current frame is compiled code and may contain many inlined | |
| 3352 // functions, each with their own JVM state. We pop the current frame, then | |
| 3353 // push all the new frames. Then we call the C routine unpack_frames() to | |
| 3354 // populate these frames. Finally unpack_frames() returns us the new target | |
| 3355 // address. Notice that callee-save registers are BLOWN here; they have | |
| 3356 // already been captured in the vframeArray at the time the return PC was | |
| 3357 // patched. | |
| 3358 address start = __ pc(); | |
| 3359 Label cont; | |
| 3360 | |
| 3361 // Prolog for non exception case! | |
| 3362 | |
| 3363 // Save everything in sight. | |
| 3364 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3365 | |
| 3366 // Normal deoptimization. Save exec mode for unpack_frames. | |
|
113
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|
3367 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved |
| 0 | 3368 __ jmp(cont); |
| 304 | 3369 |
| 3370 int reexecute_offset = __ pc() - start; | |
|
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|
3371 #ifdef GRAALVM |
|
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|
3372 // Graal does not use this kind of deoptimization |
|
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|
3373 __ should_not_reach_here(); |
|
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|
3374 #endif |
| 304 | 3375 |
| 3376 // Reexecute case | |
| 3377 // return address is the pc describes what bci to do re-execute at | |
| 3378 | |
| 3379 // No need to update map as each call to save_live_registers will produce identical oopmap | |
| 3380 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3381 | |
| 3382 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved | |
| 3383 __ jmp(cont); | |
| 3384 | |
|
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|
3385 #ifdef GRAAL |
|
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|
3386 int implicit_exception_uncommon_trap_offset = __ pc() - start; |
| 10409 | 3387 __ pushptr(Address(r15_thread, in_bytes(JavaThread::graal_implicit_exception_pc_offset()))); |
|
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|
3388 |
|
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|
3389 int uncommon_trap_offset = __ pc() - start; |
|
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|
3390 |
|
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|
3391 // Save everything in sight. |
|
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|
3392 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); |
|
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|
3393 // fetch_unroll_info needs to call last_java_frame() |
|
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|
3394 __ set_last_Java_frame(noreg, noreg, NULL); |
|
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|
3395 |
|
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|
3396 __ movl(c_rarg1, Address(r15_thread, in_bytes(ThreadShadow::pending_deoptimization_offset()))); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3397 __ movl(Address(r15_thread, in_bytes(ThreadShadow::pending_deoptimization_offset())), -1); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3398 |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3399 __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3400 __ mov(c_rarg0, r15_thread); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3401 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3402 oop_maps->add_gc_map( __ pc()-start, map->deep_copy()); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3403 |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3404 __ reset_last_Java_frame(false, false); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3405 |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3406 Label after_fetch_unroll_info_call; |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3407 __ jmp(after_fetch_unroll_info_call); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3408 #endif // GRAAL |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3409 |
| 0 | 3410 int exception_offset = __ pc() - start; |
| 3411 | |
| 3412 // Prolog for exception case | |
| 3413 | |
| 304 | 3414 // all registers are dead at this entry point, except for rax, and |
| 3415 // rdx which contain the exception oop and exception pc | |
| 3416 // respectively. Set them in TLS and fall thru to the | |
| 3417 // unpack_with_exception_in_tls entry point. | |
| 3418 | |
| 3419 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
| 3420 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); | |
| 3421 | |
| 3422 int exception_in_tls_offset = __ pc() - start; | |
| 3423 | |
| 3424 // new implementation because exception oop is now passed in JavaThread | |
| 3425 | |
| 3426 // Prolog for exception case | |
| 3427 // All registers must be preserved because they might be used by LinearScan | |
| 3428 // Exceptiop oop and throwing PC are passed in JavaThread | |
| 3429 // tos: stack at point of call to method that threw the exception (i.e. only | |
| 3430 // args are on the stack, no return address) | |
| 3431 | |
| 3432 // make room on stack for the return address | |
| 3433 // It will be patched later with the throwing pc. The correct value is not | |
| 3434 // available now because loading it from memory would destroy registers. | |
| 3435 __ push(0); | |
| 0 | 3436 |
| 3437 // Save everything in sight. | |
| 3438 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3439 | |
| 304 | 3440 // Now it is safe to overwrite any register |
| 3441 | |
| 0 | 3442 // Deopt during an exception. Save exec mode for unpack_frames. |
|
113
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6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
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parents:
0
diff
changeset
|
3443 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved |
| 0 | 3444 |
| 304 | 3445 // load throwing pc from JavaThread and patch it as the return address |
| 3446 // of the current frame. Then clear the field in JavaThread | |
| 3447 | |
| 3448 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
| 3449 __ movptr(Address(rbp, wordSize), rdx); | |
| 3450 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
| 3451 | |
| 3452 #ifdef ASSERT | |
| 3453 // verify that there is really an exception oop in JavaThread | |
| 3454 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
| 3455 __ verify_oop(rax); | |
| 3456 | |
| 3457 // verify that there is no pending exception | |
| 3458 Label no_pending_exception; | |
| 3459 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); | |
| 3460 __ testptr(rax, rax); | |
| 3461 __ jcc(Assembler::zero, no_pending_exception); | |
| 3462 __ stop("must not have pending exception here"); | |
| 3463 __ bind(no_pending_exception); | |
| 3464 #endif | |
| 3465 | |
| 0 | 3466 __ bind(cont); |
| 3467 | |
| 3468 // Call C code. Need thread and this frame, but NOT official VM entry | |
| 3469 // crud. We cannot block on this call, no GC can happen. | |
| 3470 // | |
| 3471 // UnrollBlock* fetch_unroll_info(JavaThread* thread) | |
| 3472 | |
| 3473 // fetch_unroll_info needs to call last_java_frame(). | |
| 3474 | |
| 3475 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3476 #ifdef ASSERT | |
| 3477 { Label L; | |
| 304 | 3478 __ cmpptr(Address(r15_thread, |
| 0 | 3479 JavaThread::last_Java_fp_offset()), |
| 304 | 3480 (int32_t)0); |
| 0 | 3481 __ jcc(Assembler::equal, L); |
| 3482 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); | |
| 3483 __ bind(L); | |
| 3484 } | |
| 3485 #endif // ASSERT | |
| 304 | 3486 __ mov(c_rarg0, r15_thread); |
| 0 | 3487 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); |
| 3488 | |
| 3489 // Need to have an oopmap that tells fetch_unroll_info where to | |
| 3490 // find any register it might need. | |
| 3491 oop_maps->add_gc_map(__ pc() - start, map); | |
| 3492 | |
| 3493 __ reset_last_Java_frame(false, false); | |
| 3494 | |
|
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3495 #ifdef GRAAL |
|
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3496 __ bind(after_fetch_unroll_info_call); |
|
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3497 #endif |
|
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3498 |
| 0 | 3499 // Load UnrollBlock* into rdi |
| 304 | 3500 __ mov(rdi, rax); |
| 3501 | |
| 3502 Label noException; | |
|
682
69aefafe69c1
6824463: deopt blob is testing wrong register on 64-bit x86
never
parents:
628
diff
changeset
|
3503 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? |
| 304 | 3504 __ jcc(Assembler::notEqual, noException); |
| 3505 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
| 3506 // QQQ this is useless it was NULL above | |
| 3507 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
| 3508 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); | |
| 3509 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
| 3510 | |
| 3511 __ verify_oop(rax); | |
| 3512 | |
| 3513 // Overwrite the result registers with the exception results. | |
| 3514 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
| 3515 // I think this is useless | |
| 3516 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); | |
| 3517 | |
| 3518 __ bind(noException); | |
| 0 | 3519 |
| 3520 // Only register save data is on the stack. | |
| 3521 // Now restore the result registers. Everything else is either dead | |
| 3522 // or captured in the vframeArray. | |
| 3523 RegisterSaver::restore_result_registers(masm); | |
| 3524 | |
| 3525 // All of the register save area has been popped of the stack. Only the | |
| 3526 // return address remains. | |
| 3527 | |
| 3528 // Pop all the frames we must move/replace. | |
| 3529 // | |
| 3530 // Frame picture (youngest to oldest) | |
| 3531 // 1: self-frame (no frame link) | |
| 3532 // 2: deopting frame (no frame link) | |
| 3533 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 3534 // | |
| 3535 // Note: by leaving the return address of self-frame on the stack | |
| 3536 // and using the size of frame 2 to adjust the stack | |
| 3537 // when we are done the return to frame 3 will still be on the stack. | |
| 3538 | |
| 3539 // Pop deoptimized frame | |
| 3540 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); | |
| 304 | 3541 __ addptr(rsp, rcx); |
| 0 | 3542 |
| 3543 // rsp should be pointing at the return address to the caller (3) | |
| 3544 | |
| 3545 // Stack bang to make sure there's enough room for these interpreter frames. | |
| 3546 if (UseStackBanging) { | |
| 3547 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 3548 __ bang_stack_size(rbx, rcx); | |
| 3549 } | |
| 3550 | |
| 3551 // Load address of array of frame pcs into rcx | |
| 304 | 3552 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
| 0 | 3553 |
| 3554 // Trash the old pc | |
| 304 | 3555 __ addptr(rsp, wordSize); |
| 0 | 3556 |
| 3557 // Load address of array of frame sizes into rsi | |
| 304 | 3558 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
| 0 | 3559 |
| 3560 // Load counter into rdx | |
| 3561 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
| 3562 | |
| 3563 // Pick up the initial fp we should save | |
|
3931
5432047c7db7
7087445: Improve platform independence of JSR292 shared code
bdelsart
parents:
3442
diff
changeset
|
3564 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
| 0 | 3565 |
| 3566 // Now adjust the caller's stack to make up for the extra locals | |
| 3567 // but record the original sp so that we can save it in the skeletal interpreter | |
| 3568 // frame and the stack walking of interpreter_sender will get the unextended sp | |
| 3569 // value and not the "real" sp value. | |
| 3570 | |
| 3571 const Register sender_sp = r8; | |
| 3572 | |
| 304 | 3573 __ mov(sender_sp, rsp); |
| 0 | 3574 __ movl(rbx, Address(rdi, |
| 3575 Deoptimization::UnrollBlock:: | |
| 3576 caller_adjustment_offset_in_bytes())); | |
| 304 | 3577 __ subptr(rsp, rbx); |
| 0 | 3578 |
| 3579 // Push interpreter frames in a loop | |
| 3580 Label loop; | |
| 3581 __ bind(loop); | |
| 304 | 3582 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 3583 #ifdef CC_INTERP | |
| 3584 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and | |
| 3585 #ifdef ASSERT | |
| 3586 __ push(0xDEADDEAD); // Make a recognizable pattern | |
| 3587 __ push(0xDEADDEAD); | |
| 3588 #else /* ASSERT */ | |
| 3589 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" | |
| 3590 #endif /* ASSERT */ | |
| 3591 #else | |
| 3592 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand | |
| 3593 #endif // CC_INTERP | |
| 3594 __ pushptr(Address(rcx, 0)); // Save return address | |
| 0 | 3595 __ enter(); // Save old & set new ebp |
| 304 | 3596 __ subptr(rsp, rbx); // Prolog |
| 3597 #ifdef CC_INTERP | |
| 3598 __ movptr(Address(rbp, | |
| 3599 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), | |
| 3600 sender_sp); // Make it walkable | |
| 3601 #else /* CC_INTERP */ | |
| 0 | 3602 // This value is corrected by layout_activation_impl |
| 304 | 3603 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
| 3604 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable | |
| 3605 #endif /* CC_INTERP */ | |
| 3606 __ mov(sender_sp, rsp); // Pass sender_sp to next frame | |
| 3607 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 3608 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 0 | 3609 __ decrementl(rdx); // Decrement counter |
| 3610 __ jcc(Assembler::notZero, loop); | |
| 304 | 3611 __ pushptr(Address(rcx, 0)); // Save final return address |
| 0 | 3612 |
| 3613 // Re-push self-frame | |
| 3614 __ enter(); // Save old & set new ebp | |
| 3615 | |
| 3616 // Allocate a full sized register save area. | |
| 3617 // Return address and rbp are in place, so we allocate two less words. | |
| 304 | 3618 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); |
| 0 | 3619 |
| 3620 // Restore frame locals after moving the frame | |
| 3621 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); | |
| 304 | 3622 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); |
| 0 | 3623 |
| 3624 // Call C code. Need thread but NOT official VM entry | |
| 3625 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3626 // restore return values to their stack-slots with the new SP. | |
| 3627 // | |
| 3628 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) | |
| 3629 | |
| 3630 // Use rbp because the frames look interpreted now | |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3631 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3632 // Don't need the precise return PC here, just precise enough to point into this code blob. |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3633 address the_pc = __ pc(); |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3634 __ set_last_Java_frame(noreg, rbp, the_pc); |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3635 |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3636 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI |
| 304 | 3637 __ mov(c_rarg0, r15_thread); |
|
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
3638 __ movl(c_rarg1, r14); // second arg: exec_mode |
| 0 | 3639 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3640 // Revert SP alignment after call since we're going to do some SP relative addressing below |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3641 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); |
| 0 | 3642 |
| 3643 // Set an oopmap for the call site | |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3644 // Use the same PC we used for the last java frame |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3645 oop_maps->add_gc_map(the_pc - start, |
| 0 | 3646 new OopMap( frame_size_in_words, 0 )); |
| 3647 | |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
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parents:
3931
diff
changeset
|
3648 // Clear fp AND pc |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
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parents:
3931
diff
changeset
|
3649 __ reset_last_Java_frame(true, true); |
| 0 | 3650 |
| 3651 // Collect return values | |
| 3652 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); | |
| 304 | 3653 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); |
| 3654 // I think this is useless (throwing pc?) | |
| 3655 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); | |
| 0 | 3656 |
| 3657 // Pop self-frame. | |
| 3658 __ leave(); // Epilog | |
| 3659 | |
| 3660 // Jump to interpreter | |
| 3661 __ ret(0); | |
| 3662 | |
| 3663 // Make sure all code is generated | |
| 3664 masm->flush(); | |
| 3665 | |
| 304 | 3666 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); |
| 3667 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
|
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3668 #ifdef GRAAL |
|
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3669 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset); |
|
5111
422c979ff392
fixed two cases where DeoptAction was invalid
Christian Haeubl <christian.haeubl@oracle.com>
parents:
5109
diff
changeset
|
3670 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset); |
|
4985
0d2a2797a61f
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Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3671 #endif |
| 0 | 3672 } |
| 3673 | |
| 3674 #ifdef COMPILER2 | |
| 3675 //------------------------------generate_uncommon_trap_blob-------------------- | |
| 3676 void SharedRuntime::generate_uncommon_trap_blob() { | |
| 3677 // Allocate space for the code | |
| 3678 ResourceMark rm; | |
| 3679 // Setup code generation tools | |
| 3680 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); | |
| 3681 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3682 | |
| 3683 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
| 3684 | |
| 3685 address start = __ pc(); | |
| 3686 | |
| 3687 // Push self-frame. We get here with a return address on the | |
| 3688 // stack, so rsp is 8-byte aligned until we allocate our frame. | |
| 304 | 3689 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! |
| 0 | 3690 |
| 3691 // No callee saved registers. rbp is assumed implicitly saved | |
| 304 | 3692 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
| 0 | 3693 |
| 3694 // compiler left unloaded_class_index in j_rarg0 move to where the | |
| 3695 // runtime expects it. | |
| 3696 __ movl(c_rarg1, j_rarg0); | |
| 3697 | |
| 3698 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3699 | |
| 3700 // Call C code. Need thread but NOT official VM entry | |
| 3701 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3702 // capture callee-saved registers as well as return values. | |
| 3703 // Thread is in rdi already. | |
| 3704 // | |
| 3705 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); | |
| 3706 | |
| 304 | 3707 __ mov(c_rarg0, r15_thread); |
| 0 | 3708 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
| 3709 | |
| 3710 // Set an oopmap for the call site | |
| 3711 OopMapSet* oop_maps = new OopMapSet(); | |
| 3712 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); | |
| 3713 | |
| 3714 // location of rbp is known implicitly by the frame sender code | |
| 3715 | |
| 3716 oop_maps->add_gc_map(__ pc() - start, map); | |
| 3717 | |
| 3718 __ reset_last_Java_frame(false, false); | |
| 3719 | |
| 3720 // Load UnrollBlock* into rdi | |
| 304 | 3721 __ mov(rdi, rax); |
| 0 | 3722 |
| 3723 // Pop all the frames we must move/replace. | |
| 3724 // | |
| 3725 // Frame picture (youngest to oldest) | |
| 3726 // 1: self-frame (no frame link) | |
| 3727 // 2: deopting frame (no frame link) | |
| 3728 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 3729 | |
| 3730 // Pop self-frame. We have no frame, and must rely only on rax and rsp. | |
| 304 | 3731 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! |
| 0 | 3732 |
| 3733 // Pop deoptimized frame (int) | |
| 3734 __ movl(rcx, Address(rdi, | |
| 3735 Deoptimization::UnrollBlock:: | |
| 3736 size_of_deoptimized_frame_offset_in_bytes())); | |
| 304 | 3737 __ addptr(rsp, rcx); |
| 0 | 3738 |
| 3739 // rsp should be pointing at the return address to the caller (3) | |
| 3740 | |
| 3741 // Stack bang to make sure there's enough room for these interpreter frames. | |
| 3742 if (UseStackBanging) { | |
| 3743 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 3744 __ bang_stack_size(rbx, rcx); | |
| 3745 } | |
| 3746 | |
| 3747 // Load address of array of frame pcs into rcx (address*) | |
| 304 | 3748 __ movptr(rcx, |
| 3749 Address(rdi, | |
| 3750 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
| 0 | 3751 |
| 3752 // Trash the return pc | |
| 304 | 3753 __ addptr(rsp, wordSize); |
| 0 | 3754 |
| 3755 // Load address of array of frame sizes into rsi (intptr_t*) | |
| 304 | 3756 __ movptr(rsi, Address(rdi, |
| 3757 Deoptimization::UnrollBlock:: | |
| 3758 frame_sizes_offset_in_bytes())); | |
| 0 | 3759 |
| 3760 // Counter | |
| 3761 __ movl(rdx, Address(rdi, | |
| 3762 Deoptimization::UnrollBlock:: | |
| 3763 number_of_frames_offset_in_bytes())); // (int) | |
| 3764 | |
| 3765 // Pick up the initial fp we should save | |
| 304 | 3766 __ movptr(rbp, |
| 3767 Address(rdi, | |
|
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|
3768 Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
| 0 | 3769 |
| 3770 // Now adjust the caller's stack to make up for the extra locals but | |
| 3771 // record the original sp so that we can save it in the skeletal | |
| 3772 // interpreter frame and the stack walking of interpreter_sender | |
| 3773 // will get the unextended sp value and not the "real" sp value. | |
| 3774 | |
| 3775 const Register sender_sp = r8; | |
| 3776 | |
| 304 | 3777 __ mov(sender_sp, rsp); |
| 0 | 3778 __ movl(rbx, Address(rdi, |
| 3779 Deoptimization::UnrollBlock:: | |
| 3780 caller_adjustment_offset_in_bytes())); // (int) | |
| 304 | 3781 __ subptr(rsp, rbx); |
| 0 | 3782 |
| 3783 // Push interpreter frames in a loop | |
| 3784 Label loop; | |
| 3785 __ bind(loop); | |
| 304 | 3786 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 3787 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand | |
| 3788 __ pushptr(Address(rcx, 0)); // Save return address | |
| 3789 __ enter(); // Save old & set new rbp | |
| 3790 __ subptr(rsp, rbx); // Prolog | |
|
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3791 #ifdef CC_INTERP |
|
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3792 __ movptr(Address(rbp, |
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3793 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
|
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3794 sender_sp); // Make it walkable |
|
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3795 #else // CC_INTERP |
| 304 | 3796 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), |
| 3797 sender_sp); // Make it walkable | |
| 0 | 3798 // This value is corrected by layout_activation_impl |
| 304 | 3799 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
|
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3800 #endif // CC_INTERP |
| 304 | 3801 __ mov(sender_sp, rsp); // Pass sender_sp to next frame |
| 3802 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 3803 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 3804 __ decrementl(rdx); // Decrement counter | |
| 0 | 3805 __ jcc(Assembler::notZero, loop); |
| 304 | 3806 __ pushptr(Address(rcx, 0)); // Save final return address |
| 0 | 3807 |
| 3808 // Re-push self-frame | |
| 3809 __ enter(); // Save old & set new rbp | |
| 304 | 3810 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); |
| 0 | 3811 // Prolog |
| 3812 | |
| 3813 // Use rbp because the frames look interpreted now | |
|
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|
3814 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
|
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3815 // Don't need the precise return PC here, just precise enough to point into this code blob. |
|
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3816 address the_pc = __ pc(); |
|
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|
3817 __ set_last_Java_frame(noreg, rbp, the_pc); |
| 0 | 3818 |
| 3819 // Call C code. Need thread but NOT official VM entry | |
| 3820 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3821 // restore return values to their stack-slots with the new SP. | |
| 3822 // Thread is in rdi already. | |
| 3823 // | |
| 3824 // BasicType unpack_frames(JavaThread* thread, int exec_mode); | |
| 3825 | |
|
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|
3826 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI |
| 304 | 3827 __ mov(c_rarg0, r15_thread); |
| 0 | 3828 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); |
| 3829 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
| 3830 | |
| 3831 // Set an oopmap for the call site | |
|
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|
3832 // Use the same PC we used for the last java frame |
|
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|
3833 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
|
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|
3834 |
|
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|
3835 // Clear fp AND pc |
|
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|
3836 __ reset_last_Java_frame(true, true); |
| 0 | 3837 |
| 3838 // Pop self-frame. | |
| 3839 __ leave(); // Epilog | |
| 3840 | |
| 3841 // Jump to interpreter | |
| 3842 __ ret(0); | |
| 3843 | |
| 3844 // Make sure all code is generated | |
| 3845 masm->flush(); | |
| 3846 | |
| 3847 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, | |
| 3848 SimpleRuntimeFrame::framesize >> 1); | |
| 3849 } | |
| 3850 #endif // COMPILER2 | |
| 3851 | |
| 3852 | |
| 3853 //------------------------------generate_handler_blob------ | |
| 3854 // | |
| 3855 // Generate a special Compile2Runtime blob that saves all registers, | |
| 3856 // and setup oopmap. | |
| 3857 // | |
|
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|
3858 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { |
| 0 | 3859 assert(StubRoutines::forward_exception_entry() != NULL, |
| 3860 "must be generated before"); | |
| 3861 | |
| 3862 ResourceMark rm; | |
| 3863 OopMapSet *oop_maps = new OopMapSet(); | |
| 3864 OopMap* map; | |
| 3865 | |
| 3866 // Allocate space for the code. Setup code generation tools. | |
| 3867 CodeBuffer buffer("handler_blob", 2048, 1024); | |
| 3868 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3869 | |
| 3870 address start = __ pc(); | |
| 3871 address call_pc = NULL; | |
| 3872 int frame_size_in_words; | |
|
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|
3873 bool cause_return = (poll_type == POLL_AT_RETURN); |
|
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|
3874 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); |
| 0 | 3875 |
| 3876 // Make room for return address (or push it again) | |
| 3877 if (!cause_return) { | |
| 304 | 3878 __ push(rbx); |
| 0 | 3879 } |
| 3880 | |
| 3881 // Save registers, fpu state, and flags | |
|
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|
3882 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors); |
| 0 | 3883 |
| 3884 // The following is basically a call_VM. However, we need the precise | |
| 3885 // address of the call in order to generate an oopmap. Hence, we do all the | |
| 3886 // work outselves. | |
| 3887 | |
| 3888 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3889 | |
| 3890 // The return address must always be correct so that frame constructor never | |
| 3891 // sees an invalid pc. | |
| 3892 | |
| 3893 if (!cause_return) { | |
| 3894 // overwrite the dummy value we pushed on entry | |
| 304 | 3895 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); |
| 3896 __ movptr(Address(rbp, wordSize), c_rarg0); | |
| 0 | 3897 } |
| 3898 | |
| 3899 // Do the call | |
| 304 | 3900 __ mov(c_rarg0, r15_thread); |
| 0 | 3901 __ call(RuntimeAddress(call_ptr)); |
| 3902 | |
| 3903 // Set an oopmap for the call site. This oopmap will map all | |
| 3904 // oop-registers and debug-info registers as callee-saved. This | |
| 3905 // will allow deoptimization at this safepoint to find all possible | |
| 3906 // debug-info recordings, as well as let GC find all oops. | |
| 3907 | |
| 3908 oop_maps->add_gc_map( __ pc() - start, map); | |
| 3909 | |
| 3910 Label noException; | |
| 3911 | |
| 3912 __ reset_last_Java_frame(false, false); | |
| 3913 | |
| 304 | 3914 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3915 __ jcc(Assembler::equal, noException); |
| 3916 | |
| 3917 // Exception pending | |
| 3918 | |
|
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|
3919 RegisterSaver::restore_live_registers(masm, save_vectors); |
| 0 | 3920 |
| 3921 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
| 3922 | |
| 3923 // No exception case | |
| 3924 __ bind(noException); | |
| 3925 | |
| 3926 // Normal exit, restore registers and exit. | |
|
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|
3927 RegisterSaver::restore_live_registers(masm, save_vectors); |
| 0 | 3928 |
| 3929 __ ret(0); | |
| 3930 | |
| 3931 // Make sure all code is generated | |
| 3932 masm->flush(); | |
| 3933 | |
| 3934 // Fill-out other meta info | |
| 3935 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
| 3936 } | |
| 3937 | |
| 3938 // | |
| 3939 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
| 3940 // | |
| 3941 // Generate a stub that calls into vm to find out the proper destination | |
| 3942 // of a java call. All the argument registers are live at this point | |
| 3943 // but since this is generic code we don't know what they are and the caller | |
| 3944 // must do any gc of the args. | |
| 3945 // | |
|
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|
3946 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
| 0 | 3947 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
| 3948 | |
| 3949 // allocate space for the code | |
| 3950 ResourceMark rm; | |
| 3951 | |
| 3952 CodeBuffer buffer(name, 1000, 512); | |
| 3953 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3954 | |
| 3955 int frame_size_in_words; | |
| 3956 | |
| 3957 OopMapSet *oop_maps = new OopMapSet(); | |
| 3958 OopMap* map = NULL; | |
| 3959 | |
| 3960 int start = __ offset(); | |
| 3961 | |
| 3962 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3963 | |
| 3964 int frame_complete = __ offset(); | |
| 3965 | |
| 3966 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3967 | |
| 304 | 3968 __ mov(c_rarg0, r15_thread); |
| 0 | 3969 |
| 3970 __ call(RuntimeAddress(destination)); | |
| 3971 | |
| 3972 | |
| 3973 // Set an oopmap for the call site. | |
| 3974 // We need this not only for callee-saved registers, but also for volatile | |
| 3975 // registers that the compiler might be keeping live across a safepoint. | |
| 3976 | |
| 3977 oop_maps->add_gc_map( __ offset() - start, map); | |
| 3978 | |
| 3979 // rax contains the address we are going to jump to assuming no exception got installed | |
| 3980 | |
| 3981 // clear last_Java_sp | |
| 3982 __ reset_last_Java_frame(false, false); | |
| 3983 // check for pending exceptions | |
| 3984 Label pending; | |
| 304 | 3985 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3986 __ jcc(Assembler::notEqual, pending); |
| 3987 | |
|
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3988 // get the returned Method* |
|
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|
3989 __ get_vm_result_2(rbx, r15_thread); |
| 304 | 3990 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); |
| 3991 | |
| 3992 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
| 0 | 3993 |
| 3994 RegisterSaver::restore_live_registers(masm); | |
| 3995 | |
| 3996 // We are back the the original state on entry and ready to go. | |
| 3997 | |
| 3998 __ jmp(rax); | |
| 3999 | |
| 4000 // Pending exception after the safepoint | |
| 4001 | |
| 4002 __ bind(pending); | |
| 4003 | |
| 4004 RegisterSaver::restore_live_registers(masm); | |
| 4005 | |
| 4006 // exception pending => remove activation and forward to exception handler | |
| 4007 | |
| 4008 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); | |
| 4009 | |
| 304 | 4010 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); |
| 0 | 4011 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
| 4012 | |
| 4013 // ------------- | |
| 4014 // make sure all code is generated | |
| 4015 masm->flush(); | |
| 4016 | |
| 4017 // return the blob | |
| 4018 // frame_size_words or bytes?? | |
| 4019 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); | |
| 4020 } | |
| 4021 | |
| 4022 | |
| 4023 #ifdef COMPILER2 | |
| 4024 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame | |
| 4025 // | |
| 4026 //------------------------------generate_exception_blob--------------------------- | |
| 4027 // creates exception blob at the end | |
| 4028 // Using exception blob, this code is jumped from a compiled method. | |
| 4029 // (see emit_exception_handler in x86_64.ad file) | |
| 4030 // | |
| 4031 // Given an exception pc at a call we call into the runtime for the | |
| 4032 // handler in this method. This handler might merely restore state | |
| 4033 // (i.e. callee save registers) unwind the frame and jump to the | |
| 4034 // exception handler for the nmethod if there is no Java level handler | |
| 4035 // for the nmethod. | |
| 4036 // | |
| 4037 // This code is entered with a jmp. | |
| 4038 // | |
| 4039 // Arguments: | |
| 4040 // rax: exception oop | |
| 4041 // rdx: exception pc | |
| 4042 // | |
| 4043 // Results: | |
| 4044 // rax: exception oop | |
| 4045 // rdx: exception pc in caller or ??? | |
| 4046 // destination: exception handler of caller | |
| 4047 // | |
| 4048 // Note: the exception pc MUST be at a call (precise debug information) | |
| 4049 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. | |
| 4050 // | |
| 4051 | |
| 4052 void OptoRuntime::generate_exception_blob() { | |
| 4053 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); | |
| 4054 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); | |
| 4055 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); | |
| 4056 | |
| 4057 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
| 4058 | |
| 4059 // Allocate space for the code | |
| 4060 ResourceMark rm; | |
| 4061 // Setup code generation tools | |
| 4062 CodeBuffer buffer("exception_blob", 2048, 1024); | |
| 4063 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 4064 | |
| 4065 | |
| 4066 address start = __ pc(); | |
| 4067 | |
| 4068 // Exception pc is 'return address' for stack walker | |
| 304 | 4069 __ push(rdx); |
| 4070 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog | |
| 0 | 4071 |
| 4072 // Save callee-saved registers. See x86_64.ad. | |
| 4073 | |
| 4074 // rbp is an implicitly saved callee saved register (i.e. the calling | |
| 4075 // convention will save restore it in prolog/epilog) Other than that | |
| 4076 // there are no callee save registers now that adapter frames are gone. | |
| 4077 | |
| 304 | 4078 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
| 0 | 4079 |
| 4080 // Store exception in Thread object. We cannot pass any arguments to the | |
| 4081 // handle_exception call, since we do not want to make any assumption | |
| 4082 // about the size of the frame where the exception happened in. | |
| 4083 // c_rarg0 is either rdi (Linux) or rcx (Windows). | |
| 304 | 4084 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); |
| 4085 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
| 0 | 4086 |
| 4087 // This call does all the hard work. It checks if an exception handler | |
| 4088 // exists in the method. | |
| 4089 // If so, it returns the handler address. | |
| 4090 // If not, it prepares for stack-unwinding, restoring the callee-save | |
| 4091 // registers of the frame being removed. | |
| 4092 // | |
| 4093 // address OptoRuntime::handle_exception_C(JavaThread* thread) | |
| 4094 | |
|
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|
4095 // At a method handle call, the stack may not be properly aligned |
|
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|
4096 // when returning with an exception. |
|
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|
4097 address the_pc = __ pc(); |
|
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|
4098 __ set_last_Java_frame(noreg, noreg, the_pc); |
| 304 | 4099 __ mov(c_rarg0, r15_thread); |
|
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|
4100 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack |
| 0 | 4101 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); |
| 4102 | |
| 4103 // Set an oopmap for the call site. This oopmap will only be used if we | |
| 4104 // are unwinding the stack. Hence, all locations will be dead. | |
| 4105 // Callee-saved registers will be the same as the frame above (i.e., | |
| 4106 // handle_exception_stub), since they were restored when we got the | |
| 4107 // exception. | |
| 4108 | |
| 4109 OopMapSet* oop_maps = new OopMapSet(); | |
| 4110 | |
|
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|
4111 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
|
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|
4112 |
|
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|
4113 __ reset_last_Java_frame(false, true); |
| 0 | 4114 |
| 4115 // Restore callee-saved registers | |
| 4116 | |
| 4117 // rbp is an implicitly saved callee saved register (i.e. the calling | |
| 4118 // convention will save restore it in prolog/epilog) Other than that | |
| 4119 // there are no callee save registers no that adapter frames are gone. | |
| 4120 | |
| 304 | 4121 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); |
| 4122 | |
| 4123 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog | |
| 4124 __ pop(rdx); // No need for exception pc anymore | |
| 0 | 4125 |
| 4126 // rax: exception handler | |
| 4127 | |
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4128 // Restore SP from BP if the exception PC is a MethodHandle call site. |
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4129 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0); |
| 1567 | 4130 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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4131 |
| 0 | 4132 // We have a handler in rax (could be deopt blob). |
| 304 | 4133 __ mov(r8, rax); |
| 0 | 4134 |
| 4135 // Get the exception oop | |
| 304 | 4136 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); |
| 0 | 4137 // Get the exception pc in case we are deoptimized |
| 304 | 4138 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); |
| 0 | 4139 #ifdef ASSERT |
| 4140 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); | |
| 4141 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); | |
| 4142 #endif | |
| 4143 // Clear the exception oop so GC no longer processes it as a root. | |
| 4144 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); | |
| 4145 | |
| 4146 // rax: exception oop | |
| 4147 // r8: exception handler | |
| 4148 // rdx: exception pc | |
| 4149 // Jump to handler | |
| 4150 | |
| 4151 __ jmp(r8); | |
| 4152 | |
| 4153 // Make sure all code is generated | |
| 4154 masm->flush(); | |
| 4155 | |
| 4156 // Set exception blob | |
| 4157 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); | |
| 4158 } | |
| 4159 #endif // COMPILER2 |