Mercurial > hg > truffle
annotate src/cpu/x86/vm/vmreg_x86.inline.hpp @ 12355:cefad50507d8
Merge with hs25-b53
| author | Gilles Duboscq <duboscq@ssw.jku.at> |
|---|---|
| date | Fri, 11 Oct 2013 10:38:03 +0200 |
| parents | 8c92982cbbc4 |
| children |
| rev | line source |
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| 0 | 1 /* |
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2 * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #ifndef CPU_X86_VM_VMREG_X86_INLINE_HPP |
| 26 #define CPU_X86_VM_VMREG_X86_INLINE_HPP | |
| 27 | |
| 0 | 28 inline VMReg RegisterImpl::as_VMReg() { |
| 29 if( this==noreg ) return VMRegImpl::Bad(); | |
| 30 #ifdef AMD64 | |
| 31 return VMRegImpl::as_VMReg(encoding() << 1 ); | |
| 32 #else | |
| 33 return VMRegImpl::as_VMReg(encoding() ); | |
| 34 #endif // AMD64 | |
| 35 } | |
| 36 | |
| 37 inline VMReg FloatRegisterImpl::as_VMReg() { | |
| 38 return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr); | |
| 39 } | |
| 40 | |
| 41 inline VMReg XMMRegisterImpl::as_VMReg() { | |
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42 return VMRegImpl::as_VMReg((encoding() << 3) + ConcreteRegisterImpl::max_fpr); |
| 0 | 43 } |
| 44 | |
| 45 | |
| 46 inline bool VMRegImpl::is_Register() { | |
| 47 return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; | |
| 48 } | |
| 49 | |
| 50 inline bool VMRegImpl::is_FloatRegister() { | |
| 51 return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; | |
| 52 } | |
| 53 | |
| 54 inline bool VMRegImpl::is_XMMRegister() { | |
| 55 return value() >= ConcreteRegisterImpl::max_fpr && value() < ConcreteRegisterImpl::max_xmm; | |
| 56 } | |
| 57 | |
| 58 inline Register VMRegImpl::as_Register() { | |
| 59 | |
| 60 assert( is_Register(), "must be"); | |
| 61 // Yuk | |
| 62 #ifdef AMD64 | |
| 63 return ::as_Register(value() >> 1); | |
| 64 #else | |
| 65 return ::as_Register(value()); | |
| 66 #endif // AMD64 | |
| 67 } | |
| 68 | |
| 69 inline FloatRegister VMRegImpl::as_FloatRegister() { | |
| 70 assert( is_FloatRegister() && is_even(value()), "must be" ); | |
| 71 // Yuk | |
| 72 return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1); | |
| 73 } | |
| 74 | |
| 75 inline XMMRegister VMRegImpl::as_XMMRegister() { | |
| 76 assert( is_XMMRegister() && is_even(value()), "must be" ); | |
| 77 // Yuk | |
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78 return ::as_XMMRegister((value() - ConcreteRegisterImpl::max_fpr) >> 3); |
| 0 | 79 } |
| 80 | |
| 81 inline bool VMRegImpl::is_concrete() { | |
| 82 assert(is_reg(), "must be"); | |
| 83 #ifndef AMD64 | |
| 84 if (is_Register()) return true; | |
| 85 #endif // AMD64 | |
| 86 return is_even(value()); | |
| 87 } | |
| 1972 | 88 |
| 89 #endif // CPU_X86_VM_VMREG_X86_INLINE_HPP |