annotate src/cpu/sparc/vm/icBuffer_sparc.cpp @ 196:d1605aabd0a1 jdk7-b30

6719955: Update copyright year Summary: Update copyright year for files that have been modified in 2008 Reviewed-by: ohair, tbell
author xdono
date Wed, 02 Jul 2008 12:55:16 -0700
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children 6b2273dd6fa9
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1 /*
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2 * Copyright 1997-2006 Sun Microsystems, Inc. All Rights Reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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20 * CA 95054 USA or visit www.sun.com if you need additional information or
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21 * have any questions.
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22 *
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23 */
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24
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25 #include "incls/_precompiled.incl"
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26 #include "incls/_icBuffer_sparc.cpp.incl"
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27
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28 int InlineCacheBuffer::ic_stub_code_size() {
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29 #ifdef _LP64
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30 if (TraceJumps) return 600 * wordSize;
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31 return (NativeMovConstReg::instruction_size + // sethi;add
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32 NativeJump::instruction_size + // sethi; jmp; delay slot
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33 (1*BytesPerInstWord) + 1); // flush + 1 extra byte
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34 #else
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35 if (TraceJumps) return 300 * wordSize;
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36 return (2+2+ 1) * wordSize + 1; // set/jump_to/nop + 1 byte so that code_end can be set in CodeBuffer
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37 #endif
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38 }
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39
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40 void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, oop cached_oop, address entry_point) {
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41 ResourceMark rm;
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42 CodeBuffer code(code_begin, ic_stub_code_size());
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43 MacroAssembler* masm = new MacroAssembler(&code);
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44 // note: even though the code contains an embedded oop, we do not need reloc info
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45 // because
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46 // (1) the oop is old (i.e., doesn't matter for scavenges)
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47 // (2) these ICStubs are removed *before* a GC happens, so the roots disappear
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48 assert(cached_oop == NULL || cached_oop->is_perm(), "must be old oop");
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49 Address cached_oop_addr(G5_inline_cache_reg, address(cached_oop));
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50 // Force the sethi to generate the fixed sequence so next_instruction_address works
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51 masm->sethi(cached_oop_addr, true /* ForceRelocatable */ );
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52 masm->add(cached_oop_addr, G5_inline_cache_reg);
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53 assert(G3_scratch != G5_method, "Do not clobber the method oop in the transition stub");
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54 assert(G3_scratch != G5_inline_cache_reg, "Do not clobber the inline cache register in the transition stub");
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55 Address entry(G3_scratch, entry_point);
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56 masm->JUMP(entry, 0);
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57 masm->delayed()->nop();
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58 masm->flush();
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59 }
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60
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61
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62 address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {
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63 NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
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64 NativeJump* jump = nativeJump_at(move->next_instruction_address());
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65 return jump->jump_destination();
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66 }
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67
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68
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69 oop InlineCacheBuffer::ic_buffer_cached_oop(address code_begin) {
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70 NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
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71 NativeJump* jump = nativeJump_at(move->next_instruction_address());
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72 return (oop)move->data();
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73 }