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1 /*
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2 * Copyright 1997-2007 Sun Microsystems, Inc. All Rights Reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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20 * CA 95054 USA or visit www.sun.com if you need additional information or
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21 * have any questions.
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22 *
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23 */
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24
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25 class BufferBlob;
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26 class CodeBuffer;
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27 class JVMState;
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28 class MachCallDynamicJavaNode;
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29 class MachCallJavaNode;
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30 class MachCallLeafNode;
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31 class MachCallNode;
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32 class MachCallRuntimeNode;
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33 class MachCallStaticJavaNode;
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34 class MachEpilogNode;
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35 class MachIfNode;
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36 class MachNullCheckNode;
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37 class MachOper;
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38 class MachProjNode;
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39 class MachPrologNode;
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40 class MachReturnNode;
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41 class MachSafePointNode;
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42 class MachSpillCopyNode;
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43 class Matcher;
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44 class PhaseRegAlloc;
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45 class RegMask;
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46 class State;
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47
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48 //---------------------------MachOper------------------------------------------
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49 class MachOper : public ResourceObj {
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50 public:
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51 // Allocate right next to the MachNodes in the same arena
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52 void *operator new( size_t x, Compile* C ) { return C->node_arena()->Amalloc_D(x); }
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53
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54 // Opcode
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55 virtual uint opcode() const = 0;
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56
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57 // Number of input edges.
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58 // Generally at least 1
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59 virtual uint num_edges() const { return 1; }
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60 // Array of Register masks
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61 virtual const RegMask *in_RegMask(int index) const;
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62
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63 // Methods to output the encoding of the operand
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64
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65 // Negate conditional branches. Error for non-branch Nodes
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66 virtual void negate();
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67
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68 // Return the value requested
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69 // result register lookup, corresponding to int_format
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70 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
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71 // input register lookup, corresponding to ext_format
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72 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
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73
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74 // helpers for MacroAssembler generation from ADLC
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75 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
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76 return ::as_Register(reg(ra_, node));
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77 }
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78 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
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79 return ::as_Register(reg(ra_, node, idx));
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80 }
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81 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
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82 return ::as_FloatRegister(reg(ra_, node));
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83 }
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84 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
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85 return ::as_FloatRegister(reg(ra_, node, idx));
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86 }
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87
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88 #if defined(IA32) || defined(AMD64)
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89 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
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90 return ::as_XMMRegister(reg(ra_, node));
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91 }
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92 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
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93 return ::as_XMMRegister(reg(ra_, node, idx));
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94 }
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95 #endif
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96
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97 virtual intptr_t constant() const;
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98 virtual bool constant_is_oop() const;
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99 virtual jdouble constantD() const;
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100 virtual jfloat constantF() const;
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101 virtual jlong constantL() const;
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102 virtual TypeOopPtr *oop() const;
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103 virtual int ccode() const;
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104 // A zero, default, indicates this value is not needed.
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105 // May need to lookup the base register, as done in int_ and ext_format
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106 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
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107 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
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108 virtual int scale() const;
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109 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
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110 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
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111 // Check for PC-Relative displacement
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112 virtual bool disp_is_oop() const;
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113 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
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114 virtual int base_position() const; // base edge position, or -1
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115 virtual int index_position() const; // index edge position, or -1
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116
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117 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
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118 // Only returns non-null value for i486.ad's indOffset32X
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119 virtual const TypePtr *disp_as_type() const { return NULL; }
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120
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121 // Return the label
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122 virtual Label *label() const;
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123
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124 // Return the method's address
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125 virtual intptr_t method() const;
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126
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127 // Hash and compare over operands are currently identical
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128 virtual uint hash() const;
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129 virtual uint cmp( const MachOper &oper ) const;
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130
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131 // Virtual clone, since I do not know how big the MachOper is.
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132 virtual MachOper *clone(Compile* C) const = 0;
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133
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134 // Return ideal Type from simple operands. Fail for complex operands.
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135 virtual const Type *type() const;
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136
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137 // Set an integer offset if we have one, or error otherwise
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138 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
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139
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140 #ifndef PRODUCT
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141 // Return name of operand
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142 virtual const char *Name() const { return "???";}
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143
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144 // Methods to output the text version of the operand
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145 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
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146 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
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147
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148 virtual void dump_spec(outputStream *st) const; // Print per-operand info
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149 #endif
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150 };
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151
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152 //------------------------------MachNode---------------------------------------
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153 // Base type for all machine specific nodes. All node classes generated by the
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154 // ADLC inherit from this class.
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155 class MachNode : public Node {
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156 public:
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157 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) {
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158 init_class_id(Class_Mach);
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159 }
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160 // Required boilerplate
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161 virtual uint size_of() const { return sizeof(MachNode); }
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162 virtual int Opcode() const; // Always equal to MachNode
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163 virtual uint rule() const = 0; // Machine-specific opcode
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164 // Number of inputs which come before the first operand.
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165 // Generally at least 1, to skip the Control input
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166 virtual uint oper_input_base() const { return 1; }
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167
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168 // Copy inputs and operands to new node of instruction.
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169 // Called from cisc_version() and short_branch_version().
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170 // !!!! The method's body is defined in ad_<arch>.cpp file.
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171 void fill_new_machnode(MachNode *n, Compile* C) const;
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172
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173 // Return an equivalent instruction using memory for cisc_operand position
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174 virtual MachNode *cisc_version(int offset, Compile* C);
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175 // Modify this instruction's register mask to use stack version for cisc_operand
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176 virtual void use_cisc_RegMask();
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177
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178 // Support for short branches
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179 virtual MachNode *short_branch_version(Compile* C) { return NULL; }
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180 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
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181
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182 // First index in _in[] corresponding to operand, or -1 if there is none
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183 int operand_index(uint operand) const;
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184
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185 // Register class input is expected in
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186 virtual const RegMask &in_RegMask(uint) const;
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187
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188 // cisc-spillable instructions redefine for use by in_RegMask
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189 virtual const RegMask *cisc_RegMask() const { return NULL; }
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190
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191 // If this instruction is a 2-address instruction, then return the
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192 // index of the input which must match the output. Not nessecary
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193 // for instructions which bind the input and output register to the
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194 // same singleton regiser (e.g., Intel IDIV which binds AX to be
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195 // both an input and an output). It is nessecary when the input and
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196 // output have choices - but they must use the same choice.
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197 virtual uint two_adr( ) const { return 0; }
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198
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199 // Array of complex operand pointers. Each corresponds to zero or
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200 // more leafs. Must be set by MachNode constructor to point to an
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201 // internal array of MachOpers. The MachOper array is sized by
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202 // specific MachNodes described in the ADL.
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203 uint _num_opnds;
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204 MachOper **_opnds;
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205 uint num_opnds() const { return _num_opnds; }
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206
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207 // Emit bytes into cbuf
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208 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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209 // Size of instruction in bytes
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210 virtual uint size(PhaseRegAlloc *ra_) const;
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211 // Helper function that computes size by emitting code
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212 virtual uint emit_size(PhaseRegAlloc *ra_) const;
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213
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214 // Return the alignment required (in units of relocInfo::addr_unit())
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215 // for this instruction (must be a power of 2)
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216 virtual int alignment_required() const { return 1; }
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217
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218 // Return the padding (in bytes) to be emitted before this
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219 // instruction to properly align it.
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220 virtual int compute_padding(int current_offset) const { return 0; }
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221
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222 // Return number of relocatable values contained in this instruction
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223 virtual int reloc() const { return 0; }
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224
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225 // Return number of words used for double constants in this instruction
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226 virtual int const_size() const { return 0; }
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227
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228 // Hash and compare over operands. Used to do GVN on machine Nodes.
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229 virtual uint hash() const;
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230 virtual uint cmp( const Node &n ) const;
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231
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232 // Expand method for MachNode, replaces nodes representing pseudo
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233 // instructions with a set of nodes which represent real machine
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234 // instructions and compute the same value.
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235 virtual MachNode *Expand( State *, Node_List &proj_list ) { return this; }
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236
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237 // Bottom_type call; value comes from operand0
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238 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
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239 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : Matcher::base2reg[t->base()]; }
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240
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241 // If this is a memory op, return the base pointer and fixed offset.
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242 // If there are no such, return NULL. If there are multiple addresses
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243 // or the address is indeterminate (rare cases) then return (Node*)-1,
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244 // which serves as node bottom.
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245 // If the offset is not statically determined, set it to Type::OffsetBot.
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246 // This method is free to ignore stack slots if that helps.
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247 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
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248 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
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249 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
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250
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251 // Helper for get_base_and_disp: find the base and index input nodes.
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252 // Returns the MachOper as determined by memory_operand(), for use, if
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253 // needed by the caller. If (MachOper *)-1 is returned, base and index
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254 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
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255 // index are set to NULL.
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256 const MachOper* memory_inputs(Node* &base, Node* &index) const;
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257
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258 // Helper for memory_inputs: Which operand carries the necessary info?
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259 // By default, returns NULL, which means there is no such operand.
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260 // If it returns (MachOper*)-1, this means there are multiple memories.
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261 virtual const MachOper* memory_operand() const { return NULL; }
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262
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263 // Call "get_base_and_disp" to decide which category of memory is used here.
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264 virtual const class TypePtr *adr_type() const;
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265
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266 // Negate conditional branches. Error for non-branch Nodes
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267 virtual void negate();
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268
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269 // Apply peephole rule(s) to this instruction
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270 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C );
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271
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272 // Check for PC-Relative addressing
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273 bool is_pc_relative() const { return (flags() & Flag_is_pc_relative) != 0; }
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274
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275 // Top-level ideal Opcode matched
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276 virtual int ideal_Opcode() const { return Op_Node; }
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277
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278 // Set the branch inside jump MachNodes. Error for non-branch Nodes.
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279 virtual void label_set( Label& label, uint block_num );
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280
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281 // Adds the label for the case
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282 virtual void add_case_label( int switch_val, Label* blockLabel);
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283
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284 // Set the absolute address for methods
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285 virtual void method_set( intptr_t addr );
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286
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287 // Should we clone rather than spill this instruction?
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288 bool rematerialize() const;
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289
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290 // Get the pipeline info
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291 static const Pipeline *pipeline_class();
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292 virtual const Pipeline *pipeline() const;
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293
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294 #ifndef PRODUCT
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295 virtual const char *Name() const = 0; // Machine-specific name
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296 virtual void dump_spec(outputStream *st) const; // Print per-node info
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297 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
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298 #endif
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299 };
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300
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301 //------------------------------MachIdealNode----------------------------
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302 // Machine specific versions of nodes that must be defined by user.
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303 // These are not converted by matcher from ideal nodes to machine nodes
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304 // but are inserted into the code by the compiler.
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305 class MachIdealNode : public MachNode {
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306 public:
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307 MachIdealNode( ) {}
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308
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309 // Define the following defaults for non-matched machine nodes
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310 virtual uint oper_input_base() const { return 0; }
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311 virtual uint rule() const { return 9999999; }
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312 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
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313 };
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314
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315 //------------------------------MachTypeNode----------------------------
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316 // Machine Nodes that need to retain a known Type.
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317 class MachTypeNode : public MachNode {
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318 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
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319 public:
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320 const Type *_bottom_type;
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321
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322 virtual const class Type *bottom_type() const { return _bottom_type; }
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323 #ifndef PRODUCT
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324 virtual void dump_spec(outputStream *st) const;
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325 #endif
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326 };
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327
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328 //------------------------------MachBreakpointNode----------------------------
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329 // Machine breakpoint or interrupt Node
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330 class MachBreakpointNode : public MachIdealNode {
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331 public:
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332 MachBreakpointNode( ) {}
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333 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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334 virtual uint size(PhaseRegAlloc *ra_) const;
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335
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336 #ifndef PRODUCT
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337 virtual const char *Name() const { return "Breakpoint"; }
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338 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
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339 #endif
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340 };
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341
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342 //------------------------------MachUEPNode-----------------------------------
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343 // Machine Unvalidated Entry Point Node
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344 class MachUEPNode : public MachIdealNode {
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345 public:
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346 MachUEPNode( ) {}
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347 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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348 virtual uint size(PhaseRegAlloc *ra_) const;
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349
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350 #ifndef PRODUCT
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351 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
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352 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
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353 #endif
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354 };
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355
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356 //------------------------------MachPrologNode--------------------------------
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357 // Machine function Prolog Node
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358 class MachPrologNode : public MachIdealNode {
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359 public:
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360 MachPrologNode( ) {}
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361 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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362 virtual uint size(PhaseRegAlloc *ra_) const;
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363 virtual int reloc() const;
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364
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365 #ifndef PRODUCT
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366 virtual const char *Name() const { return "Prolog"; }
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367 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
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368 #endif
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369 };
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370
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371 //------------------------------MachEpilogNode--------------------------------
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372 // Machine function Epilog Node
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373 class MachEpilogNode : public MachIdealNode {
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374 public:
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375 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
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376 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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377 virtual uint size(PhaseRegAlloc *ra_) const;
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378 virtual int reloc() const;
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379 virtual const Pipeline *pipeline() const;
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380
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381 private:
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|
382 bool _do_polling;
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383
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384 public:
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385 bool do_polling() const { return _do_polling; }
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386
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387 // Offset of safepoint from the beginning of the node
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|
388 int safepoint_offset() const;
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389
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|
390 #ifndef PRODUCT
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|
391 virtual const char *Name() const { return "Epilog"; }
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392 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
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|
|
393 #endif
|
|
|
394 };
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395
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|
|
396 //------------------------------MachNopNode-----------------------------------
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397 // Machine function Nop Node
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|
398 class MachNopNode : public MachIdealNode {
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399 private:
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400 int _count;
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401 public:
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402 MachNopNode( ) : _count(1) {}
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|
403 MachNopNode( int count ) : _count(count) {}
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404 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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405 virtual uint size(PhaseRegAlloc *ra_) const;
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406
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407 virtual const class Type *bottom_type() const { return Type::CONTROL; }
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408
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|
409 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
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|
|
410 virtual const Pipeline *pipeline() const;
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|
|
411 #ifndef PRODUCT
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412 virtual const char *Name() const { return "Nop"; }
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413 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
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414 virtual void dump_spec(outputStream *st) const { } // No per-operand info
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|
415 #endif
|
|
|
416 };
|
|
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417
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|
|
418 //------------------------------MachSpillCopyNode------------------------------
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419 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
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420 // location (stack or register).
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421 class MachSpillCopyNode : public MachIdealNode {
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422 const RegMask *_in; // RegMask for input
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423 const RegMask *_out; // RegMask for output
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424 const Type *_type;
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425 public:
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426 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) :
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427 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) {
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|
|
428 init_class_id(Class_MachSpillCopy);
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|
|
429 init_flags(Flag_is_Copy);
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|
|
430 add_req(NULL);
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|
|
431 add_req(n);
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|
|
432 }
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|
|
433 virtual uint size_of() const { return sizeof(*this); }
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|
434 void set_out_RegMask(const RegMask &out) { _out = &out; }
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|
435 void set_in_RegMask(const RegMask &in) { _in = ∈ }
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|
436 virtual const RegMask &out_RegMask() const { return *_out; }
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|
437 virtual const RegMask &in_RegMask(uint) const { return *_in; }
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|
438 virtual const class Type *bottom_type() const { return _type; }
|
|
|
439 virtual uint ideal_reg() const { return Matcher::base2reg[_type->base()]; }
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|
440 virtual uint oper_input_base() const { return 1; }
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|
|
441 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
|
|
|
442
|
|
|
443 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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|
444 virtual uint size(PhaseRegAlloc *ra_) const;
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|
445
|
|
|
446 #ifndef PRODUCT
|
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|
447 virtual const char *Name() const { return "MachSpillCopy"; }
|
|
|
448 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
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|
|
449 #endif
|
|
|
450 };
|
|
|
451
|
|
|
452 //------------------------------MachNullChkNode--------------------------------
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|
453 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
|
|
|
454 // also some kind of memory op. Turns the indicated MachNode into a
|
|
|
455 // conditional branch with good latency on the ptr-not-null path and awful
|
|
|
456 // latency on the pointer-is-null path.
|
|
|
457
|
|
|
458 class MachNullCheckNode : public MachIdealNode {
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|
|
459 public:
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|
|
460 const uint _vidx; // Index of memop being tested
|
|
|
461 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachIdealNode(), _vidx(vidx) {
|
|
|
462 init_class_id(Class_MachNullCheck);
|
|
|
463 init_flags(Flag_is_Branch | Flag_is_pc_relative);
|
|
|
464 add_req(ctrl);
|
|
|
465 add_req(memop);
|
|
|
466 }
|
|
|
467
|
|
|
468 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
|
|
|
469 virtual bool pinned() const { return true; };
|
|
|
470 virtual void negate() { }
|
|
|
471 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
|
|
|
472 virtual uint ideal_reg() const { return NotAMachineReg; }
|
|
|
473 virtual const RegMask &in_RegMask(uint) const;
|
|
|
474 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
|
|
|
475 #ifndef PRODUCT
|
|
|
476 virtual const char *Name() const { return "NullCheck"; }
|
|
|
477 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
|
|
|
478 #endif
|
|
|
479 };
|
|
|
480
|
|
|
481 //------------------------------MachProjNode----------------------------------
|
|
|
482 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
|
|
|
483 // just MachNodes made by the Ideal world that replicate simple projections
|
|
|
484 // but with machine-dependent input & output register masks. Generally
|
|
|
485 // produced as part of calling conventions. Normally I make MachNodes as part
|
|
|
486 // of the Matcher process, but the Matcher is ill suited to issues involving
|
|
|
487 // frame handling, so frame handling is all done in the Ideal world with
|
|
|
488 // occasional callbacks to the machine model for important info.
|
|
|
489 class MachProjNode : public ProjNode {
|
|
|
490 public:
|
|
|
491 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {}
|
|
|
492 RegMask _rout;
|
|
|
493 const uint _ideal_reg;
|
|
|
494 enum projType {
|
|
|
495 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
|
|
|
496 fat_proj = 999 // Projs killing many regs, defined by _rout
|
|
|
497 };
|
|
|
498 virtual int Opcode() const;
|
|
|
499 virtual const Type *bottom_type() const;
|
|
|
500 virtual const TypePtr *adr_type() const;
|
|
|
501 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
|
|
|
502 virtual const RegMask &out_RegMask() const { return _rout; }
|
|
|
503 virtual uint ideal_reg() const { return _ideal_reg; }
|
|
|
504 // Need size_of() for virtual ProjNode::clone()
|
|
|
505 virtual uint size_of() const { return sizeof(MachProjNode); }
|
|
|
506 #ifndef PRODUCT
|
|
|
507 virtual void dump_spec(outputStream *st) const;
|
|
|
508 #endif
|
|
|
509 };
|
|
|
510
|
|
|
511 //------------------------------MachIfNode-------------------------------------
|
|
|
512 // Machine-specific versions of IfNodes
|
|
|
513 class MachIfNode : public MachNode {
|
|
|
514 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
|
|
|
515 public:
|
|
|
516 float _prob; // Probability branch goes either way
|
|
|
517 float _fcnt; // Frequency counter
|
|
|
518 MachIfNode() : MachNode() {
|
|
|
519 init_class_id(Class_MachIf);
|
|
|
520 }
|
|
|
521 #ifndef PRODUCT
|
|
|
522 virtual void dump_spec(outputStream *st) const;
|
|
|
523 #endif
|
|
|
524 };
|
|
|
525
|
|
|
526 //------------------------------MachFastLockNode-------------------------------------
|
|
|
527 // Machine-specific versions of FastLockNodes
|
|
|
528 class MachFastLockNode : public MachNode {
|
|
|
529 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
|
|
|
530 public:
|
|
|
531 BiasedLockingCounters* _counters;
|
|
|
532
|
|
|
533 MachFastLockNode() : MachNode() {}
|
|
|
534 };
|
|
|
535
|
|
|
536 //------------------------------MachReturnNode--------------------------------
|
|
|
537 // Machine-specific versions of subroutine returns
|
|
|
538 class MachReturnNode : public MachNode {
|
|
|
539 virtual uint size_of() const; // Size is bigger
|
|
|
540 public:
|
|
|
541 RegMask *_in_rms; // Input register masks, set during allocation
|
|
|
542 ReallocMark _nesting; // assertion check for reallocations
|
|
|
543 const TypePtr* _adr_type; // memory effects of call or return
|
|
|
544 MachReturnNode() : MachNode() {
|
|
|
545 init_class_id(Class_MachReturn);
|
|
|
546 _adr_type = TypePtr::BOTTOM; // the default: all of memory
|
|
|
547 }
|
|
|
548
|
|
|
549 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
|
|
|
550
|
|
|
551 virtual const RegMask &in_RegMask(uint) const;
|
|
|
552 virtual bool pinned() const { return true; };
|
|
|
553 virtual const TypePtr *adr_type() const;
|
|
|
554 };
|
|
|
555
|
|
|
556 //------------------------------MachSafePointNode-----------------------------
|
|
|
557 // Machine-specific versions of safepoints
|
|
|
558 class MachSafePointNode : public MachReturnNode {
|
|
|
559 public:
|
|
|
560 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
|
|
|
561 JVMState* _jvms; // Pointer to list of JVM State Objects
|
|
|
562 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
|
|
|
563 OopMap* oop_map() const { return _oop_map; }
|
|
|
564 void set_oop_map(OopMap* om) { _oop_map = om; }
|
|
|
565
|
|
|
566 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) {
|
|
|
567 init_class_id(Class_MachSafePoint);
|
|
|
568 init_flags(Flag_is_safepoint_node);
|
|
|
569 }
|
|
|
570
|
|
|
571 virtual JVMState* jvms() const { return _jvms; }
|
|
|
572 void set_jvms(JVMState* s) {
|
|
|
573 _jvms = s;
|
|
|
574 }
|
|
|
575 bool is_safepoint_node() const { return (flags() & Flag_is_safepoint_node) != 0; }
|
|
|
576 virtual const Type *bottom_type() const;
|
|
|
577
|
|
|
578 virtual const RegMask &in_RegMask(uint) const;
|
|
|
579
|
|
|
580 // Functionality from old debug nodes
|
|
|
581 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
|
|
|
582 Node *frameptr () const { return in(TypeFunc::FramePtr); }
|
|
|
583
|
|
|
584 Node *local(const JVMState* jvms, uint idx) const {
|
|
|
585 assert(verify_jvms(jvms), "jvms must match");
|
|
|
586 return in(_jvmadj + jvms->locoff() + idx);
|
|
|
587 }
|
|
|
588 Node *stack(const JVMState* jvms, uint idx) const {
|
|
|
589 assert(verify_jvms(jvms), "jvms must match");
|
|
|
590 return in(_jvmadj + jvms->stkoff() + idx);
|
|
|
591 }
|
|
|
592 Node *monitor_obj(const JVMState* jvms, uint idx) const {
|
|
|
593 assert(verify_jvms(jvms), "jvms must match");
|
|
|
594 return in(_jvmadj + jvms->monitor_obj_offset(idx));
|
|
|
595 }
|
|
|
596 Node *monitor_box(const JVMState* jvms, uint idx) const {
|
|
|
597 assert(verify_jvms(jvms), "jvms must match");
|
|
|
598 return in(_jvmadj + jvms->monitor_box_offset(idx));
|
|
|
599 }
|
|
|
600 void set_local(const JVMState* jvms, uint idx, Node *c) {
|
|
|
601 assert(verify_jvms(jvms), "jvms must match");
|
|
|
602 set_req(_jvmadj + jvms->locoff() + idx, c);
|
|
|
603 }
|
|
|
604 void set_stack(const JVMState* jvms, uint idx, Node *c) {
|
|
|
605 assert(verify_jvms(jvms), "jvms must match");
|
|
|
606 set_req(_jvmadj + jvms->stkoff() + idx, c);
|
|
|
607 }
|
|
|
608 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
|
|
|
609 assert(verify_jvms(jvms), "jvms must match");
|
|
|
610 set_req(_jvmadj + jvms->monoff() + idx, c);
|
|
|
611 }
|
|
|
612 };
|
|
|
613
|
|
|
614 //------------------------------MachCallNode----------------------------------
|
|
|
615 // Machine-specific versions of subroutine calls
|
|
|
616 class MachCallNode : public MachSafePointNode {
|
|
|
617 protected:
|
|
|
618 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
|
|
|
619 virtual uint cmp( const Node &n ) const;
|
|
|
620 virtual uint size_of() const = 0; // Size is bigger
|
|
|
621 public:
|
|
|
622 const TypeFunc *_tf; // Function type
|
|
|
623 address _entry_point; // Address of the method being called
|
|
|
624 float _cnt; // Estimate of number of times called
|
|
|
625 uint _argsize; // Size of argument block on stack
|
|
|
626
|
|
|
627 const TypeFunc* tf() const { return _tf; }
|
|
|
628 const address entry_point() const { return _entry_point; }
|
|
|
629 const float cnt() const { return _cnt; }
|
|
|
630 uint argsize() const { return _argsize; }
|
|
|
631
|
|
|
632 void set_tf(const TypeFunc* tf) { _tf = tf; }
|
|
|
633 void set_entry_point(address p) { _entry_point = p; }
|
|
|
634 void set_cnt(float c) { _cnt = c; }
|
|
|
635 void set_argsize(int s) { _argsize = s; }
|
|
|
636
|
|
|
637 MachCallNode() : MachSafePointNode() {
|
|
|
638 init_class_id(Class_MachCall);
|
|
|
639 init_flags(Flag_is_Call);
|
|
|
640 }
|
|
|
641
|
|
|
642 virtual const Type *bottom_type() const;
|
|
|
643 virtual bool pinned() const { return false; }
|
|
|
644 virtual const Type *Value( PhaseTransform *phase ) const;
|
|
|
645 virtual const RegMask &in_RegMask(uint) const;
|
|
|
646 virtual int ret_addr_offset() { return 0; }
|
|
|
647
|
|
|
648 bool returns_long() const { return tf()->return_type() == T_LONG; }
|
|
|
649 bool return_value_is_used() const;
|
|
|
650 #ifndef PRODUCT
|
|
|
651 virtual void dump_spec(outputStream *st) const;
|
|
|
652 #endif
|
|
|
653 };
|
|
|
654
|
|
|
655 //------------------------------MachCallJavaNode------------------------------
|
|
|
656 // "Base" class for machine-specific versions of subroutine calls
|
|
|
657 class MachCallJavaNode : public MachCallNode {
|
|
|
658 protected:
|
|
|
659 virtual uint cmp( const Node &n ) const;
|
|
|
660 virtual uint size_of() const; // Size is bigger
|
|
|
661 public:
|
|
|
662 ciMethod* _method; // Method being direct called
|
|
|
663 int _bci; // Byte Code index of call byte code
|
|
|
664 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
|
|
|
665 MachCallJavaNode() : MachCallNode() {
|
|
|
666 init_class_id(Class_MachCallJava);
|
|
|
667 }
|
|
|
668 #ifndef PRODUCT
|
|
|
669 virtual void dump_spec(outputStream *st) const;
|
|
|
670 #endif
|
|
|
671 };
|
|
|
672
|
|
|
673 //------------------------------MachCallStaticJavaNode------------------------
|
|
|
674 // Machine-specific versions of monomorphic subroutine calls
|
|
|
675 class MachCallStaticJavaNode : public MachCallJavaNode {
|
|
|
676 virtual uint cmp( const Node &n ) const;
|
|
|
677 virtual uint size_of() const; // Size is bigger
|
|
|
678 public:
|
|
|
679 const char *_name; // Runtime wrapper name
|
|
|
680 MachCallStaticJavaNode() : MachCallJavaNode() {
|
|
|
681 init_class_id(Class_MachCallStaticJava);
|
|
|
682 }
|
|
|
683
|
|
|
684 // If this is an uncommon trap, return the request code, else zero.
|
|
|
685 int uncommon_trap_request() const;
|
|
|
686
|
|
|
687 virtual int ret_addr_offset();
|
|
|
688 #ifndef PRODUCT
|
|
|
689 virtual void dump_spec(outputStream *st) const;
|
|
|
690 void dump_trap_args(outputStream *st) const;
|
|
|
691 #endif
|
|
|
692 };
|
|
|
693
|
|
|
694 //------------------------------MachCallDynamicJavaNode------------------------
|
|
|
695 // Machine-specific versions of possibly megamorphic subroutine calls
|
|
|
696 class MachCallDynamicJavaNode : public MachCallJavaNode {
|
|
|
697 public:
|
|
|
698 int _vtable_index;
|
|
|
699 MachCallDynamicJavaNode() : MachCallJavaNode() {
|
|
|
700 init_class_id(Class_MachCallDynamicJava);
|
|
|
701 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
|
|
|
702 }
|
|
|
703 virtual int ret_addr_offset();
|
|
|
704 #ifndef PRODUCT
|
|
|
705 virtual void dump_spec(outputStream *st) const;
|
|
|
706 #endif
|
|
|
707 };
|
|
|
708
|
|
|
709 //------------------------------MachCallRuntimeNode----------------------------
|
|
|
710 // Machine-specific versions of subroutine calls
|
|
|
711 class MachCallRuntimeNode : public MachCallNode {
|
|
|
712 virtual uint cmp( const Node &n ) const;
|
|
|
713 virtual uint size_of() const; // Size is bigger
|
|
|
714 public:
|
|
|
715 const char *_name; // Printable name, if _method is NULL
|
|
|
716 MachCallRuntimeNode() : MachCallNode() {
|
|
|
717 init_class_id(Class_MachCallRuntime);
|
|
|
718 }
|
|
|
719 virtual int ret_addr_offset();
|
|
|
720 #ifndef PRODUCT
|
|
|
721 virtual void dump_spec(outputStream *st) const;
|
|
|
722 #endif
|
|
|
723 };
|
|
|
724
|
|
|
725 class MachCallLeafNode: public MachCallRuntimeNode {
|
|
|
726 public:
|
|
|
727 MachCallLeafNode() : MachCallRuntimeNode() {
|
|
|
728 init_class_id(Class_MachCallLeaf);
|
|
|
729 }
|
|
|
730 };
|
|
|
731
|
|
|
732 //------------------------------MachHaltNode-----------------------------------
|
|
|
733 // Machine-specific versions of halt nodes
|
|
|
734 class MachHaltNode : public MachReturnNode {
|
|
|
735 public:
|
|
|
736 virtual JVMState* jvms() const;
|
|
|
737 };
|
|
|
738
|
|
|
739
|
|
|
740 //------------------------------MachTempNode-----------------------------------
|
|
|
741 // Node used by the adlc to construct inputs to represent temporary registers
|
|
|
742 class MachTempNode : public MachNode {
|
|
|
743 private:
|
|
|
744 MachOper *_opnd_array[1];
|
|
|
745
|
|
|
746 public:
|
|
|
747 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
|
|
|
748 virtual uint rule() const { return 9999999; }
|
|
|
749 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
|
|
|
750
|
|
|
751 MachTempNode(MachOper* oper) {
|
|
|
752 init_class_id(Class_MachTemp);
|
|
|
753 _num_opnds = 1;
|
|
|
754 _opnds = _opnd_array;
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755 add_req(NULL);
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756 _opnds[0] = oper;
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757 }
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758 virtual uint size_of() const { return sizeof(MachTempNode); }
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759
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760 #ifndef PRODUCT
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761 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
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762 virtual const char *Name() const { return "MachTemp";}
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763 #endif
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764 };
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765
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766
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767
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768 //------------------------------labelOper--------------------------------------
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769 // Machine-independent version of label operand
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770 class labelOper : public MachOper {
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771 private:
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772 virtual uint num_edges() const { return 0; }
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773 public:
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774 // Supported for fixed size branches
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775 Label* _label; // Label for branch(es)
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776
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777 uint _block_num;
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778
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779 labelOper() : _block_num(0), _label(0) {}
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780
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781 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
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782
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783 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
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784
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785 virtual MachOper *clone(Compile* C) const;
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786
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787 virtual Label *label() const { return _label; }
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788
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789 virtual uint opcode() const;
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790
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791 virtual uint hash() const;
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792 virtual uint cmp( const MachOper &oper ) const;
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793 #ifndef PRODUCT
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794 virtual const char *Name() const { return "Label";}
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795
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796 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
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797 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
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798 #endif
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|
799 };
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|
800
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801
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|
802 //------------------------------methodOper--------------------------------------
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803 // Machine-independent version of method operand
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804 class methodOper : public MachOper {
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|
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805 private:
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806 virtual uint num_edges() const { return 0; }
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807 public:
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808 intptr_t _method; // Address of method
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809 methodOper() : _method(0) {}
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810 methodOper(intptr_t method) : _method(method) {}
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811
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|
|
812 virtual MachOper *clone(Compile* C) const;
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|
|
813
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|
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814 virtual intptr_t method() const { return _method; }
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|
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815
|
|
|
816 virtual uint opcode() const;
|
|
|
817
|
|
|
818 virtual uint hash() const;
|
|
|
819 virtual uint cmp( const MachOper &oper ) const;
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|
|
820 #ifndef PRODUCT
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|
|
821 virtual const char *Name() const { return "Method";}
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|
|
822
|
|
|
823 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
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|
|
824 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
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|
|
825 #endif
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|
|
826 };
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