Mercurial > hg > truffle
annotate src/cpu/x86/vm/relocInfo_x86.cpp @ 6943:dbeaeee28bc2
8002294: assert(VM_Version::supports_ssse3()) failed
Summary: Add missing UseSSE check for AES intrinsics.
Reviewed-by: roland, twisti
| author | kvn |
|---|---|
| date | Tue, 06 Nov 2012 09:22:55 -0800 |
| parents | da91efe96a93 |
| children | cd3d6a6b95d9 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
| 26 #include "asm/assembler.inline.hpp" | |
| 27 #include "assembler_x86.inline.hpp" | |
| 28 #include "code/relocInfo.hpp" | |
| 29 #include "nativeInst_x86.hpp" | |
| 30 #include "oops/oop.inline.hpp" | |
| 31 #include "runtime/safepoint.hpp" | |
| 0 | 32 |
| 33 | |
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34 void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) { |
| 0 | 35 #ifdef AMD64 |
| 36 x += o; | |
| 37 typedef Assembler::WhichOperand WhichOperand; | |
| 304 | 38 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm, call32, narrow oop |
| 0 | 39 assert(which == Assembler::disp32_operand || |
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40 which == Assembler::narrow_oop_operand || |
| 304 | 41 which == Assembler::imm_operand, "format unpacks ok"); |
| 42 if (which == Assembler::imm_operand) { | |
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43 if (verify_only) { |
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44 assert(*pd_address_in_code() == x, "instructions must match"); |
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45 } else { |
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46 *pd_address_in_code() = x; |
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47 } |
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48 } else if (which == Assembler::narrow_oop_operand) { |
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49 address disp = Assembler::locate_operand(addr(), which); |
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50 // both compressed oops and compressed classes look the same |
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51 if (Universe::heap()->is_in_reserved((oop)x)) { |
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52 if (verify_only) { |
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53 assert(*(uint32_t*) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match"); |
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54 } else { |
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55 *(int32_t*) disp = oopDesc::encode_heap_oop((oop)x); |
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56 } |
| 0 | 57 } else { |
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58 if (verify_only) { |
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59 assert(*(uint32_t*) disp == oopDesc::encode_klass((Klass*)x), "instructions must match"); |
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60 } else { |
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61 *(int32_t*) disp = oopDesc::encode_klass((Klass*)x); |
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62 } |
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63 } |
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64 } else { |
| 0 | 65 // Note: Use runtime_call_type relocations for call32_operand. |
| 66 address ip = addr(); | |
| 67 address disp = Assembler::locate_operand(ip, which); | |
| 68 address next_ip = Assembler::locate_next_instruction(ip); | |
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69 if (verify_only) { |
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70 assert(*(int32_t*) disp == (x - next_ip), "instructions must match"); |
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71 } else { |
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72 *(int32_t*) disp = x - next_ip; |
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73 } |
| 0 | 74 } |
| 75 #else | |
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76 if (verify_only) { |
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77 assert(*pd_address_in_code() == (x + o), "instructions must match"); |
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78 } else { |
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79 *pd_address_in_code() = x + o; |
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80 } |
| 0 | 81 #endif // AMD64 |
| 82 } | |
| 83 | |
| 84 | |
| 85 address Relocation::pd_call_destination(address orig_addr) { | |
| 86 intptr_t adj = 0; | |
| 87 if (orig_addr != NULL) { | |
| 88 // We just moved this call instruction from orig_addr to addr(). | |
| 89 // This means its target will appear to have grown by addr() - orig_addr. | |
| 90 adj = -( addr() - orig_addr ); | |
| 91 } | |
| 92 NativeInstruction* ni = nativeInstruction_at(addr()); | |
| 93 if (ni->is_call()) { | |
| 94 return nativeCall_at(addr())->destination() + adj; | |
| 95 } else if (ni->is_jump()) { | |
| 96 return nativeJump_at(addr())->jump_destination() + adj; | |
| 97 } else if (ni->is_cond_jump()) { | |
| 98 return nativeGeneralJump_at(addr())->jump_destination() + adj; | |
| 99 } else if (ni->is_mov_literal64()) { | |
| 100 return (address) ((NativeMovConstReg*)ni)->data(); | |
| 101 } else { | |
| 102 ShouldNotReachHere(); | |
| 103 return NULL; | |
| 104 } | |
| 105 } | |
| 106 | |
| 107 | |
| 108 void Relocation::pd_set_call_destination(address x) { | |
| 109 NativeInstruction* ni = nativeInstruction_at(addr()); | |
| 110 if (ni->is_call()) { | |
| 111 nativeCall_at(addr())->set_destination(x); | |
| 112 } else if (ni->is_jump()) { | |
| 113 NativeJump* nj = nativeJump_at(addr()); | |
| 304 | 114 |
| 115 // Unresolved jumps are recognized by a destination of -1 | |
| 116 // However 64bit can't actually produce such an address | |
| 117 // and encodes a jump to self but jump_destination will | |
| 118 // return a -1 as the signal. We must not relocate this | |
| 119 // jmp or the ic code will not see it as unresolved. | |
| 120 | |
| 0 | 121 if (nj->jump_destination() == (address) -1) { |
| 304 | 122 x = addr(); // jump to self |
| 0 | 123 } |
| 124 nj->set_jump_destination(x); | |
| 125 } else if (ni->is_cond_jump()) { | |
| 126 // %%%% kludge this, for now, until we get a jump_destination method | |
| 127 address old_dest = nativeGeneralJump_at(addr())->jump_destination(); | |
| 128 address disp = Assembler::locate_operand(addr(), Assembler::call32_operand); | |
| 129 *(jint*)disp += (x - old_dest); | |
| 130 } else if (ni->is_mov_literal64()) { | |
| 131 ((NativeMovConstReg*)ni)->set_data((intptr_t)x); | |
| 132 } else { | |
| 133 ShouldNotReachHere(); | |
| 134 } | |
| 135 } | |
| 136 | |
| 137 | |
| 138 address* Relocation::pd_address_in_code() { | |
| 139 // All embedded Intel addresses are stored in 32-bit words. | |
| 140 // Since the addr points at the start of the instruction, | |
| 141 // we must parse the instruction a bit to find the embedded word. | |
| 142 assert(is_data(), "must be a DataRelocation"); | |
| 143 typedef Assembler::WhichOperand WhichOperand; | |
| 304 | 144 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32 |
| 0 | 145 #ifdef AMD64 |
| 146 assert(which == Assembler::disp32_operand || | |
| 147 which == Assembler::call32_operand || | |
| 304 | 148 which == Assembler::imm_operand, "format unpacks ok"); |
| 149 if (which != Assembler::imm_operand) { | |
| 0 | 150 // The "address" in the code is a displacement can't return it as |
| 151 // and address* since it is really a jint* | |
| 152 ShouldNotReachHere(); | |
| 153 return NULL; | |
| 154 } | |
| 155 #else | |
| 304 | 156 assert(which == Assembler::disp32_operand || which == Assembler::imm_operand, "format unpacks ok"); |
| 0 | 157 #endif // AMD64 |
| 158 return (address*) Assembler::locate_operand(addr(), which); | |
| 159 } | |
| 160 | |
| 161 | |
| 162 address Relocation::pd_get_address_from_code() { | |
| 163 #ifdef AMD64 | |
| 164 // All embedded Intel addresses are stored in 32-bit words. | |
| 165 // Since the addr points at the start of the instruction, | |
| 166 // we must parse the instruction a bit to find the embedded word. | |
| 167 assert(is_data(), "must be a DataRelocation"); | |
| 168 typedef Assembler::WhichOperand WhichOperand; | |
| 304 | 169 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32 |
| 0 | 170 assert(which == Assembler::disp32_operand || |
| 171 which == Assembler::call32_operand || | |
| 304 | 172 which == Assembler::imm_operand, "format unpacks ok"); |
| 173 if (which != Assembler::imm_operand) { | |
| 0 | 174 address ip = addr(); |
| 175 address disp = Assembler::locate_operand(ip, which); | |
| 176 address next_ip = Assembler::locate_next_instruction(ip); | |
| 177 address a = next_ip + *(int32_t*) disp; | |
| 178 return a; | |
| 179 } | |
| 180 #endif // AMD64 | |
| 181 return *pd_address_in_code(); | |
| 182 } | |
| 183 | |
| 184 int Relocation::pd_breakpoint_size() { | |
| 185 // minimum breakpoint size, in short words | |
| 186 return NativeIllegalInstruction::instruction_size / sizeof(short); | |
| 187 } | |
| 188 | |
| 189 void Relocation::pd_swap_in_breakpoint(address x, short* instrs, int instrlen) { | |
| 190 Untested("pd_swap_in_breakpoint"); | |
| 191 if (instrs != NULL) { | |
| 192 assert(instrlen * sizeof(short) == NativeIllegalInstruction::instruction_size, "enough instrlen in reloc. data"); | |
| 193 for (int i = 0; i < instrlen; i++) { | |
| 194 instrs[i] = ((short*)x)[i]; | |
| 195 } | |
| 196 } | |
| 197 NativeIllegalInstruction::insert(x); | |
| 198 } | |
| 199 | |
| 200 | |
| 201 void Relocation::pd_swap_out_breakpoint(address x, short* instrs, int instrlen) { | |
| 202 Untested("pd_swap_out_breakpoint"); | |
| 203 assert(NativeIllegalInstruction::instruction_size == sizeof(short), "right address unit for update"); | |
| 204 NativeInstruction* ni = nativeInstruction_at(x); | |
| 205 *(short*)ni->addr_at(0) = instrs[0]; | |
| 206 } | |
| 304 | 207 |
| 208 void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) { | |
| 209 #ifdef _LP64 | |
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210 if (!Assembler::is_polling_page_far()) { |
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211 typedef Assembler::WhichOperand WhichOperand; |
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212 WhichOperand which = (WhichOperand) format(); |
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213 // This format is imm but it is really disp32 |
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214 which = Assembler::disp32_operand; |
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215 address orig_addr = old_addr_for(addr(), src, dest); |
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216 NativeInstruction* oni = nativeInstruction_at(orig_addr); |
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217 int32_t* orig_disp = (int32_t*) Assembler::locate_operand(orig_addr, which); |
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218 // This poll_addr is incorrect by the size of the instruction it is irrelevant |
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219 intptr_t poll_addr = (intptr_t)oni + *orig_disp; |
| 304 | 220 |
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221 NativeInstruction* ni = nativeInstruction_at(addr()); |
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222 intptr_t new_disp = poll_addr - (intptr_t) ni; |
| 304 | 223 |
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224 int32_t* disp = (int32_t*) Assembler::locate_operand(addr(), which); |
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225 * disp = (int32_t)new_disp; |
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226 } |
| 304 | 227 #endif // _LP64 |
| 228 } | |
| 229 | |
| 230 void poll_return_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) { | |
| 231 #ifdef _LP64 | |
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232 if (!Assembler::is_polling_page_far()) { |
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233 typedef Assembler::WhichOperand WhichOperand; |
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234 WhichOperand which = (WhichOperand) format(); |
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235 // This format is imm but it is really disp32 |
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236 which = Assembler::disp32_operand; |
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237 address orig_addr = old_addr_for(addr(), src, dest); |
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238 NativeInstruction* oni = nativeInstruction_at(orig_addr); |
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239 int32_t* orig_disp = (int32_t*) Assembler::locate_operand(orig_addr, which); |
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240 // This poll_addr is incorrect by the size of the instruction it is irrelevant |
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241 intptr_t poll_addr = (intptr_t)oni + *orig_disp; |
| 304 | 242 |
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243 NativeInstruction* ni = nativeInstruction_at(addr()); |
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244 intptr_t new_disp = poll_addr - (intptr_t) ni; |
| 304 | 245 |
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246 int32_t* disp = (int32_t*) Assembler::locate_operand(addr(), which); |
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247 * disp = (int32_t)new_disp; |
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248 } |
| 304 | 249 #endif // _LP64 |
| 250 } | |
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251 |
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252 void metadata_Relocation::pd_fix_value(address x) { |
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253 } |