Mercurial > hg > truffle
annotate src/cpu/sparc/vm/c1_LinearScan_sparc.hpp @ 1932:e6500c6c5e24
Removed launch configuration.
author | Thomas Wuerthinger <wuerthinger@ssw.jku.at> |
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date | Tue, 21 Dec 2010 17:09:37 +0100 |
parents | 357451a9ae6a |
children | f95d63e2154a |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2005, 2006, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
25 inline bool LinearScan::is_processed_reg_num(int reg_num) { | |
26 return reg_num < 26 || reg_num > 31; | |
27 } | |
28 | |
29 inline int LinearScan::num_physical_regs(BasicType type) { | |
30 // Sparc requires two cpu registers for long | |
31 // and two cpu registers for double | |
32 #ifdef _LP64 | |
33 if (type == T_DOUBLE) { | |
34 #else | |
35 if (type == T_DOUBLE || type == T_LONG) { | |
36 #endif | |
37 return 2; | |
38 } | |
39 return 1; | |
40 } | |
41 | |
42 | |
43 inline bool LinearScan::requires_adjacent_regs(BasicType type) { | |
44 #ifdef _LP64 | |
45 return type == T_DOUBLE; | |
46 #else | |
47 return type == T_DOUBLE || type == T_LONG; | |
48 #endif | |
49 } | |
50 | |
51 inline bool LinearScan::is_caller_save(int assigned_reg) { | |
52 return assigned_reg > pd_last_callee_saved_reg && assigned_reg <= pd_last_fpu_reg; | |
53 } | |
54 | |
55 | |
56 inline void LinearScan::pd_add_temps(LIR_Op* op) { | |
57 // No special case behaviours yet | |
58 } | |
59 | |
60 | |
61 inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) { | |
62 if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::callee_saved)) { | |
63 assert(cur->type() != T_FLOAT && cur->type() != T_DOUBLE, "cpu regs only"); | |
64 _first_reg = pd_first_callee_saved_reg; | |
65 _last_reg = pd_last_callee_saved_reg; | |
66 return true; | |
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6991211: assert failure on sparc: "can not have caller-save register operands at calls"
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67 } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT || cur->type() == T_ADDRESS) { |
0 | 68 _first_reg = pd_first_cpu_reg; |
69 _last_reg = pd_last_allocatable_cpu_reg; | |
70 return true; | |
71 } | |
72 return false; | |
73 } |