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annotate src/gpu/ptx/vm/ptxKernelArguments.cpp @ 13212:eb03a7335eb0

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Use fixed instead of virtual register for target in far foreign call, since the register allocator does not support virtual registers to be used at call sites.
author Christian Wimmer <christian.wimmer@oracle.com>
date Mon, 02 Dec 2013 14:20:32 -0800
parents 1a7e7011a341
children
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11485
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1 /*
49bb1bc983c6 Implement several missing PTX codegen features; return value capture and method args passing of java method executed on GPU.
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2 * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
49bb1bc983c6 Implement several missing PTX codegen features; return value capture and method args passing of java method executed on GPU.
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
49bb1bc983c6 Implement several missing PTX codegen features; return value capture and method args passing of java method executed on GPU.
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
49bb1bc983c6 Implement several missing PTX codegen features; return value capture and method args passing of java method executed on GPU.
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
49bb1bc983c6 Implement several missing PTX codegen features; return value capture and method args passing of java method executed on GPU.
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
49bb1bc983c6 Implement several missing PTX codegen features; return value capture and method args passing of java method executed on GPU.
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
49bb1bc983c6 Implement several missing PTX codegen features; return value capture and method args passing of java method executed on GPU.
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
49bb1bc983c6 Implement several missing PTX codegen features; return value capture and method args passing of java method executed on GPU.
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22 *
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23 */
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24
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25 #include "precompiled.hpp"
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26 #include "ptxKernelArguments.hpp"
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27 #include "runtime/javaCalls.hpp"
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28
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29 gpu::Ptx::cuda_cu_memalloc_func_t gpu::Ptx::_cuda_cu_memalloc;
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30 gpu::Ptx::cuda_cu_memcpy_htod_func_t gpu::Ptx::_cuda_cu_memcpy_htod;
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31
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32 // Get next java argument
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33 oop PTXKernelArguments::next_arg(BasicType expectedType) {
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34 assert(_index < _args->length(), "out of bounds");
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35 oop arg = ((objArrayOop) (_args))->obj_at(_index++);
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36 assert(expectedType == T_OBJECT ||
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37 java_lang_boxing_object::is_instance(arg, expectedType), "arg type mismatch");
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38 return arg;
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39 }
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40
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41 /*
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42 * Pad kernel argument buffer to naturally align for given size.
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43 */
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44 void PTXKernelArguments::pad_kernel_argument_buffer(size_t dataSz) {
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45 while ((_bufferOffset % dataSz) != 0) {
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46 *((gpu::Ptx::CUdeviceptr*) &_kernelArgBuffer[_bufferOffset]) = (char) 0;
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47 _bufferOffset += sizeof(char);
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48 }
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49 return;
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50 }
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51 void PTXKernelArguments::do_int() {
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52 // If the parameter is a return value,
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53 if (is_return_type()) {
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54 // Allocate device memory for T_INT return value pointer on device. Size in bytes
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55 int status = gpu::Ptx::_cuda_cu_memalloc(&_dev_return_value, T_INT_BYTE_SIZE);
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56 if (status != GRAAL_CUDA_SUCCESS) {
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57 tty->print_cr("[CUDA] *** Error (%d) Failed to allocate memory for return value pointer on device", status);
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58 _success = false;
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59 return;
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60 }
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61
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62 // Kernel arguments are expected to be naturally aligned.
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63 // Insert padding into kernel argument buffer, if needed.
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64 pad_kernel_argument_buffer(sizeof(_dev_return_value));
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65 // Push _dev_return_value to _kernelBuffer
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66 *((gpu::Ptx::CUdeviceptr*) &_kernelArgBuffer[_bufferOffset]) = _dev_return_value;
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67 _bufferOffset += sizeof(_dev_return_value);
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68 } else {
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69 // Get the next java argument and its value which should be a T_INT
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70 oop arg = next_arg(T_INT);
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71 // Copy the java argument value to kernelArgBuffer
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72 jvalue intval;
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73 if (java_lang_boxing_object::get_value(arg, &intval) != T_INT) {
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74 tty->print_cr("[CUDA] *** Error: Unexpected argument type; expecting T_INT");
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75 _success = false;
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76 return;
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77 }
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78
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79 // Kernel arguments are expected to be naturally aligned.
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80 // Insert padding into kernel argument buffer, if needed.
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81 pad_kernel_argument_buffer(sizeof(intval.i));
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82 // Push _dev_return_value to _kernelBuffer
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83 *((gpu::Ptx::CUdeviceptr*) &_kernelArgBuffer[_bufferOffset]) = intval.i;
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84
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85 // Advance _bufferOffset
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86 _bufferOffset += sizeof(intval.i);
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87 }
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88 return;
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89 }
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90
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91 void PTXKernelArguments::do_float() {
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92 // If the parameter is a return value,
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93 if (is_return_type()) {
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94 // Allocate device memory for T_FLOAT return value pointer on device. Size in bytes
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95 int status = gpu::Ptx::_cuda_cu_memalloc(&_dev_return_value, T_FLOAT_BYTE_SIZE);
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96 if (status != GRAAL_CUDA_SUCCESS) {
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97 tty->print_cr("[CUDA] *** Error (%d) Failed to allocate memory for return value pointer on device", status);
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98 _success = false;
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99 return;
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100 }
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101 // Kernel arguments are expected to be naturally aligned.
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102 // Insert padding into kernel argument buffer, if needed.
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103 pad_kernel_argument_buffer(sizeof(_dev_return_value));
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104 // Push _dev_return_value to _kernelBuffer
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105 *((gpu::Ptx::CUdeviceptr*) &_kernelArgBuffer[_bufferOffset]) = _dev_return_value;
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106 // Advance _bufferOffset
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107 _bufferOffset += sizeof(_dev_return_value);
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108 } else {
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109 // Get the next java argument and its value which should be a T_FLOAT
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110 oop arg = next_arg(T_FLOAT);
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111 // Copy the java argument value to kernelArgBuffer
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112 jvalue floatval;
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113 if (java_lang_boxing_object::get_value(arg, &floatval) != T_FLOAT) {
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114 tty->print_cr("[CUDA] *** Error: Unexpected argument type; expecting T_FLOAT");
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115 _success = false;
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116 return;
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117 }
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118 // Kernel arguments are expected to be naturally aligned.
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119 // Insert padding into kernel argument buffer, if needed.
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120 pad_kernel_argument_buffer(sizeof(floatval.f));
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121 *((gpu::Ptx::CUdeviceptr*) &_kernelArgBuffer[_bufferOffset]) = (gpu::Ptx::CUdeviceptr) floatval.f;
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122
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123 // Advance _bufferOffset
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124 _bufferOffset += sizeof(floatval.f);
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125 }
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126 return;
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127 }
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128
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129 void PTXKernelArguments::do_double() {
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130 // If the parameter is a return value,
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131 jvalue doubleval;
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132 if (is_return_type()) {
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133 // Allocate device memory for T_DOUBLE return value pointer on device. Size in bytes
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134 int status = gpu::Ptx::_cuda_cu_memalloc(&_dev_return_value, T_DOUBLE_BYTE_SIZE);
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135 if (status != GRAAL_CUDA_SUCCESS) {
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136 tty->print_cr("[CUDA] *** Error (%d) Failed to allocate memory for return value pointer on device", status);
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137 _success = false;
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138 return;
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139 }
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140 // Kernel arguments are expected to be naturally aligned.
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141 // Insert padding into kernel argument buffer, if needed.
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142 pad_kernel_argument_buffer(sizeof(_dev_return_value));
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143 // Push _dev_return_value to _kernelBuffer
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144 *((gpu::Ptx::CUdeviceptr*) &_kernelArgBuffer[_bufferOffset]) = _dev_return_value;
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145 // Advance _bufferOffset.
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146 _bufferOffset += sizeof(doubleval.d);
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147 } else {
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148 // Get the next java argument and its value which should be a T_INT
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149 oop arg = next_arg(T_FLOAT);
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150 // Copy the java argument value to kernelArgBuffer
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151 if (java_lang_boxing_object::get_value(arg, &doubleval) != T_DOUBLE) {
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152 tty->print_cr("[CUDA] *** Error: Unexpected argument type; expecting T_INT");
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153 _success = false;
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154 return;
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155 }
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156 // Kernel arguments are expected to be naturally aligned.
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157 // Insert padding into kernel argument buffer, if needed.
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158 pad_kernel_argument_buffer(sizeof(doubleval.d));
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159 *((gpu::Ptx::CUdeviceptr*) &_kernelArgBuffer[_bufferOffset]) = (gpu::Ptx::CUdeviceptr) doubleval.d;
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160
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161 // Advance _bufferOffset
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162 _bufferOffset += sizeof(doubleval.d);
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163 // For a 64-bit host, since size of double is 8, there is no need
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164 // to pad the kernel argument buffer to ensure 8-byte alignment of
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165 // the next potential argument to be pushed.
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166 }
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167 return;
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168 }
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169
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170 void PTXKernelArguments::do_long() {
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171 // If the parameter is a return value,
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172 if (is_return_type()) {
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173 // Allocate device memory for T_LONG return value pointer on device. Size in bytes
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174 int status = gpu::Ptx::_cuda_cu_memalloc(&_dev_return_value, T_LONG_BYTE_SIZE);
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175 if (status != GRAAL_CUDA_SUCCESS) {
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176 tty->print_cr("[CUDA] *** Error (%d) Failed to allocate memory for return value pointer on device", status);
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177 _success = false;
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178 return;
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179 }
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180 // Kernel arguments are expected to be naturally aligned.
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181 // Insert padding into kernel argument buffer, if needed.
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182 pad_kernel_argument_buffer(sizeof(_dev_return_value));
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183 // Push _dev_return_value to _kernelBuffer
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184 *((gpu::Ptx::CUdeviceptr*) &_kernelArgBuffer[_bufferOffset]) = _dev_return_value;
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185 // Advance _bufferOffset
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186 _bufferOffset += sizeof(_dev_return_value);
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187 } else {
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188 // Get the next java argument and its value which should be a T_LONG
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189 oop arg = next_arg(T_LONG);
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190 // Copy the java argument value to kernelArgBuffer
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191 jvalue val;
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192 if (java_lang_boxing_object::get_value(arg, &val) != T_LONG) {
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193 tty->print_cr("[CUDA] *** Error: Unexpected argument type; expecting T_LONG");
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194 _success = false;
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195 return;
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196 }
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197 // Kernel arguments are expected to be naturally aligned.
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198 // Insert padding into kernel argument buffer, if needed.
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199 pad_kernel_argument_buffer(sizeof(val.j));
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200 *((gpu::Ptx::CUdeviceptr*) &_kernelArgBuffer[_bufferOffset]) = val.j;
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201
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202 // Advance _bufferOffset
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203 _bufferOffset += sizeof(val.j);
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204 // For a 64-bit host, since size of long is 8, there is no need
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205 // to pad the kernel argument buffer to ensure 8-byte alignment of
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206 // the next potential argument to be pushed.
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207 }
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208 return;
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209 }
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210
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diff changeset
211 void PTXKernelArguments::do_byte() {
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212 // If the parameter is a return value,
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213 if (is_return_type()) {
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214 // Allocate device memory for T_BYTE return value pointer on device. Size in bytes
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215 int status = gpu::Ptx::_cuda_cu_memalloc(&_dev_return_value, T_BYTE_SIZE);
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216 if (status != GRAAL_CUDA_SUCCESS) {
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217 tty->print_cr("[CUDA] *** Error (%d) Failed to allocate memory for return value pointer on device", status);
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218 _success = false;
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219 return;
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220 }
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221 // Kernel arguments are expected to be naturally aligned.
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222 // Insert padding into kernel argument buffer, if needed.
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223 pad_kernel_argument_buffer(sizeof(_dev_return_value));
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224 // Push _dev_return_value to _kernelBuffer
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225 *((gpu::Ptx::CUdeviceptr*) &_kernelArgBuffer[_bufferOffset]) = _dev_return_value;
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226
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227 // Advance _bufferOffset
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228 _bufferOffset += sizeof(_dev_return_value);
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229 } else {
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230 // Get the next java argument and its value which should be a T_BYTE
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231 oop arg = next_arg(T_BYTE);
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232 // Copy the java argument value to kernelArgBuffer
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233 jvalue val;
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234 if (java_lang_boxing_object::get_value(arg, &val) != T_BYTE) {
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235 tty->print_cr("[CUDA] *** Error: Unexpected argument type; expecting T_BYTE");
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236 _success = false;
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237 return;
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238 }
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239 // Kernel arguments are expected to be naturally aligned.
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240 // Insert padding into kernel argument buffer, if needed.
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241 pad_kernel_argument_buffer(sizeof(val.b));
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242 *((gpu::Ptx::CUdeviceptr*) &_kernelArgBuffer[_bufferOffset]) = val.b;
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243
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244 // Advance _bufferOffset
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245 _bufferOffset += sizeof(val.b);
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246 // For a 64-bit host, since size of T_BYTE is 8, there is no need
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247 // to pad the kernel argument buffer to ensure 8-byte alignment of
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248 // the next potential argument to be pushed.
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249 }
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250 return;
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251 }
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252
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253 void PTXKernelArguments::do_bool() {
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254 // If the parameter is a return value,
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255 if (is_return_type()) {
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256 // Allocate device memory for T_BYTE return value pointer on device. Size in bytes
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257 int status = gpu::Ptx::_cuda_cu_memalloc(&_dev_return_value, T_BOOLEAN_SIZE);
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258 if (status != GRAAL_CUDA_SUCCESS) {
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259 tty->print_cr("[CUDA] *** Error (%d) Failed to allocate memory for return value pointer on device", status);
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260 _success = false;
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261 return;
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262 }
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263 // Kernel arguments are expected to be naturally aligned.
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264 // Insert padding into kernel argument buffer, if needed.
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265 pad_kernel_argument_buffer(sizeof(_dev_return_value));
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266 // Push _dev_return_value to _kernelBuffer
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267 *((gpu::Ptx::CUdeviceptr*) &_kernelArgBuffer[_bufferOffset]) = _dev_return_value;
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268 _bufferOffset += sizeof(_dev_return_value);
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269 } else {
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270 // Get the next java argument and its value which should be a T_BOOLEAN
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271 oop arg = next_arg(T_BOOLEAN);
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272 // Copy the java argument value to kernelArgBuffer
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273 jvalue val;
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274 if (java_lang_boxing_object::get_value(arg, &val) != T_BOOLEAN) {
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275 tty->print_cr("[CUDA] *** Error: Unexpected argument type; expecting T_BOOLEAN");
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276 _success = false;
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277 return;
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278 }
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279 // Kernel arguments are expected to be naturally aligned.
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280 // Insert padding into kernel argument buffer, if needed.
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diff changeset
281 pad_kernel_argument_buffer(sizeof(val.z));
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282 *((gpu::Ptx::CUdeviceptr*) &_kernelArgBuffer[_bufferOffset]) = val.z;
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283
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284 // Advance _bufferOffset
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285 _bufferOffset += sizeof(val.z);
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286 }
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diff changeset
287 return;
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288 }
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289
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290 void PTXKernelArguments::do_array(int begin, int end) {
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291 // Get the next java argument and its value which should be a T_ARRAY
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292 oop arg = next_arg(T_OBJECT);
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293 assert(arg->is_array(), "argument value not an array");
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294 // Size of array argument
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295 int argSize = arg->size() * HeapWordSize;
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296 // Device pointer to array argument.
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297 gpu::Ptx::CUdeviceptr arrayArgOnDev;
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298 int status;
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299
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300 // Register host memory for use by the device. Size in bytes
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301 status = gpu::Ptx::_cuda_cu_mem_host_register(arg, argSize, GRAAL_CU_MEMHOSTREGISTER_DEVICEMAP);
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302 if (status != GRAAL_CUDA_SUCCESS) {
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303 tty->print_cr("[CUDA] *** Error (%d) Failed to register host memory for array argument on device",
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diff changeset
304 status);
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305 _success = false;
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306 return;
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307 }
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diff changeset
308 // Get device pointer
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diff changeset
309 status = gpu::Ptx::_cuda_cu_mem_host_get_device_pointer(&arrayArgOnDev, arg, 0);
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diff changeset
310 if (status != GRAAL_CUDA_SUCCESS) {
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diff changeset
311 tty->print_cr("[CUDA] *** Error (%d) Failed to get device pointer of mapped pinned memory of array argument.",
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diff changeset
312 status);
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diff changeset
313 _success = false;
1a7e7011a341 * PTX kernel argument buffer now has naturally aligned arguments as required by PTX JIT compiler.
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314 return;
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315 }
12519
f020e149c1b6 PTX codegen enhancements; fixes to PTX test regressions.
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316
12653
1a7e7011a341 * PTX kernel argument buffer now has naturally aligned arguments as required by PTX JIT compiler.
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317 // Kernel arguments are expected to be naturally aligned.
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318 // Insert padding into kernel argument buffer, if needed.
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319 pad_kernel_argument_buffer(sizeof(arrayArgOnDev));
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320 // Push device array argument to _kernelBuffer
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321 *((gpu::Ptx::CUdeviceptr*) &_kernelArgBuffer[_bufferOffset]) = arrayArgOnDev;
12519
f020e149c1b6 PTX codegen enhancements; fixes to PTX test regressions.
S.Bharadwaj Yadavalli <bharadwaj.yadavalli@oracle.com>
parents: 12360
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322
f020e149c1b6 PTX codegen enhancements; fixes to PTX test regressions.
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323 // Advance _bufferOffset
f020e149c1b6 PTX codegen enhancements; fixes to PTX test regressions.
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324 _bufferOffset += sizeof(arrayArgOnDev);
f020e149c1b6 PTX codegen enhancements; fixes to PTX test regressions.
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325 return;
11821
d8659ad83fcc PTX single-threaded array store, Warp annotation
Morris Meyer <morris.meyer@oracle.com>
parents: 11596
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326 }
d8659ad83fcc PTX single-threaded array store, Warp annotation
Morris Meyer <morris.meyer@oracle.com>
parents: 11596
diff changeset
327
d8659ad83fcc PTX single-threaded array store, Warp annotation
Morris Meyer <morris.meyer@oracle.com>
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diff changeset
328 void PTXKernelArguments::do_void() {
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f020e149c1b6 PTX codegen enhancements; fixes to PTX test regressions.
S.Bharadwaj Yadavalli <bharadwaj.yadavalli@oracle.com>
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329 return;
11485
49bb1bc983c6 Implement several missing PTX codegen features; return value capture and method args passing of java method executed on GPU.
bharadwaj
parents:
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330 }
49bb1bc983c6 Implement several missing PTX codegen features; return value capture and method args passing of java method executed on GPU.
bharadwaj
parents:
diff changeset
331
49bb1bc983c6 Implement several missing PTX codegen features; return value capture and method args passing of java method executed on GPU.
bharadwaj
parents:
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332 // TODO implement other do_*