Mercurial > hg > truffle
annotate src/cpu/ppc/vm/vm_version_ppc.cpp @ 14408:ec28f9c041ff
8019972: PPC64 (part 9): platform files for interpreter only VM.
Summary: With this change the HotSpot core build works on Linux/PPC64. The VM succesfully executes simple test programs.
Reviewed-by: kvn
author | goetz |
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date | Fri, 02 Aug 2013 16:46:45 +0200 |
parents | |
children | 41b780b43b74 |
rev | line source |
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1 /* |
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. |
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3 * Copyright 2012, 2013 SAP AG. All rights reserved. |
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4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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5 * |
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6 * This code is free software; you can redistribute it and/or modify it |
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7 * under the terms of the GNU General Public License version 2 only, as |
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8 * published by the Free Software Foundation. |
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9 * |
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10 * This code is distributed in the hope that it will be useful, but WITHOUT |
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11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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13 * version 2 for more details (a copy is included in the LICENSE file that |
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14 * accompanied this code). |
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15 * |
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16 * You should have received a copy of the GNU General Public License version |
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17 * 2 along with this work; if not, write to the Free Software Foundation, |
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18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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19 * |
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20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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21 * or visit www.oracle.com if you need additional information or have any |
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22 * questions. |
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23 * |
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24 */ |
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25 |
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26 #include "precompiled.hpp" |
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27 #include "assembler_ppc.inline.hpp" |
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28 #include "compiler/disassembler.hpp" |
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29 #include "memory/resourceArea.hpp" |
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30 #include "runtime/java.hpp" |
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31 #include "runtime/stubCodeGenerator.hpp" |
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32 #include "utilities/defaultStream.hpp" |
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33 #include "vm_version_ppc.hpp" |
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34 #ifdef TARGET_OS_FAMILY_aix |
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35 # include "os_aix.inline.hpp" |
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36 #endif |
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37 #ifdef TARGET_OS_FAMILY_linux |
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38 # include "os_linux.inline.hpp" |
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39 #endif |
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40 |
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41 # include <sys/sysinfo.h> |
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42 |
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43 int VM_Version::_features = VM_Version::unknown_m; |
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44 int VM_Version::_measured_cache_line_size = 128; // default value |
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45 const char* VM_Version::_features_str = ""; |
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46 bool VM_Version::_is_determine_features_test_running = false; |
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47 |
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48 |
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49 #define MSG(flag) \ |
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50 if (flag && !FLAG_IS_DEFAULT(flag)) \ |
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51 jio_fprintf(defaultStream::error_stream(), \ |
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52 "warning: -XX:+" #flag " requires -XX:+UseSIGTRAP\n" \ |
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53 " -XX:+" #flag " will be disabled!\n"); |
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54 |
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55 void VM_Version::initialize() { |
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56 |
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57 // Test which instructions are supported and measure cache line size. |
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58 determine_features(); |
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59 |
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60 // If PowerArchitecturePPC64 hasn't been specified explicitly determine from features. |
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61 if (FLAG_IS_DEFAULT(PowerArchitecturePPC64)) { |
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62 if (VM_Version::has_popcntw()) { |
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63 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 7); |
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64 } else if (VM_Version::has_cmpb()) { |
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65 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 6); |
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66 } else if (VM_Version::has_popcntb()) { |
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67 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 5); |
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68 } else { |
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69 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 0); |
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70 } |
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71 } |
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72 guarantee(PowerArchitecturePPC64 == 0 || PowerArchitecturePPC64 == 5 || |
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73 PowerArchitecturePPC64 == 6 || PowerArchitecturePPC64 == 7, |
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74 "PowerArchitecturePPC64 should be 0, 5, 6 or 7"); |
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75 |
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76 if (!UseSIGTRAP) { |
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77 MSG(TrapBasedICMissChecks); |
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78 MSG(TrapBasedNotEntrantChecks); |
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79 MSG(TrapBasedNullChecks); |
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80 MSG(TrapBasedRangeChecks); |
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81 FLAG_SET_ERGO(bool, TrapBasedNotEntrantChecks, false); |
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82 FLAG_SET_ERGO(bool, TrapBasedNullChecks, false); |
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83 FLAG_SET_ERGO(bool, TrapBasedICMissChecks, false); |
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84 FLAG_SET_ERGO(bool, TrapBasedRangeChecks, false); |
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85 } |
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86 |
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87 #ifdef COMPILER2 |
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88 // On Power6 test for section size. |
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89 if (PowerArchitecturePPC64 == 6) |
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90 determine_section_size(); |
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91 // TODO: PPC port else |
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92 // TODO: PPC port PdScheduling::power6SectorSize = 0x20; |
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93 |
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94 MaxVectorSize = 8; |
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95 #endif |
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96 |
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97 // Create and print feature-string. |
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98 char buf[(num_features+1) * 16]; // max 16 chars per feature |
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99 jio_snprintf(buf, sizeof(buf), |
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100 "ppc64%s%s%s%s%s%s%s%s", |
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101 (has_fsqrt() ? " fsqrt" : ""), |
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102 (has_isel() ? " isel" : ""), |
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103 (has_lxarxeh() ? " lxarxeh" : ""), |
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104 (has_cmpb() ? " cmpb" : ""), |
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105 //(has_mftgpr()? " mftgpr" : ""), |
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106 (has_popcntb() ? " popcntb" : ""), |
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107 (has_popcntw() ? " popcntw" : ""), |
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108 (has_fcfids() ? " fcfids" : ""), |
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109 (has_vand() ? " vand" : "") |
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110 // Make sure number of %s matches num_features! |
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111 ); |
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112 _features_str = strdup(buf); |
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113 NOT_PRODUCT(if (Verbose) print_features();); |
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114 |
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115 // PPC64 supports 8-byte compare-exchange operations (see |
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116 // Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr) |
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117 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile). |
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118 _supports_cx8 = true; |
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119 |
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120 UseSSE = 0; // Only on x86 and x64 |
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121 |
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122 intx cache_line_size = _measured_cache_line_size; |
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123 |
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124 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) AllocatePrefetchStyle = 1; |
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125 |
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126 if (AllocatePrefetchStyle == 4) { |
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127 AllocatePrefetchStepSize = cache_line_size; // need exact value |
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128 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 12; // use larger blocks by default |
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129 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 2*cache_line_size; // default is not defined ? |
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130 } else { |
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131 if (cache_line_size > AllocatePrefetchStepSize) AllocatePrefetchStepSize = cache_line_size; |
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132 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 3; // Optimistic value |
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133 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 3*cache_line_size; // default is not defined ? |
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134 } |
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135 |
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136 assert(AllocatePrefetchLines > 0, "invalid value"); |
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137 if (AllocatePrefetchLines < 1) // Set valid value in product VM. |
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138 AllocatePrefetchLines = 1; // Conservative value |
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139 |
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140 if (AllocatePrefetchStyle == 3 && AllocatePrefetchDistance < cache_line_size) |
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141 AllocatePrefetchStyle = 1; // fall back if inappropriate |
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142 |
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143 assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive"); |
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144 } |
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145 |
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146 void VM_Version::print_features() { |
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147 tty->print_cr("Version: %s cache_line_size = %d", cpu_features(), get_cache_line_size()); |
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148 } |
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149 |
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150 #ifdef COMPILER2 |
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151 // Determine section size on power6: If section size is 8 instructions, |
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152 // there should be a difference between the two testloops of ~15 %. If |
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153 // no difference is detected the section is assumed to be 32 instructions. |
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154 void VM_Version::determine_section_size() { |
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155 |
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156 int unroll = 80; |
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157 |
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158 const int code_size = (2* unroll * 32 + 100)*BytesPerInstWord; |
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159 |
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160 // Allocate space for the code |
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161 ResourceMark rm; |
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162 CodeBuffer cb("detect_section_size", code_size, 0); |
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163 MacroAssembler* a = new MacroAssembler(&cb); |
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164 |
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165 uint32_t *code = (uint32_t *)a->pc(); |
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166 // emit code. |
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167 void (*test1)() = (void(*)())(void *)a->emit_fd(); |
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168 |
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169 Label l1; |
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170 |
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171 a->li(R4, 1); |
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172 a->sldi(R4, R4, 28); |
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173 a->b(l1); |
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174 a->align(CodeEntryAlignment); |
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175 |
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176 a->bind(l1); |
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177 |
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178 for (int i = 0; i < unroll; i++) { |
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179 // Schleife 1 |
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180 // ------- sector 0 ------------ |
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181 // ;; 0 |
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182 a->nop(); // 1 |
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183 a->fpnop0(); // 2 |
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184 a->fpnop1(); // 3 |
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185 a->addi(R4,R4, -1); // 4 |
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186 |
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187 // ;; 1 |
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188 a->nop(); // 5 |
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189 a->fmr(F6, F6); // 6 |
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190 a->fmr(F7, F7); // 7 |
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191 a->endgroup(); // 8 |
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192 // ------- sector 8 ------------ |
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193 |
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194 // ;; 2 |
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195 a->nop(); // 9 |
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196 a->nop(); // 10 |
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197 a->fmr(F8, F8); // 11 |
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198 a->fmr(F9, F9); // 12 |
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199 |
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200 // ;; 3 |
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201 a->nop(); // 13 |
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202 a->fmr(F10, F10); // 14 |
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203 a->fmr(F11, F11); // 15 |
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204 a->endgroup(); // 16 |
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205 // -------- sector 16 ------------- |
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206 |
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207 // ;; 4 |
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208 a->nop(); // 17 |
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209 a->nop(); // 18 |
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210 a->fmr(F15, F15); // 19 |
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211 a->fmr(F16, F16); // 20 |
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212 |
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213 // ;; 5 |
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214 a->nop(); // 21 |
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215 a->fmr(F17, F17); // 22 |
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216 a->fmr(F18, F18); // 23 |
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217 a->endgroup(); // 24 |
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218 // ------- sector 24 ------------ |
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219 |
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220 // ;; 6 |
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221 a->nop(); // 25 |
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222 a->nop(); // 26 |
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223 a->fmr(F19, F19); // 27 |
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224 a->fmr(F20, F20); // 28 |
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225 |
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226 // ;; 7 |
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227 a->nop(); // 29 |
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228 a->fmr(F21, F21); // 30 |
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229 a->fmr(F22, F22); // 31 |
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230 a->brnop0(); // 32 |
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|
231 |
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232 // ------- sector 32 ------------ |
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233 } |
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|
234 |
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235 // ;; 8 |
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236 a->cmpdi(CCR0, R4, unroll);// 33 |
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237 a->bge(CCR0, l1); // 34 |
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238 a->blr(); |
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|
239 |
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240 // emit code. |
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241 void (*test2)() = (void(*)())(void *)a->emit_fd(); |
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242 // uint32_t *code = (uint32_t *)a->pc(); |
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|
243 |
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|
244 Label l2; |
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|
245 |
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246 a->li(R4, 1); |
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247 a->sldi(R4, R4, 28); |
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248 a->b(l2); |
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249 a->align(CodeEntryAlignment); |
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|
250 |
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|
251 a->bind(l2); |
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|
252 |
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253 for (int i = 0; i < unroll; i++) { |
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254 // Schleife 2 |
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255 // ------- sector 0 ------------ |
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|
256 // ;; 0 |
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257 a->brnop0(); // 1 |
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258 a->nop(); // 2 |
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259 //a->cmpdi(CCR0, R4, unroll); |
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260 a->fpnop0(); // 3 |
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261 a->fpnop1(); // 4 |
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262 a->addi(R4,R4, -1); // 5 |
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|
263 |
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|
264 // ;; 1 |
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|
265 |
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266 a->nop(); // 6 |
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267 a->fmr(F6, F6); // 7 |
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268 a->fmr(F7, F7); // 8 |
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269 // ------- sector 8 --------------- |
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270 |
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271 // ;; 2 |
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272 a->endgroup(); // 9 |
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273 |
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274 // ;; 3 |
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275 a->nop(); // 10 |
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276 a->nop(); // 11 |
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277 a->fmr(F8, F8); // 12 |
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278 |
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279 // ;; 4 |
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280 a->fmr(F9, F9); // 13 |
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281 a->nop(); // 14 |
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282 a->fmr(F10, F10); // 15 |
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283 |
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284 // ;; 5 |
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285 a->fmr(F11, F11); // 16 |
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286 // -------- sector 16 ------------- |
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287 |
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288 // ;; 6 |
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289 a->endgroup(); // 17 |
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290 |
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291 // ;; 7 |
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292 a->nop(); // 18 |
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293 a->nop(); // 19 |
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294 a->fmr(F15, F15); // 20 |
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295 |
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296 // ;; 8 |
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297 a->fmr(F16, F16); // 21 |
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298 a->nop(); // 22 |
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299 a->fmr(F17, F17); // 23 |
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300 |
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301 // ;; 9 |
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302 a->fmr(F18, F18); // 24 |
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303 // -------- sector 24 ------------- |
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304 |
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305 // ;; 10 |
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306 a->endgroup(); // 25 |
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307 |
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308 // ;; 11 |
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309 a->nop(); // 26 |
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310 a->nop(); // 27 |
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311 a->fmr(F19, F19); // 28 |
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312 |
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313 // ;; 12 |
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314 a->fmr(F20, F20); // 29 |
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315 a->nop(); // 30 |
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316 a->fmr(F21, F21); // 31 |
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317 |
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318 // ;; 13 |
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319 a->fmr(F22, F22); // 32 |
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320 } |
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321 |
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322 // -------- sector 32 ------------- |
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323 // ;; 14 |
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324 a->cmpdi(CCR0, R4, unroll); // 33 |
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325 a->bge(CCR0, l2); // 34 |
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326 |
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327 a->blr(); |
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328 uint32_t *code_end = (uint32_t *)a->pc(); |
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329 a->flush(); |
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330 |
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331 double loop1_seconds,loop2_seconds, rel_diff; |
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332 uint64_t start1, stop1; |
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333 |
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334 start1 = os::current_thread_cpu_time(false); |
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335 (*test1)(); |
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336 stop1 = os::current_thread_cpu_time(false); |
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337 loop1_seconds = (stop1- start1) / (1000 *1000 *1000.0); |
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338 |
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339 |
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340 start1 = os::current_thread_cpu_time(false); |
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341 (*test2)(); |
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342 stop1 = os::current_thread_cpu_time(false); |
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343 |
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344 loop2_seconds = (stop1 - start1) / (1000 *1000 *1000.0); |
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345 |
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346 rel_diff = (loop2_seconds - loop1_seconds) / loop1_seconds *100; |
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347 |
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348 if (PrintAssembly) { |
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349 ttyLocker ttyl; |
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350 tty->print_cr("Decoding section size detection stub at " INTPTR_FORMAT " before execution:", code); |
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351 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); |
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352 tty->print_cr("Time loop1 :%f", loop1_seconds); |
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353 tty->print_cr("Time loop2 :%f", loop2_seconds); |
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354 tty->print_cr("(time2 - time1) / time1 = %f %%", rel_diff); |
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355 |
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356 if (rel_diff > 12.0) { |
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357 tty->print_cr("Section Size 8 Instructions"); |
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358 } else{ |
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359 tty->print_cr("Section Size 32 Instructions or Power5"); |
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360 } |
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|
361 } |
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362 |
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363 #if 0 // TODO: PPC port |
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364 // Set sector size (if not set explicitly). |
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365 if (FLAG_IS_DEFAULT(Power6SectorSize128PPC64)) { |
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366 if (rel_diff > 12.0) { |
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367 PdScheduling::power6SectorSize = 0x20; |
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368 } else { |
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369 PdScheduling::power6SectorSize = 0x80; |
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370 } |
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371 } else if (Power6SectorSize128PPC64) { |
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372 PdScheduling::power6SectorSize = 0x80; |
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373 } else { |
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374 PdScheduling::power6SectorSize = 0x20; |
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375 } |
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376 #endif |
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377 if (UsePower6SchedulerPPC64) Unimplemented(); |
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378 } |
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379 #endif // COMPILER2 |
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380 |
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381 void VM_Version::determine_features() { |
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382 const int code_size = (num_features+1+2*7)*BytesPerInstWord; // 7 InstWords for each call (function descriptor + blr instruction) |
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383 int features = 0; |
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384 |
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385 // create test area |
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386 enum { BUFFER_SIZE = 2*4*K }; // needs to be >=2* max cache line size (cache line size can't exceed min page size) |
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387 char test_area[BUFFER_SIZE]; |
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388 char *mid_of_test_area = &test_area[BUFFER_SIZE>>1]; |
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|
389 |
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390 // Allocate space for the code |
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391 ResourceMark rm; |
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392 CodeBuffer cb("detect_cpu_features", code_size, 0); |
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393 MacroAssembler* a = new MacroAssembler(&cb); |
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394 |
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395 // emit code. |
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396 void (*test)(address addr, uint64_t offset)=(void(*)(address addr, uint64_t offset))(void *)a->emit_fd(); |
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397 uint32_t *code = (uint32_t *)a->pc(); |
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398 // Don't use R0 in ldarx. |
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399 // keep R3_ARG1 = R3 unmodified, it contains &field (see below) |
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400 // keep R4_ARG2 = R4 unmodified, it contains offset = 0 (see below) |
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401 a->fsqrt(F3, F4); // code[0] -> fsqrt_m |
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402 a->isel(R7, R5, R6, 0); // code[1] -> isel_m |
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403 a->ldarx_unchecked(R7, R3_ARG1, R4_ARG2, 1);// code[2] -> lxarx_m |
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404 a->cmpb(R7, R5, R6); // code[3] -> bcmp |
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405 //a->mftgpr(R7, F3); // code[4] -> mftgpr |
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406 a->popcntb(R7, R5); // code[5] -> popcntb |
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407 a->popcntw(R7, R5); // code[6] -> popcntw |
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408 a->fcfids(F3, F4); // code[7] -> fcfids |
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409 a->vand(VR0, VR0, VR0); // code[8] -> vand |
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410 a->blr(); |
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411 |
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412 // Emit function to set one cache line to zero |
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413 void (*zero_cacheline_func_ptr)(char*) = (void(*)(char*))(void *)a->emit_fd(); // emit function descriptor and get pointer to it |
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414 a->dcbz(R3_ARG1); // R3_ARG1 = R3 = addr |
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415 a->blr(); |
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416 |
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417 uint32_t *code_end = (uint32_t *)a->pc(); |
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418 a->flush(); |
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419 |
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420 // Print the detection code. |
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421 if (PrintAssembly) { |
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422 ttyLocker ttyl; |
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423 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " before execution:", code); |
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424 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); |
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425 } |
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426 |
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427 // Measure cache line size. |
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428 memset(test_area, 0xFF, BUFFER_SIZE); // fill test area with 0xFF |
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429 (*zero_cacheline_func_ptr)(mid_of_test_area); // call function which executes dcbz to the middle |
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430 int count = 0; // count zeroed bytes |
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431 for (int i = 0; i < BUFFER_SIZE; i++) if (test_area[i] == 0) count++; |
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432 guarantee(is_power_of_2(count), "cache line size needs to be a power of 2"); |
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433 _measured_cache_line_size = count; |
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434 |
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435 // Execute code. Illegal instructions will be replaced by 0 in the signal handler. |
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436 VM_Version::_is_determine_features_test_running = true; |
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437 (*test)((address)mid_of_test_area, (uint64_t)0); |
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438 VM_Version::_is_determine_features_test_running = false; |
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439 |
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440 // determine which instructions are legal. |
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441 int feature_cntr = 0; |
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442 if (code[feature_cntr++]) features |= fsqrt_m; |
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443 if (code[feature_cntr++]) features |= isel_m; |
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444 if (code[feature_cntr++]) features |= lxarxeh_m; |
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445 if (code[feature_cntr++]) features |= cmpb_m; |
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446 //if(code[feature_cntr++])features |= mftgpr_m; |
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447 if (code[feature_cntr++]) features |= popcntb_m; |
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448 if (code[feature_cntr++]) features |= popcntw_m; |
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449 if (code[feature_cntr++]) features |= fcfids_m; |
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450 if (code[feature_cntr++]) features |= vand_m; |
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451 |
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452 // Print the detection code. |
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453 if (PrintAssembly) { |
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454 ttyLocker ttyl; |
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455 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", code); |
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456 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); |
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457 } |
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458 |
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459 _features = features; |
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460 } |
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|
461 |
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|
462 |
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463 static int saved_features = 0; |
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|
464 |
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465 void VM_Version::allow_all() { |
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466 saved_features = _features; |
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467 _features = all_features_m; |
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468 } |
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|
469 |
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470 void VM_Version::revert() { |
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471 _features = saved_features; |
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472 } |