Mercurial > hg > truffle
annotate src/cpu/sparc/vm/c1_Defs_sparc.hpp @ 1882:ee0d26abaad3
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author | kamg |
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date | Tue, 26 Oct 2010 16:48:28 -0700 |
parents | c18cbe5936b8 |
children | f95d63e2154a |
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0 | 1 /* |
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2 * Copyright (c) 2000, 2009, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
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7 * published by the Free Software Foundation. | |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
25 // native word offsets from memory address (big endian) | |
26 enum { | |
27 pd_lo_word_offset_in_bytes = BytesPerInt, | |
28 pd_hi_word_offset_in_bytes = 0 | |
29 }; | |
30 | |
31 | |
32 // explicit rounding operations are not required to implement the strictFP mode | |
33 enum { | |
34 pd_strict_fp_requires_explicit_rounding = false | |
35 }; | |
36 | |
37 | |
38 // registers | |
39 enum { | |
40 pd_nof_cpu_regs_frame_map = 32, // number of registers used during code emission | |
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41 pd_nof_caller_save_cpu_regs_frame_map = 10, // number of cpu registers killed by calls |
0 | 42 pd_nof_cpu_regs_reg_alloc = 20, // number of registers that are visible to register allocator |
43 pd_nof_cpu_regs_linearscan = 32,// number of registers visible linear scan | |
44 pd_first_cpu_reg = 0, | |
45 pd_last_cpu_reg = 31, | |
46 pd_last_allocatable_cpu_reg = 19, | |
47 pd_first_callee_saved_reg = 0, | |
48 pd_last_callee_saved_reg = 13, | |
49 | |
50 pd_nof_fpu_regs_frame_map = 32, // number of registers used during code emission | |
51 pd_nof_caller_save_fpu_regs_frame_map = 32, // number of fpu registers killed by calls | |
52 pd_nof_fpu_regs_reg_alloc = 32, // number of registers that are visible to register allocator | |
53 pd_nof_fpu_regs_linearscan = 32, // number of registers visible to linear scan | |
54 pd_first_fpu_reg = pd_nof_cpu_regs_frame_map, | |
55 pd_last_fpu_reg = pd_nof_cpu_regs_frame_map + pd_nof_fpu_regs_frame_map - 1, | |
56 | |
57 pd_nof_xmm_regs_linearscan = 0, | |
58 pd_nof_caller_save_xmm_regs = 0, | |
59 pd_first_xmm_reg = -1, | |
60 pd_last_xmm_reg = -1 | |
61 }; | |
62 | |
63 | |
64 // for debug info: a float value in a register is saved in single precision by runtime stubs | |
65 enum { | |
66 pd_float_saved_as_double = false | |
67 }; |