Mercurial > hg > truffle
annotate src/cpu/x86/vm/c1_Runtime1_x86.cpp @ 1433:efba53f86c4f
various fixes and enhancements
* correct refmap->oopmap conversion (register numbering, stack slot numbering)
* fixes for inlining (correct scoping in exception handler lookup, NPE in scope conversion)
* support for "jump to runtime stub" (patching code needs to be aware of jmp instruction)
* provide more information about methods (to allow inlining: has_balanced_monitors, etc.)
* fixes to signature type lookup
* isSubTypeOf: correct handling of array classes
* RiType: componentType/arrayOf
* prologue: inline cache check, icmiss stub
* klass state check (resolved but not initialized) in newinstance
* card table write barriers
* c1x classes are optional (to allow running c1 without them)
* correct for stored frame pointer in calling conventions (methods with arguments on stack)
* getType(Class<?>) for some basic types, used for optimizations and folding
* RiMethod/RiType: throw exception instead of silent failure on unsupported operations
* RiType: resolved/unresolved array type support
* refactoring: new on-demand template generation mechanism
* optimizations: template specialization for no_null_check, given length, etc.
author | Lukas Stadler <lukas.stadler@oracle.com> |
---|---|
date | Thu, 16 Sep 2010 19:42:20 -0700 |
parents | abc670a709dc |
children | 72cfb36c6bb2 |
rev | line source |
---|---|
0 | 1 /* |
1295 | 2 * Copyright 1999-2010 Sun Microsystems, Inc. All Rights Reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
20 * CA 95054 USA or visit www.sun.com if you need additional information or | |
21 * have any questions. | |
22 * | |
23 */ | |
24 | |
25 #include "incls/_precompiled.incl" | |
26 #include "incls/_c1_Runtime1_x86.cpp.incl" | |
27 | |
28 | |
29 // Implementation of StubAssembler | |
30 | |
31 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, int args_size) { | |
32 // setup registers | |
304 | 33 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions) |
0 | 34 assert(!(oop_result1->is_valid() || oop_result2->is_valid()) || oop_result1 != oop_result2, "registers must be different"); |
35 assert(oop_result1 != thread && oop_result2 != thread, "registers must be different"); | |
36 assert(args_size >= 0, "illegal args_size"); | |
37 | |
304 | 38 #ifdef _LP64 |
39 mov(c_rarg0, thread); | |
40 set_num_rt_args(0); // Nothing on stack | |
41 #else | |
0 | 42 set_num_rt_args(1 + args_size); |
43 | |
44 // push java thread (becomes first argument of C function) | |
45 get_thread(thread); | |
304 | 46 push(thread); |
47 #endif // _LP64 | |
0 | 48 |
49 set_last_Java_frame(thread, noreg, rbp, NULL); | |
304 | 50 |
0 | 51 // do the call |
52 call(RuntimeAddress(entry)); | |
53 int call_offset = offset(); | |
54 // verify callee-saved register | |
55 #ifdef ASSERT | |
56 guarantee(thread != rax, "change this code"); | |
304 | 57 push(rax); |
0 | 58 { Label L; |
59 get_thread(rax); | |
304 | 60 cmpptr(thread, rax); |
0 | 61 jcc(Assembler::equal, L); |
62 int3(); | |
63 stop("StubAssembler::call_RT: rdi not callee saved?"); | |
64 bind(L); | |
65 } | |
304 | 66 pop(rax); |
0 | 67 #endif |
68 reset_last_Java_frame(thread, true, false); | |
69 | |
70 // discard thread and arguments | |
304 | 71 NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord)); |
0 | 72 |
73 // check for pending exceptions | |
74 { Label L; | |
304 | 75 cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 76 jcc(Assembler::equal, L); |
77 // exception pending => remove activation and forward to exception handler | |
304 | 78 movptr(rax, Address(thread, Thread::pending_exception_offset())); |
0 | 79 // make sure that the vm_results are cleared |
80 if (oop_result1->is_valid()) { | |
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81 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
0 | 82 } |
83 if (oop_result2->is_valid()) { | |
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84 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
0 | 85 } |
86 if (frame_size() == no_frame_size) { | |
87 leave(); | |
88 jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
89 } else if (_stub_id == Runtime1::forward_exception_id) { | |
90 should_not_reach_here(); | |
91 } else { | |
92 jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); | |
93 } | |
94 bind(L); | |
95 } | |
96 // get oop results if there are any and reset the values in the thread | |
97 if (oop_result1->is_valid()) { | |
304 | 98 movptr(oop_result1, Address(thread, JavaThread::vm_result_offset())); |
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99 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
0 | 100 verify_oop(oop_result1); |
101 } | |
102 if (oop_result2->is_valid()) { | |
304 | 103 movptr(oop_result2, Address(thread, JavaThread::vm_result_2_offset())); |
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104 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
0 | 105 verify_oop(oop_result2); |
106 } | |
107 return call_offset; | |
108 } | |
109 | |
110 | |
111 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) { | |
304 | 112 #ifdef _LP64 |
113 mov(c_rarg1, arg1); | |
114 #else | |
115 push(arg1); | |
116 #endif // _LP64 | |
0 | 117 return call_RT(oop_result1, oop_result2, entry, 1); |
118 } | |
119 | |
120 | |
121 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) { | |
304 | 122 #ifdef _LP64 |
123 if (c_rarg1 == arg2) { | |
124 if (c_rarg2 == arg1) { | |
125 xchgq(arg1, arg2); | |
126 } else { | |
127 mov(c_rarg2, arg2); | |
128 mov(c_rarg1, arg1); | |
129 } | |
130 } else { | |
131 mov(c_rarg1, arg1); | |
132 mov(c_rarg2, arg2); | |
133 } | |
134 #else | |
135 push(arg2); | |
136 push(arg1); | |
137 #endif // _LP64 | |
0 | 138 return call_RT(oop_result1, oop_result2, entry, 2); |
139 } | |
140 | |
141 | |
142 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) { | |
304 | 143 #ifdef _LP64 |
144 // if there is any conflict use the stack | |
145 if (arg1 == c_rarg2 || arg1 == c_rarg3 || | |
146 arg2 == c_rarg1 || arg1 == c_rarg3 || | |
147 arg3 == c_rarg1 || arg1 == c_rarg2) { | |
148 push(arg3); | |
149 push(arg2); | |
150 push(arg1); | |
151 pop(c_rarg1); | |
152 pop(c_rarg2); | |
153 pop(c_rarg3); | |
154 } else { | |
155 mov(c_rarg1, arg1); | |
156 mov(c_rarg2, arg2); | |
157 mov(c_rarg3, arg3); | |
158 } | |
159 #else | |
160 push(arg3); | |
161 push(arg2); | |
162 push(arg1); | |
163 #endif // _LP64 | |
0 | 164 return call_RT(oop_result1, oop_result2, entry, 3); |
165 } | |
166 | |
167 | |
168 // Implementation of StubFrame | |
169 | |
170 class StubFrame: public StackObj { | |
171 private: | |
172 StubAssembler* _sasm; | |
173 | |
174 public: | |
175 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments); | |
176 void load_argument(int offset_in_words, Register reg); | |
177 | |
178 ~StubFrame(); | |
179 }; | |
180 | |
181 | |
182 #define __ _sasm-> | |
183 | |
184 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) { | |
185 _sasm = sasm; | |
186 __ set_info(name, must_gc_arguments); | |
187 __ enter(); | |
188 } | |
189 | |
190 // load parameters that were stored with LIR_Assembler::store_parameter | |
191 // Note: offsets for store_parameter and load_argument must match | |
192 void StubFrame::load_argument(int offset_in_words, Register reg) { | |
193 // rbp, + 0: link | |
194 // + 1: return address | |
195 // + 2: argument with offset 0 | |
196 // + 3: argument with offset 1 | |
197 // + 4: ... | |
198 | |
304 | 199 __ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord)); |
0 | 200 } |
201 | |
202 | |
203 StubFrame::~StubFrame() { | |
204 __ leave(); | |
205 __ ret(0); | |
206 } | |
207 | |
208 #undef __ | |
209 | |
210 | |
211 // Implementation of Runtime1 | |
212 | |
213 #define __ sasm-> | |
214 | |
304 | 215 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2; |
216 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2; | |
0 | 217 |
218 // Stack layout for saving/restoring all the registers needed during a runtime | |
219 // call (this includes deoptimization) | |
220 // Note: note that users of this frame may well have arguments to some runtime | |
221 // while these values are on the stack. These positions neglect those arguments | |
222 // but the code in save_live_registers will take the argument count into | |
223 // account. | |
224 // | |
304 | 225 #ifdef _LP64 |
226 #define SLOT2(x) x, | |
227 #define SLOT_PER_WORD 2 | |
228 #else | |
229 #define SLOT2(x) | |
230 #define SLOT_PER_WORD 1 | |
231 #endif // _LP64 | |
232 | |
0 | 233 enum reg_save_layout { |
304 | 234 // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that |
235 // happen and will assert if the stack size we create is misaligned | |
236 #ifdef _LP64 | |
237 align_dummy_0, align_dummy_1, | |
238 #endif // _LP64 | |
239 dummy1, SLOT2(dummy1H) // 0, 4 | |
240 dummy2, SLOT2(dummy2H) // 8, 12 | |
0 | 241 // Two temps to be used as needed by users of save/restore callee registers |
304 | 242 temp_2_off, SLOT2(temp_2H_off) // 16, 20 |
243 temp_1_off, SLOT2(temp_1H_off) // 24, 28 | |
244 xmm_regs_as_doubles_off, // 32 | |
245 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160 | |
246 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224 | |
247 // fpu_state_end_off is exclusive | |
248 fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352 | |
249 marker = fpu_state_end_off, SLOT2(markerH) // 352, 356 | |
250 extra_space_offset, // 360 | |
251 #ifdef _LP64 | |
252 r15_off = extra_space_offset, r15H_off, // 360, 364 | |
253 r14_off, r14H_off, // 368, 372 | |
254 r13_off, r13H_off, // 376, 380 | |
255 r12_off, r12H_off, // 384, 388 | |
256 r11_off, r11H_off, // 392, 396 | |
257 r10_off, r10H_off, // 400, 404 | |
258 r9_off, r9H_off, // 408, 412 | |
259 r8_off, r8H_off, // 416, 420 | |
260 rdi_off, rdiH_off, // 424, 428 | |
261 #else | |
0 | 262 rdi_off = extra_space_offset, |
304 | 263 #endif // _LP64 |
264 rsi_off, SLOT2(rsiH_off) // 432, 436 | |
265 rbp_off, SLOT2(rbpH_off) // 440, 444 | |
266 rsp_off, SLOT2(rspH_off) // 448, 452 | |
267 rbx_off, SLOT2(rbxH_off) // 456, 460 | |
268 rdx_off, SLOT2(rdxH_off) // 464, 468 | |
269 rcx_off, SLOT2(rcxH_off) // 472, 476 | |
270 rax_off, SLOT2(raxH_off) // 480, 484 | |
271 saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492 | |
272 return_off, SLOT2(returnH_off) // 496, 500 | |
273 reg_save_frame_size, // As noted: neglects any parameters to runtime // 504 | |
274 | |
275 #ifdef _WIN64 | |
276 c_rarg0_off = rcx_off, | |
277 #else | |
278 c_rarg0_off = rdi_off, | |
279 #endif // WIN64 | |
0 | 280 |
281 // equates | |
282 | |
283 // illegal instruction handler | |
284 continue_dest_off = temp_1_off, | |
285 | |
286 // deoptimization equates | |
287 fp0_off = float_regs_as_doubles_off, // slot for java float/double return value | |
288 xmm0_off = xmm_regs_as_doubles_off, // slot for java float/double return value | |
289 deopt_type = temp_2_off, // slot for type of deopt in progress | |
290 ret_type = temp_1_off // slot for return type | |
291 }; | |
292 | |
293 | |
294 | |
295 // Save off registers which might be killed by calls into the runtime. | |
296 // Tries to smart of about FP registers. In particular we separate | |
297 // saving and describing the FPU registers for deoptimization since we | |
298 // have to save the FPU registers twice if we describe them and on P4 | |
299 // saving FPU registers which don't contain anything appears | |
300 // expensive. The deopt blob is the only thing which needs to | |
301 // describe FPU registers. In all other cases it should be sufficient | |
302 // to simply save their current value. | |
303 | |
304 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args, | |
305 bool save_fpu_registers = true) { | |
304 | 306 |
307 // In 64bit all the args are in regs so there are no additional stack slots | |
308 LP64_ONLY(num_rt_args = 0); | |
309 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");) | |
310 int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread | |
311 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word ); | |
0 | 312 |
313 // record saved value locations in an OopMap | |
314 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread | |
304 | 315 OopMap* map = new OopMap(frame_size_in_slots, 0); |
0 | 316 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg()); |
317 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg()); | |
318 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg()); | |
319 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg()); | |
320 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg()); | |
321 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg()); | |
304 | 322 #ifdef _LP64 |
323 map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg()); | |
324 map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg()); | |
325 map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg()); | |
326 map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg()); | |
327 map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg()); | |
328 map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg()); | |
329 map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg()); | |
330 map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg()); | |
331 | |
332 // This is stupid but needed. | |
333 map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next()); | |
334 map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next()); | |
335 map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next()); | |
336 map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next()); | |
337 map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next()); | |
338 map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next()); | |
339 | |
340 map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next()); | |
341 map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next()); | |
342 map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next()); | |
343 map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next()); | |
344 map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next()); | |
345 map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next()); | |
346 map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next()); | |
347 map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next()); | |
348 #endif // _LP64 | |
0 | 349 |
350 if (save_fpu_registers) { | |
351 if (UseSSE < 2) { | |
352 int fpu_off = float_regs_as_doubles_off; | |
353 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) { | |
354 VMReg fpu_name_0 = FrameMap::fpu_regname(n); | |
355 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0); | |
356 // %%% This is really a waste but we'll keep things as they were for now | |
357 if (true) { | |
358 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next()); | |
359 } | |
360 fpu_off += 2; | |
361 } | |
362 assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots"); | |
363 } | |
364 | |
365 if (UseSSE >= 2) { | |
366 int xmm_off = xmm_regs_as_doubles_off; | |
367 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { | |
368 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); | |
369 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); | |
370 // %%% This is really a waste but we'll keep things as they were for now | |
371 if (true) { | |
372 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next()); | |
373 } | |
374 xmm_off += 2; | |
375 } | |
376 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); | |
377 | |
378 } else if (UseSSE == 1) { | |
379 int xmm_off = xmm_regs_as_doubles_off; | |
380 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { | |
381 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); | |
382 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); | |
383 xmm_off += 2; | |
384 } | |
385 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); | |
386 } | |
387 } | |
388 | |
389 return map; | |
390 } | |
391 | |
392 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args, | |
393 bool save_fpu_registers = true) { | |
394 __ block_comment("save_live_registers"); | |
395 | |
304 | 396 // 64bit passes the args in regs to the c++ runtime |
397 int frame_size_in_slots = reg_save_frame_size NOT_LP64(+ num_rt_args); // args + thread | |
0 | 398 // frame_size = round_to(frame_size, 4); |
304 | 399 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word ); |
0 | 400 |
304 | 401 __ pusha(); // integer registers |
0 | 402 |
403 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset"); | |
404 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset"); | |
405 | |
304 | 406 __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); |
0 | 407 |
408 #ifdef ASSERT | |
304 | 409 __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); |
0 | 410 #endif |
411 | |
412 if (save_fpu_registers) { | |
413 if (UseSSE < 2) { | |
414 // save FPU stack | |
304 | 415 __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
0 | 416 __ fwait(); |
417 | |
418 #ifdef ASSERT | |
419 Label ok; | |
304 | 420 __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); |
0 | 421 __ jccb(Assembler::equal, ok); |
422 __ stop("corrupted control word detected"); | |
423 __ bind(ok); | |
424 #endif | |
425 | |
426 // Reset the control word to guard against exceptions being unmasked | |
427 // since fstp_d can cause FPU stack underflow exceptions. Write it | |
428 // into the on stack copy and then reload that to make sure that the | |
429 // current and future values are correct. | |
304 | 430 __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); |
431 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); | |
0 | 432 |
433 // Save the FPU registers in de-opt-able form | |
304 | 434 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
435 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
436 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
437 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
438 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
439 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
440 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
441 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
0 | 442 } |
443 | |
444 if (UseSSE >= 2) { | |
445 // save XMM registers | |
446 // XMM registers can contain float or double values, but this is not known here, | |
447 // so always save them as doubles. | |
448 // note that float values are _not_ converted automatically, so for float values | |
449 // the second word contains only garbage data. | |
304 | 450 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); |
451 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); | |
452 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); | |
453 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); | |
454 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); | |
455 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); | |
456 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); | |
457 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); | |
458 #ifdef _LP64 | |
459 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64), xmm8); | |
460 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72), xmm9); | |
461 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80), xmm10); | |
462 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88), xmm11); | |
463 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96), xmm12); | |
464 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104), xmm13); | |
465 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112), xmm14); | |
466 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120), xmm15); | |
467 #endif // _LP64 | |
0 | 468 } else if (UseSSE == 1) { |
469 // save XMM registers as float because double not supported without SSE2 | |
304 | 470 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); |
471 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); | |
472 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); | |
473 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); | |
474 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); | |
475 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); | |
476 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); | |
477 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); | |
0 | 478 } |
479 } | |
480 | |
481 // FPU stack must be empty now | |
482 __ verify_FPU(0, "save_live_registers"); | |
483 | |
484 return generate_oop_map(sasm, num_rt_args, save_fpu_registers); | |
485 } | |
486 | |
487 | |
488 static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) { | |
489 if (restore_fpu_registers) { | |
490 if (UseSSE >= 2) { | |
491 // restore XMM registers | |
304 | 492 __ movdbl(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
493 __ movdbl(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
494 __ movdbl(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
495 __ movdbl(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
496 __ movdbl(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
497 __ movdbl(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
498 __ movdbl(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
499 __ movdbl(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
500 #ifdef _LP64 | |
501 __ movdbl(xmm8, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64)); | |
502 __ movdbl(xmm9, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72)); | |
503 __ movdbl(xmm10, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80)); | |
504 __ movdbl(xmm11, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88)); | |
505 __ movdbl(xmm12, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96)); | |
506 __ movdbl(xmm13, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104)); | |
507 __ movdbl(xmm14, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112)); | |
508 __ movdbl(xmm15, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120)); | |
509 #endif // _LP64 | |
0 | 510 } else if (UseSSE == 1) { |
511 // restore XMM registers | |
304 | 512 __ movflt(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
513 __ movflt(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
514 __ movflt(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
515 __ movflt(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
516 __ movflt(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
517 __ movflt(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
518 __ movflt(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
519 __ movflt(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
0 | 520 } |
521 | |
522 if (UseSSE < 2) { | |
304 | 523 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
0 | 524 } else { |
525 // check that FPU stack is really empty | |
526 __ verify_FPU(0, "restore_live_registers"); | |
527 } | |
528 | |
529 } else { | |
530 // check that FPU stack is really empty | |
531 __ verify_FPU(0, "restore_live_registers"); | |
532 } | |
533 | |
534 #ifdef ASSERT | |
535 { | |
536 Label ok; | |
304 | 537 __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); |
0 | 538 __ jcc(Assembler::equal, ok); |
539 __ stop("bad offsets in frame"); | |
540 __ bind(ok); | |
541 } | |
304 | 542 #endif // ASSERT |
0 | 543 |
304 | 544 __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); |
0 | 545 } |
546 | |
547 | |
548 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) { | |
549 __ block_comment("restore_live_registers"); | |
550 | |
551 restore_fpu(sasm, restore_fpu_registers); | |
304 | 552 __ popa(); |
0 | 553 } |
554 | |
555 | |
556 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) { | |
557 __ block_comment("restore_live_registers_except_rax"); | |
558 | |
559 restore_fpu(sasm, restore_fpu_registers); | |
560 | |
304 | 561 #ifdef _LP64 |
562 __ movptr(r15, Address(rsp, 0)); | |
563 __ movptr(r14, Address(rsp, wordSize)); | |
564 __ movptr(r13, Address(rsp, 2 * wordSize)); | |
565 __ movptr(r12, Address(rsp, 3 * wordSize)); | |
566 __ movptr(r11, Address(rsp, 4 * wordSize)); | |
567 __ movptr(r10, Address(rsp, 5 * wordSize)); | |
568 __ movptr(r9, Address(rsp, 6 * wordSize)); | |
569 __ movptr(r8, Address(rsp, 7 * wordSize)); | |
570 __ movptr(rdi, Address(rsp, 8 * wordSize)); | |
571 __ movptr(rsi, Address(rsp, 9 * wordSize)); | |
572 __ movptr(rbp, Address(rsp, 10 * wordSize)); | |
573 // skip rsp | |
574 __ movptr(rbx, Address(rsp, 12 * wordSize)); | |
575 __ movptr(rdx, Address(rsp, 13 * wordSize)); | |
576 __ movptr(rcx, Address(rsp, 14 * wordSize)); | |
577 | |
578 __ addptr(rsp, 16 * wordSize); | |
579 #else | |
580 | |
581 __ pop(rdi); | |
582 __ pop(rsi); | |
583 __ pop(rbp); | |
584 __ pop(rbx); // skip this value | |
585 __ pop(rbx); | |
586 __ pop(rdx); | |
587 __ pop(rcx); | |
588 __ addptr(rsp, BytesPerWord); | |
589 #endif // _LP64 | |
0 | 590 } |
591 | |
592 | |
593 void Runtime1::initialize_pd() { | |
594 // nothing to do | |
595 } | |
596 | |
597 | |
598 // target: the entry point of the method that creates and posts the exception oop | |
599 // has_argument: true if the exception needs an argument (passed on stack because registers must be preserved) | |
600 | |
601 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) { | |
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602 OopMapSet* oop_maps = new OopMapSet(); |
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603 if (UseC1X) { |
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604 // c1x passes the argument in r10 |
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605 OopMap* oop_map = save_live_registers(sasm, 1); |
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606 |
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607 // now all registers are saved and can be used freely |
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608 // verify that no old value is used accidentally |
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609 __ invalidate_registers(true, true, true, true, true, true); |
0 | 610 |
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611 // registers used by this stub |
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612 const Register temp_reg = rbx; |
0 | 613 |
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614 // load argument for exception that is passed as an argument into the stub |
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615 if (has_argument) { |
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616 __ movptr(c_rarg1, r10); |
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617 } |
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618 int call_offset = __ call_RT(noreg, noreg, target, has_argument ? 1 : 0); |
0 | 619 |
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620 oop_maps->add_gc_map(call_offset, oop_map); |
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621 } else { |
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622 // preserve all registers |
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623 int num_rt_args = has_argument ? 2 : 1; |
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624 OopMap* oop_map = save_live_registers(sasm, num_rt_args); |
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625 |
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626 // now all registers are saved and can be used freely |
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627 // verify that no old value is used accidentally |
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628 __ invalidate_registers(true, true, true, true, true, true); |
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629 |
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630 // registers used by this stub |
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631 const Register temp_reg = rbx; |
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632 |
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633 // load argument for exception that is passed as an argument into the stub |
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634 if (has_argument) { |
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635 #ifdef _LP64 |
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636 __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord)); |
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637 #else |
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638 __ movptr(temp_reg, Address(rbp, 2*BytesPerWord)); |
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639 __ push(temp_reg); |
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640 #endif // _LP64 |
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641 } |
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642 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1); |
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643 |
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644 oop_maps->add_gc_map(call_offset, oop_map); |
0 | 645 } |
646 | |
647 __ stop("should not reach here"); | |
648 | |
649 return oop_maps; | |
650 } | |
651 | |
652 | |
653 void Runtime1::generate_handle_exception(StubAssembler *sasm, OopMapSet* oop_maps, OopMap* oop_map, bool save_fpu_registers) { | |
654 // incoming parameters | |
655 const Register exception_oop = rax; | |
656 const Register exception_pc = rdx; | |
657 // other registers used in this stub | |
658 const Register real_return_addr = rbx; | |
304 | 659 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
0 | 660 |
661 __ block_comment("generate_handle_exception"); | |
662 | |
663 #ifdef TIERED | |
664 // C2 can leave the fpu stack dirty | |
665 if (UseSSE < 2 ) { | |
666 __ empty_FPU_stack(); | |
667 } | |
668 #endif // TIERED | |
669 | |
670 // verify that only rax, and rdx is valid at this time | |
671 __ invalidate_registers(false, true, true, false, true, true); | |
672 // verify that rax, contains a valid exception | |
673 __ verify_not_null_oop(exception_oop); | |
674 | |
675 // load address of JavaThread object for thread-local data | |
304 | 676 NOT_LP64(__ get_thread(thread);) |
0 | 677 |
678 #ifdef ASSERT | |
679 // check that fields in JavaThread for exception oop and issuing pc are | |
680 // empty before writing to them | |
681 Label oop_empty; | |
304 | 682 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD); |
0 | 683 __ jcc(Assembler::equal, oop_empty); |
684 __ stop("exception oop already set"); | |
685 __ bind(oop_empty); | |
686 | |
687 Label pc_empty; | |
304 | 688 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
0 | 689 __ jcc(Assembler::equal, pc_empty); |
690 __ stop("exception pc already set"); | |
691 __ bind(pc_empty); | |
692 #endif | |
693 | |
694 // save exception oop and issuing pc into JavaThread | |
695 // (exception handler will load it from here) | |
304 | 696 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop); |
697 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc); | |
0 | 698 |
699 // save real return address (pc that called this stub) | |
304 | 700 __ movptr(real_return_addr, Address(rbp, 1*BytesPerWord)); |
701 __ movptr(Address(rsp, temp_1_off * VMRegImpl::stack_slot_size), real_return_addr); | |
0 | 702 |
703 // patch throwing pc into return address (has bci & oop map) | |
304 | 704 __ movptr(Address(rbp, 1*BytesPerWord), exception_pc); |
0 | 705 |
706 // compute the exception handler. | |
707 // the exception oop and the throwing pc are read from the fields in JavaThread | |
708 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); | |
709 oop_maps->add_gc_map(call_offset, oop_map); | |
710 | |
1295 | 711 // rax,: handler address |
0 | 712 // will be the deopt blob if nmethod was deoptimized while we looked up |
713 // handler regardless of whether handler existed in the nmethod. | |
714 | |
715 // only rax, is valid at this time, all other registers have been destroyed by the runtime call | |
716 __ invalidate_registers(false, true, true, true, true, true); | |
717 | |
1295 | 718 #ifdef ASSERT |
0 | 719 // Do we have an exception handler in the nmethod? |
720 Label done; | |
304 | 721 __ testptr(rax, rax); |
1295 | 722 __ jcc(Assembler::notZero, done); |
723 __ stop("no handler found"); | |
724 __ bind(done); | |
725 #endif | |
0 | 726 |
727 // exception handler found | |
728 // patch the return address -> the stub will directly return to the exception handler | |
304 | 729 __ movptr(Address(rbp, 1*BytesPerWord), rax); |
0 | 730 |
731 // restore registers | |
732 restore_live_registers(sasm, save_fpu_registers); | |
733 | |
734 // return to exception handler | |
735 __ leave(); | |
736 __ ret(0); | |
737 | |
738 } | |
739 | |
1429
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740 void Runtime1::c1x_generate_handle_exception(StubAssembler *sasm, OopMapSet* oop_maps, OopMap* oop_map) { |
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741 NOT_LP64(fatal("64 bit only")); |
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742 // incoming parameters |
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743 const Register exception_oop = j_rarg0; |
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744 // other registers used in this stub |
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745 const Register exception_pc = j_rarg1; |
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746 const Register thread = r15_thread; |
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747 |
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748 __ block_comment("c1x_generate_handle_exception"); |
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749 |
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750 // verify that rax, contains a valid exception |
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751 __ verify_not_null_oop(exception_oop); |
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752 |
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753 #ifdef ASSERT |
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754 // check that fields in JavaThread for exception oop and issuing pc are |
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755 // empty before writing to them |
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756 Label oop_empty; |
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757 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD); |
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758 __ jcc(Assembler::equal, oop_empty); |
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759 __ stop("exception oop already set"); |
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760 __ bind(oop_empty); |
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761 |
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762 Label pc_empty; |
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763 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
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764 __ jcc(Assembler::equal, pc_empty); |
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765 __ stop("exception pc already set"); |
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766 __ bind(pc_empty); |
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767 #endif |
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768 |
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769 // save exception oop and issuing pc into JavaThread |
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770 // (exception handler will load it from here) |
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771 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop); |
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772 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord)); |
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773 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc); |
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774 |
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775 // compute the exception handler. |
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776 // the exception oop and the throwing pc are read from the fields in JavaThread |
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777 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); |
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778 oop_maps->add_gc_map(call_offset, oop_map); |
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779 |
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780 // rax,: handler address |
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781 // will be the deopt blob if nmethod was deoptimized while we looked up |
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782 // handler regardless of whether handler existed in the nmethod. |
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783 |
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784 // only rax, is valid at this time, all other registers have been destroyed by the runtime call |
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785 __ invalidate_registers(false, true, true, true, true, true); |
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786 |
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787 #ifdef ASSERT |
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788 // Do we have an exception handler in the nmethod? |
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789 Label done; |
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790 __ testptr(rax, rax); |
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791 __ jcc(Assembler::notZero, done); |
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792 __ stop("no handler found"); |
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793 __ bind(done); |
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794 #endif |
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795 |
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796 // exception handler found |
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797 // patch the return address -> the stub will directly return to the exception handler |
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798 __ movptr(Address(rbp, 1*BytesPerWord), rax); |
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799 |
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800 // restore registers |
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801 restore_live_registers(sasm, false); |
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802 |
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803 // return to exception handler |
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804 __ leave(); |
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805 __ ret(0); |
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806 } |
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807 |
0 | 808 |
809 void Runtime1::generate_unwind_exception(StubAssembler *sasm) { | |
810 // incoming parameters | |
811 const Register exception_oop = rax; | |
1295 | 812 // callee-saved copy of exception_oop during runtime call |
813 const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14); | |
0 | 814 // other registers used in this stub |
815 const Register exception_pc = rdx; | |
816 const Register handler_addr = rbx; | |
304 | 817 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
0 | 818 |
819 // verify that only rax, is valid at this time | |
820 __ invalidate_registers(false, true, true, true, true, true); | |
821 | |
822 #ifdef ASSERT | |
823 // check that fields in JavaThread for exception oop and issuing pc are empty | |
304 | 824 NOT_LP64(__ get_thread(thread);) |
0 | 825 Label oop_empty; |
304 | 826 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0); |
0 | 827 __ jcc(Assembler::equal, oop_empty); |
828 __ stop("exception oop must be empty"); | |
829 __ bind(oop_empty); | |
830 | |
831 Label pc_empty; | |
304 | 832 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
0 | 833 __ jcc(Assembler::equal, pc_empty); |
834 __ stop("exception pc must be empty"); | |
835 __ bind(pc_empty); | |
836 #endif | |
837 | |
838 // clear the FPU stack in case any FPU results are left behind | |
839 __ empty_FPU_stack(); | |
840 | |
1295 | 841 // save exception_oop in callee-saved register to preserve it during runtime calls |
842 __ verify_not_null_oop(exception_oop); | |
843 __ movptr(exception_oop_callee_saved, exception_oop); | |
844 | |
845 NOT_LP64(__ get_thread(thread);) | |
846 // Get return address (is on top of stack after leave). | |
304 | 847 __ movptr(exception_pc, Address(rsp, 0)); |
0 | 848 |
1295 | 849 // search the exception handler address of the caller (using the return address) |
850 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc); | |
851 // rax: exception handler address of the caller | |
0 | 852 |
1295 | 853 // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call. |
854 __ invalidate_registers(false, true, true, true, false, true); | |
0 | 855 |
856 // move result of call into correct register | |
304 | 857 __ movptr(handler_addr, rax); |
0 | 858 |
1295 | 859 // Restore exception oop to RAX (required convention of exception handler). |
860 __ movptr(exception_oop, exception_oop_callee_saved); | |
0 | 861 |
1295 | 862 // verify that there is really a valid exception in rax |
863 __ verify_not_null_oop(exception_oop); | |
0 | 864 |
865 // get throwing pc (= return address). | |
866 // rdx has been destroyed by the call, so it must be set again | |
867 // the pop is also necessary to simulate the effect of a ret(0) | |
304 | 868 __ pop(exception_pc); |
0 | 869 |
1295 | 870 // Restore SP from BP if the exception PC is a MethodHandle call site. |
871 NOT_LP64(__ get_thread(thread);) | |
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872 __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0); |
1295 | 873 __ cmovptr(Assembler::notEqual, rsp, rbp); |
0 | 874 |
875 // continue at exception handler (return address removed) | |
876 // note: do *not* remove arguments when unwinding the | |
877 // activation since the caller assumes having | |
878 // all arguments on the stack when entering the | |
879 // runtime to determine the exception handler | |
880 // (GC happens at call site with arguments!) | |
1295 | 881 // rax: exception oop |
0 | 882 // rdx: throwing pc |
1295 | 883 // rbx: exception handler |
0 | 884 __ jmp(handler_addr); |
885 } | |
886 | |
887 | |
888 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) { | |
889 // use the maximum number of runtime-arguments here because it is difficult to | |
890 // distinguish each RT-Call. | |
891 // Note: This number affects also the RT-Call in generate_handle_exception because | |
892 // the oop-map is shared for all calls. | |
893 const int num_rt_args = 2; // thread + dummy | |
894 | |
895 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); | |
896 assert(deopt_blob != NULL, "deoptimization blob must have been created"); | |
897 | |
898 OopMap* oop_map = save_live_registers(sasm, num_rt_args); | |
899 | |
304 | 900 #ifdef _LP64 |
901 const Register thread = r15_thread; | |
902 // No need to worry about dummy | |
903 __ mov(c_rarg0, thread); | |
904 #else | |
905 __ push(rax); // push dummy | |
0 | 906 |
907 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions) | |
908 // push java thread (becomes first argument of C function) | |
909 __ get_thread(thread); | |
304 | 910 __ push(thread); |
911 #endif // _LP64 | |
0 | 912 __ set_last_Java_frame(thread, noreg, rbp, NULL); |
913 // do the call | |
914 __ call(RuntimeAddress(target)); | |
915 OopMapSet* oop_maps = new OopMapSet(); | |
916 oop_maps->add_gc_map(__ offset(), oop_map); | |
917 // verify callee-saved register | |
918 #ifdef ASSERT | |
919 guarantee(thread != rax, "change this code"); | |
304 | 920 __ push(rax); |
0 | 921 { Label L; |
922 __ get_thread(rax); | |
304 | 923 __ cmpptr(thread, rax); |
0 | 924 __ jcc(Assembler::equal, L); |
304 | 925 __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?"); |
0 | 926 __ bind(L); |
927 } | |
304 | 928 __ pop(rax); |
0 | 929 #endif |
930 __ reset_last_Java_frame(thread, true, false); | |
304 | 931 #ifndef _LP64 |
932 __ pop(rcx); // discard thread arg | |
933 __ pop(rcx); // discard dummy | |
934 #endif // _LP64 | |
0 | 935 |
936 // check for pending exceptions | |
937 { Label L; | |
304 | 938 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 939 __ jcc(Assembler::equal, L); |
940 // exception pending => remove activation and forward to exception handler | |
941 | |
304 | 942 __ testptr(rax, rax); // have we deoptimized? |
0 | 943 __ jump_cc(Assembler::equal, |
944 RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); | |
945 | |
946 // the deopt blob expects exceptions in the special fields of | |
947 // JavaThread, so copy and clear pending exception. | |
948 | |
949 // load and clear pending exception | |
304 | 950 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); |
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951 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
0 | 952 |
953 // check that there is really a valid exception | |
954 __ verify_not_null_oop(rax); | |
955 | |
956 // load throwing pc: this is the return address of the stub | |
304 | 957 __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size)); |
0 | 958 |
959 #ifdef ASSERT | |
960 // check that fields in JavaThread for exception oop and issuing pc are empty | |
961 Label oop_empty; | |
304 | 962 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); |
0 | 963 __ jcc(Assembler::equal, oop_empty); |
964 __ stop("exception oop must be empty"); | |
965 __ bind(oop_empty); | |
966 | |
967 Label pc_empty; | |
304 | 968 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); |
0 | 969 __ jcc(Assembler::equal, pc_empty); |
970 __ stop("exception pc must be empty"); | |
971 __ bind(pc_empty); | |
972 #endif | |
973 | |
974 // store exception oop and throwing pc to JavaThread | |
304 | 975 __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax); |
976 __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx); | |
0 | 977 |
978 restore_live_registers(sasm); | |
979 | |
980 __ leave(); | |
304 | 981 __ addptr(rsp, BytesPerWord); // remove return address from stack |
0 | 982 |
983 // Forward the exception directly to deopt blob. We can blow no | |
984 // registers and must leave throwing pc on the stack. A patch may | |
985 // have values live in registers so the entry point with the | |
986 // exception in tls. | |
987 __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls())); | |
988 | |
989 __ bind(L); | |
990 } | |
991 | |
992 | |
993 // Runtime will return true if the nmethod has been deoptimized during | |
994 // the patching process. In that case we must do a deopt reexecute instead. | |
995 | |
996 Label reexecuteEntry, cont; | |
997 | |
304 | 998 __ testptr(rax, rax); // have we deoptimized? |
0 | 999 __ jcc(Assembler::equal, cont); // no |
1000 | |
1001 // Will reexecute. Proper return address is already on the stack we just restore | |
1002 // registers, pop all of our frame but the return address and jump to the deopt blob | |
1003 restore_live_registers(sasm); | |
1004 __ leave(); | |
1005 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); | |
1006 | |
1007 __ bind(cont); | |
1008 restore_live_registers(sasm); | |
1009 __ leave(); | |
1010 __ ret(0); | |
1011 | |
1012 return oop_maps; | |
1013 | |
1014 } | |
1015 | |
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1016 JRT_ENTRY(void, c1x_create_null_exception(JavaThread* thread)) |
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1017 thread->set_vm_result(Exceptions::new_exception(thread, vmSymbols::java_lang_NullPointerException(), NULL)()); |
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1018 JRT_END |
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1019 |
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1020 |
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1021 |
0 | 1022 |
1023 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { | |
1024 | |
1025 // for better readability | |
1026 const bool must_gc_arguments = true; | |
1027 const bool dont_gc_arguments = false; | |
1028 | |
1029 // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu | |
1030 bool save_fpu_registers = true; | |
1031 | |
1032 // stub code & info for the different stubs | |
1033 OopMapSet* oop_maps = NULL; | |
1034 switch (id) { | |
1035 case forward_exception_id: | |
1036 { | |
1037 // we're handling an exception in the context of a compiled | |
1038 // frame. The registers have been saved in the standard | |
1039 // places. Perform an exception lookup in the caller and | |
1040 // dispatch to the handler if found. Otherwise unwind and | |
1041 // dispatch to the callers exception handler. | |
1042 | |
304 | 1043 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
0 | 1044 const Register exception_oop = rax; |
1045 const Register exception_pc = rdx; | |
1046 | |
1047 // load pending exception oop into rax, | |
304 | 1048 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset())); |
0 | 1049 // clear pending exception |
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1050 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
0 | 1051 |
1052 // load issuing PC (the return address for this stub) into rdx | |
304 | 1053 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord)); |
0 | 1054 |
1055 // make sure that the vm_results are cleared (may be unnecessary) | |
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1056 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
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1057 __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
0 | 1058 |
1059 // verify that that there is really a valid exception in rax, | |
1060 __ verify_not_null_oop(exception_oop); | |
1061 | |
1062 | |
1063 oop_maps = new OopMapSet(); | |
1064 OopMap* oop_map = generate_oop_map(sasm, 1); | |
1065 generate_handle_exception(sasm, oop_maps, oop_map); | |
1066 __ stop("should not reach here"); | |
1067 } | |
1068 break; | |
1069 | |
1070 case new_instance_id: | |
1071 case fast_new_instance_id: | |
1072 case fast_new_instance_init_check_id: | |
1073 { | |
1074 Register klass = rdx; // Incoming | |
1075 Register obj = rax; // Result | |
1076 | |
1077 if (id == new_instance_id) { | |
1078 __ set_info("new_instance", dont_gc_arguments); | |
1079 } else if (id == fast_new_instance_id) { | |
1080 __ set_info("fast new_instance", dont_gc_arguments); | |
1081 } else { | |
1082 assert(id == fast_new_instance_init_check_id, "bad StubID"); | |
1083 __ set_info("fast new_instance init check", dont_gc_arguments); | |
1084 } | |
1085 | |
1086 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) && | |
1087 UseTLAB && FastTLABRefill) { | |
1088 Label slow_path; | |
1089 Register obj_size = rcx; | |
1090 Register t1 = rbx; | |
1091 Register t2 = rsi; | |
1092 assert_different_registers(klass, obj, obj_size, t1, t2); | |
1093 | |
304 | 1094 __ push(rdi); |
1095 __ push(rbx); | |
0 | 1096 |
1097 if (id == fast_new_instance_init_check_id) { | |
1098 // make sure the klass is initialized | |
1099 __ cmpl(Address(klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc)), instanceKlass::fully_initialized); | |
1100 __ jcc(Assembler::notEqual, slow_path); | |
1101 } | |
1102 | |
1103 #ifdef ASSERT | |
1104 // assert object can be fast path allocated | |
1105 { | |
1106 Label ok, not_ok; | |
1107 __ movl(obj_size, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc))); | |
1108 __ cmpl(obj_size, 0); // make sure it's an instance (LH > 0) | |
1109 __ jcc(Assembler::lessEqual, not_ok); | |
1110 __ testl(obj_size, Klass::_lh_instance_slow_path_bit); | |
1111 __ jcc(Assembler::zero, ok); | |
1112 __ bind(not_ok); | |
1113 __ stop("assert(can be fast path allocated)"); | |
1114 __ should_not_reach_here(); | |
1115 __ bind(ok); | |
1116 } | |
1117 #endif // ASSERT | |
1118 | |
1119 // if we got here then the TLAB allocation failed, so try | |
1120 // refilling the TLAB or allocating directly from eden. | |
1121 Label retry_tlab, try_eden; | |
1122 __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass) | |
1123 | |
1124 __ bind(retry_tlab); | |
1125 | |
304 | 1126 // get the instance size (size is postive so movl is fine for 64bit) |
0 | 1127 __ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
1128 __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path); | |
1129 __ initialize_object(obj, klass, obj_size, 0, t1, t2); | |
1130 __ verify_oop(obj); | |
304 | 1131 __ pop(rbx); |
1132 __ pop(rdi); | |
0 | 1133 __ ret(0); |
1134 | |
1135 __ bind(try_eden); | |
304 | 1136 // get the instance size (size is postive so movl is fine for 64bit) |
0 | 1137 __ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
1138 __ eden_allocate(obj, obj_size, 0, t1, slow_path); | |
1139 __ initialize_object(obj, klass, obj_size, 0, t1, t2); | |
1140 __ verify_oop(obj); | |
304 | 1141 __ pop(rbx); |
1142 __ pop(rdi); | |
0 | 1143 __ ret(0); |
1144 | |
1145 __ bind(slow_path); | |
304 | 1146 __ pop(rbx); |
1147 __ pop(rdi); | |
0 | 1148 } |
1149 | |
1150 __ enter(); | |
1151 OopMap* map = save_live_registers(sasm, 2); | |
1152 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass); | |
1153 oop_maps = new OopMapSet(); | |
1154 oop_maps->add_gc_map(call_offset, map); | |
1155 restore_live_registers_except_rax(sasm); | |
1156 __ verify_oop(obj); | |
1157 __ leave(); | |
1158 __ ret(0); | |
1159 | |
1160 // rax,: new instance | |
1161 } | |
1162 | |
1163 break; | |
1164 | |
1165 #ifdef TIERED | |
1166 case counter_overflow_id: | |
1167 { | |
1168 Register bci = rax; | |
1169 __ enter(); | |
1170 OopMap* map = save_live_registers(sasm, 2); | |
1171 // Retrieve bci | |
1172 __ movl(bci, Address(rbp, 2*BytesPerWord)); | |
1173 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci); | |
1174 oop_maps = new OopMapSet(); | |
1175 oop_maps->add_gc_map(call_offset, map); | |
1176 restore_live_registers(sasm); | |
1177 __ leave(); | |
1178 __ ret(0); | |
1179 } | |
1180 break; | |
1181 #endif // TIERED | |
1182 | |
1183 case new_type_array_id: | |
1184 case new_object_array_id: | |
1185 { | |
1186 Register length = rbx; // Incoming | |
1187 Register klass = rdx; // Incoming | |
1188 Register obj = rax; // Result | |
1189 | |
1190 if (id == new_type_array_id) { | |
1191 __ set_info("new_type_array", dont_gc_arguments); | |
1192 } else { | |
1193 __ set_info("new_object_array", dont_gc_arguments); | |
1194 } | |
1195 | |
1196 #ifdef ASSERT | |
1197 // assert object type is really an array of the proper kind | |
1198 { | |
1199 Label ok; | |
1200 Register t0 = obj; | |
1201 __ movl(t0, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc))); | |
1202 __ sarl(t0, Klass::_lh_array_tag_shift); | |
1203 int tag = ((id == new_type_array_id) | |
1204 ? Klass::_lh_array_tag_type_value | |
1205 : Klass::_lh_array_tag_obj_value); | |
1206 __ cmpl(t0, tag); | |
1207 __ jcc(Assembler::equal, ok); | |
1208 __ stop("assert(is an array klass)"); | |
1209 __ should_not_reach_here(); | |
1210 __ bind(ok); | |
1211 } | |
1212 #endif // ASSERT | |
1213 | |
1214 if (UseTLAB && FastTLABRefill) { | |
1215 Register arr_size = rsi; | |
1216 Register t1 = rcx; // must be rcx for use as shift count | |
1217 Register t2 = rdi; | |
1218 Label slow_path; | |
1219 assert_different_registers(length, klass, obj, arr_size, t1, t2); | |
1220 | |
1221 // check that array length is small enough for fast path. | |
1222 __ cmpl(length, C1_MacroAssembler::max_array_allocation_length); | |
1223 __ jcc(Assembler::above, slow_path); | |
1224 | |
1225 // if we got here then the TLAB allocation failed, so try | |
1226 // refilling the TLAB or allocating directly from eden. | |
1227 Label retry_tlab, try_eden; | |
1228 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx, & rdx | |
1229 | |
1230 __ bind(retry_tlab); | |
1231 | |
1232 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) | |
304 | 1233 // since size is postive movl does right thing on 64bit |
0 | 1234 __ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
304 | 1235 // since size is postive movl does right thing on 64bit |
0 | 1236 __ movl(arr_size, length); |
1237 assert(t1 == rcx, "fixed register usage"); | |
304 | 1238 __ shlptr(arr_size /* by t1=rcx, mod 32 */); |
1239 __ shrptr(t1, Klass::_lh_header_size_shift); | |
1240 __ andptr(t1, Klass::_lh_header_size_mask); | |
1241 __ addptr(arr_size, t1); | |
1242 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up | |
1243 __ andptr(arr_size, ~MinObjAlignmentInBytesMask); | |
0 | 1244 |
1245 __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size | |
1246 | |
1247 __ initialize_header(obj, klass, length, t1, t2); | |
1248 __ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); | |
1249 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); | |
1250 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); | |
304 | 1251 __ andptr(t1, Klass::_lh_header_size_mask); |
1252 __ subptr(arr_size, t1); // body length | |
1253 __ addptr(t1, obj); // body start | |
0 | 1254 __ initialize_body(t1, arr_size, 0, t2); |
1255 __ verify_oop(obj); | |
1256 __ ret(0); | |
1257 | |
1258 __ bind(try_eden); | |
1259 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) | |
304 | 1260 // since size is postive movl does right thing on 64bit |
0 | 1261 __ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
304 | 1262 // since size is postive movl does right thing on 64bit |
0 | 1263 __ movl(arr_size, length); |
1264 assert(t1 == rcx, "fixed register usage"); | |
304 | 1265 __ shlptr(arr_size /* by t1=rcx, mod 32 */); |
1266 __ shrptr(t1, Klass::_lh_header_size_shift); | |
1267 __ andptr(t1, Klass::_lh_header_size_mask); | |
1268 __ addptr(arr_size, t1); | |
1269 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up | |
1270 __ andptr(arr_size, ~MinObjAlignmentInBytesMask); | |
0 | 1271 |
1272 __ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size | |
1273 | |
1274 __ initialize_header(obj, klass, length, t1, t2); | |
1275 __ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); | |
1276 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); | |
1277 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); | |
304 | 1278 __ andptr(t1, Klass::_lh_header_size_mask); |
1279 __ subptr(arr_size, t1); // body length | |
1280 __ addptr(t1, obj); // body start | |
0 | 1281 __ initialize_body(t1, arr_size, 0, t2); |
1282 __ verify_oop(obj); | |
1283 __ ret(0); | |
1284 | |
1285 __ bind(slow_path); | |
1286 } | |
1287 | |
1288 __ enter(); | |
1289 OopMap* map = save_live_registers(sasm, 3); | |
1290 int call_offset; | |
1291 if (id == new_type_array_id) { | |
1292 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length); | |
1293 } else { | |
1294 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length); | |
1295 } | |
1296 | |
1297 oop_maps = new OopMapSet(); | |
1298 oop_maps->add_gc_map(call_offset, map); | |
1299 restore_live_registers_except_rax(sasm); | |
1300 | |
1301 __ verify_oop(obj); | |
1302 __ leave(); | |
1303 __ ret(0); | |
1304 | |
1305 // rax,: new array | |
1306 } | |
1307 break; | |
1308 | |
1309 case new_multi_array_id: | |
1310 { StubFrame f(sasm, "new_multi_array", dont_gc_arguments); | |
1311 // rax,: klass | |
1312 // rbx,: rank | |
1313 // rcx: address of 1st dimension | |
1314 OopMap* map = save_live_registers(sasm, 4); | |
1315 int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx); | |
1316 | |
1317 oop_maps = new OopMapSet(); | |
1318 oop_maps->add_gc_map(call_offset, map); | |
1319 restore_live_registers_except_rax(sasm); | |
1320 | |
1321 // rax,: new multi array | |
1322 __ verify_oop(rax); | |
1323 } | |
1324 break; | |
1325 | |
1326 case register_finalizer_id: | |
1327 { | |
1328 __ set_info("register_finalizer", dont_gc_arguments); | |
1329 | |
304 | 1330 // This is called via call_runtime so the arguments |
1331 // will be place in C abi locations | |
1332 | |
1333 #ifdef _LP64 | |
1334 __ verify_oop(c_rarg0); | |
1335 __ mov(rax, c_rarg0); | |
1336 #else | |
0 | 1337 // The object is passed on the stack and we haven't pushed a |
1338 // frame yet so it's one work away from top of stack. | |
304 | 1339 __ movptr(rax, Address(rsp, 1 * BytesPerWord)); |
0 | 1340 __ verify_oop(rax); |
304 | 1341 #endif // _LP64 |
0 | 1342 |
1343 // load the klass and check the has finalizer flag | |
1344 Label register_finalizer; | |
1345 Register t = rsi; | |
304 | 1346 __ movptr(t, Address(rax, oopDesc::klass_offset_in_bytes())); |
0 | 1347 __ movl(t, Address(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc))); |
1348 __ testl(t, JVM_ACC_HAS_FINALIZER); | |
1349 __ jcc(Assembler::notZero, register_finalizer); | |
1350 __ ret(0); | |
1351 | |
1352 __ bind(register_finalizer); | |
1353 __ enter(); | |
1354 OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */); | |
1355 int call_offset = __ call_RT(noreg, noreg, | |
1356 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax); | |
1357 oop_maps = new OopMapSet(); | |
1358 oop_maps->add_gc_map(call_offset, oop_map); | |
1359 | |
1360 // Now restore all the live registers | |
1361 restore_live_registers(sasm); | |
1362 | |
1363 __ leave(); | |
1364 __ ret(0); | |
1365 } | |
1366 break; | |
1367 | |
1368 case throw_range_check_failed_id: | |
1369 { StubFrame f(sasm, "range_check_failed", dont_gc_arguments); | |
1370 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true); | |
1371 } | |
1372 break; | |
1373 | |
1374 case throw_index_exception_id: | |
1375 { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments); | |
1376 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true); | |
1377 } | |
1378 break; | |
1379 | |
1380 case throw_div0_exception_id: | |
1381 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments); | |
1382 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false); | |
1383 } | |
1384 break; | |
1385 | |
1386 case throw_null_pointer_exception_id: | |
1387 { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments); | |
1388 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false); | |
1389 } | |
1390 break; | |
1391 | |
1392 case handle_exception_nofpu_id: | |
1393 save_fpu_registers = false; | |
1394 // fall through | |
1395 case handle_exception_id: | |
1396 { StubFrame f(sasm, "handle_exception", dont_gc_arguments); | |
1397 oop_maps = new OopMapSet(); | |
1398 OopMap* oop_map = save_live_registers(sasm, 1, save_fpu_registers); | |
1399 generate_handle_exception(sasm, oop_maps, oop_map, save_fpu_registers); | |
1400 } | |
1401 break; | |
1402 | |
1403 case unwind_exception_id: | |
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1404 { |
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1405 __ set_info("unwind_exception", dont_gc_arguments); |
0 | 1406 // note: no stubframe since we are about to leave the current |
1407 // activation and we are calling a leaf VM function only. | |
1408 generate_unwind_exception(sasm); | |
1409 } | |
1410 break; | |
1411 | |
1412 case throw_array_store_exception_id: | |
1413 { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments); | |
1414 // tos + 0: link | |
1415 // + 1: return address | |
1416 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), false); | |
1417 } | |
1418 break; | |
1419 | |
1420 case throw_class_cast_exception_id: | |
1421 { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments); | |
1422 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true); | |
1423 } | |
1424 break; | |
1425 | |
1426 case throw_incompatible_class_change_error_id: | |
1427 { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments); | |
1428 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false); | |
1429 } | |
1430 break; | |
1431 | |
1432 case slow_subtype_check_id: | |
1433 { | |
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1434 // Typical calling sequence: |
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1435 // __ push(klass_RInfo); // object klass or other subclass |
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1436 // __ push(sup_k_RInfo); // array element klass or other superclass |
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1437 // __ call(slow_subtype_check); |
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1438 // Note that the subclass is pushed first, and is therefore deepest. |
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1439 // Previous versions of this code reversed the names 'sub' and 'super'. |
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1440 // This was operationally harmless but made the code unreadable. |
0 | 1441 enum layout { |
304 | 1442 rax_off, SLOT2(raxH_off) |
1443 rcx_off, SLOT2(rcxH_off) | |
1444 rsi_off, SLOT2(rsiH_off) | |
1445 rdi_off, SLOT2(rdiH_off) | |
1446 // saved_rbp_off, SLOT2(saved_rbpH_off) | |
1447 return_off, SLOT2(returnH_off) | |
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1448 sup_k_off, SLOT2(sup_kH_off) |
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1449 klass_off, SLOT2(superH_off) |
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1450 framesize, |
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1451 result_off = klass_off // deepest argument is also the return value |
0 | 1452 }; |
1453 | |
1454 __ set_info("slow_subtype_check", dont_gc_arguments); | |
304 | 1455 __ push(rdi); |
1456 __ push(rsi); | |
1457 __ push(rcx); | |
1458 __ push(rax); | |
0 | 1459 |
304 | 1460 // This is called by pushing args and not with C abi |
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1461 __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass |
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1462 __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass |
0 | 1463 |
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1464 Label success; |
0 | 1465 Label miss; |
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1466 if (UseC1X) { |
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1467 // TODO this should really be within the XirSnippets |
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1468 __ check_klass_subtype_fast_path(rsi, rax, rcx, &success, &miss, NULL); |
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1469 }; |
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1470 |
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1471 __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss); |
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1472 |
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1473 // fallthrough on success: |
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1474 __ bind(success); |
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1475 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result |
304 | 1476 __ pop(rax); |
1477 __ pop(rcx); | |
1478 __ pop(rsi); | |
1479 __ pop(rdi); | |
0 | 1480 __ ret(0); |
1481 | |
1482 __ bind(miss); | |
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1483 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result |
304 | 1484 __ pop(rax); |
1485 __ pop(rcx); | |
1486 __ pop(rsi); | |
1487 __ pop(rdi); | |
0 | 1488 __ ret(0); |
1489 } | |
1490 break; | |
1491 | |
1492 case monitorenter_nofpu_id: | |
1493 save_fpu_registers = false; | |
1494 // fall through | |
1495 case monitorenter_id: | |
1496 { | |
1497 StubFrame f(sasm, "monitorenter", dont_gc_arguments); | |
1498 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers); | |
1499 | |
304 | 1500 // Called with store_parameter and not C abi |
1501 | |
0 | 1502 f.load_argument(1, rax); // rax,: object |
1503 f.load_argument(0, rbx); // rbx,: lock address | |
1504 | |
1505 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx); | |
1506 | |
1507 oop_maps = new OopMapSet(); | |
1508 oop_maps->add_gc_map(call_offset, map); | |
1509 restore_live_registers(sasm, save_fpu_registers); | |
1510 } | |
1511 break; | |
1512 | |
1513 case monitorexit_nofpu_id: | |
1514 save_fpu_registers = false; | |
1515 // fall through | |
1516 case monitorexit_id: | |
1517 { | |
1518 StubFrame f(sasm, "monitorexit", dont_gc_arguments); | |
1519 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); | |
1520 | |
304 | 1521 // Called with store_parameter and not C abi |
1522 | |
0 | 1523 f.load_argument(0, rax); // rax,: lock address |
1524 | |
1525 // note: really a leaf routine but must setup last java sp | |
1526 // => use call_RT for now (speed can be improved by | |
1527 // doing last java sp setup manually) | |
1528 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax); | |
1529 | |
1530 oop_maps = new OopMapSet(); | |
1531 oop_maps->add_gc_map(call_offset, map); | |
1532 restore_live_registers(sasm, save_fpu_registers); | |
1533 | |
1534 } | |
1535 break; | |
1536 | |
1537 case access_field_patching_id: | |
1538 { StubFrame f(sasm, "access_field_patching", dont_gc_arguments); | |
1539 // we should set up register map | |
1540 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching)); | |
1541 } | |
1542 break; | |
1543 | |
1544 case load_klass_patching_id: | |
1545 { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments); | |
1546 // we should set up register map | |
1547 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching)); | |
1548 } | |
1549 break; | |
1550 | |
1551 case jvmti_exception_throw_id: | |
1552 { // rax,: exception oop | |
1553 StubFrame f(sasm, "jvmti_exception_throw", dont_gc_arguments); | |
1554 // Preserve all registers across this potentially blocking call | |
1555 const int num_rt_args = 2; // thread, exception oop | |
1556 OopMap* map = save_live_registers(sasm, num_rt_args); | |
1557 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, Runtime1::post_jvmti_exception_throw), rax); | |
1558 oop_maps = new OopMapSet(); | |
1559 oop_maps->add_gc_map(call_offset, map); | |
1560 restore_live_registers(sasm); | |
1561 } | |
1562 break; | |
1563 | |
1564 case dtrace_object_alloc_id: | |
1565 { // rax,: object | |
1566 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments); | |
1567 // we can't gc here so skip the oopmap but make sure that all | |
1568 // the live registers get saved. | |
1569 save_live_registers(sasm, 1); | |
1570 | |
304 | 1571 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax)); |
0 | 1572 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc))); |
304 | 1573 NOT_LP64(__ pop(rax)); |
0 | 1574 |
1575 restore_live_registers(sasm); | |
1576 } | |
1577 break; | |
1578 | |
1579 case fpu2long_stub_id: | |
1580 { | |
1581 // rax, and rdx are destroyed, but should be free since the result is returned there | |
1582 // preserve rsi,ecx | |
304 | 1583 __ push(rsi); |
1584 __ push(rcx); | |
1585 LP64_ONLY(__ push(rdx);) | |
0 | 1586 |
1587 // check for NaN | |
1588 Label return0, do_return, return_min_jlong, do_convert; | |
1589 | |
304 | 1590 Address value_high_word(rsp, wordSize + 4); |
1591 Address value_low_word(rsp, wordSize); | |
1592 Address result_high_word(rsp, 3*wordSize + 4); | |
1593 Address result_low_word(rsp, 3*wordSize); | |
0 | 1594 |
304 | 1595 __ subptr(rsp, 32); // more than enough on 32bit |
0 | 1596 __ fst_d(value_low_word); |
1597 __ movl(rax, value_high_word); | |
1598 __ andl(rax, 0x7ff00000); | |
1599 __ cmpl(rax, 0x7ff00000); | |
1600 __ jcc(Assembler::notEqual, do_convert); | |
1601 __ movl(rax, value_high_word); | |
1602 __ andl(rax, 0xfffff); | |
1603 __ orl(rax, value_low_word); | |
1604 __ jcc(Assembler::notZero, return0); | |
1605 | |
1606 __ bind(do_convert); | |
1607 __ fnstcw(Address(rsp, 0)); | |
304 | 1608 __ movzwl(rax, Address(rsp, 0)); |
0 | 1609 __ orl(rax, 0xc00); |
1610 __ movw(Address(rsp, 2), rax); | |
1611 __ fldcw(Address(rsp, 2)); | |
1612 __ fwait(); | |
1613 __ fistp_d(result_low_word); | |
1614 __ fldcw(Address(rsp, 0)); | |
1615 __ fwait(); | |
304 | 1616 // This gets the entire long in rax on 64bit |
1617 __ movptr(rax, result_low_word); | |
1618 // testing of high bits | |
0 | 1619 __ movl(rdx, result_high_word); |
304 | 1620 __ mov(rcx, rax); |
0 | 1621 // What the heck is the point of the next instruction??? |
1622 __ xorl(rcx, 0x0); | |
1623 __ movl(rsi, 0x80000000); | |
1624 __ xorl(rsi, rdx); | |
1625 __ orl(rcx, rsi); | |
1626 __ jcc(Assembler::notEqual, do_return); | |
1627 __ fldz(); | |
1628 __ fcomp_d(value_low_word); | |
1629 __ fnstsw_ax(); | |
304 | 1630 #ifdef _LP64 |
1631 __ testl(rax, 0x4100); // ZF & CF == 0 | |
1632 __ jcc(Assembler::equal, return_min_jlong); | |
1633 #else | |
0 | 1634 __ sahf(); |
1635 __ jcc(Assembler::above, return_min_jlong); | |
304 | 1636 #endif // _LP64 |
0 | 1637 // return max_jlong |
304 | 1638 #ifndef _LP64 |
0 | 1639 __ movl(rdx, 0x7fffffff); |
1640 __ movl(rax, 0xffffffff); | |
304 | 1641 #else |
1642 __ mov64(rax, CONST64(0x7fffffffffffffff)); | |
1643 #endif // _LP64 | |
0 | 1644 __ jmp(do_return); |
1645 | |
1646 __ bind(return_min_jlong); | |
304 | 1647 #ifndef _LP64 |
0 | 1648 __ movl(rdx, 0x80000000); |
1649 __ xorl(rax, rax); | |
304 | 1650 #else |
1651 __ mov64(rax, CONST64(0x8000000000000000)); | |
1652 #endif // _LP64 | |
0 | 1653 __ jmp(do_return); |
1654 | |
1655 __ bind(return0); | |
1656 __ fpop(); | |
304 | 1657 #ifndef _LP64 |
1658 __ xorptr(rdx,rdx); | |
1659 __ xorptr(rax,rax); | |
1660 #else | |
1661 __ xorptr(rax, rax); | |
1662 #endif // _LP64 | |
0 | 1663 |
1664 __ bind(do_return); | |
304 | 1665 __ addptr(rsp, 32); |
1666 LP64_ONLY(__ pop(rdx);) | |
1667 __ pop(rcx); | |
1668 __ pop(rsi); | |
0 | 1669 __ ret(0); |
1670 } | |
1671 break; | |
1672 | |
342 | 1673 #ifndef SERIALGC |
1674 case g1_pre_barrier_slow_id: | |
1675 { | |
1676 StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments); | |
1677 // arg0 : previous value of memory | |
1678 | |
1679 BarrierSet* bs = Universe::heap()->barrier_set(); | |
1680 if (bs->kind() != BarrierSet::G1SATBCTLogging) { | |
362 | 1681 __ movptr(rax, (int)id); |
342 | 1682 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); |
1683 __ should_not_reach_here(); | |
1684 break; | |
1685 } | |
1686 | |
362 | 1687 __ push(rax); |
1688 __ push(rdx); | |
342 | 1689 |
1690 const Register pre_val = rax; | |
362 | 1691 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); |
342 | 1692 const Register tmp = rdx; |
1693 | |
362 | 1694 NOT_LP64(__ get_thread(thread);) |
342 | 1695 |
1696 Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1697 PtrQueue::byte_offset_of_active())); | |
1698 | |
1699 Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1700 PtrQueue::byte_offset_of_index())); | |
1701 Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1702 PtrQueue::byte_offset_of_buf())); | |
1703 | |
1704 | |
1705 Label done; | |
1706 Label runtime; | |
1707 | |
1708 // Can we store original value in the thread's buffer? | |
1709 | |
362 | 1710 LP64_ONLY(__ movslq(tmp, queue_index);) |
1711 #ifdef _LP64 | |
1712 __ cmpq(tmp, 0); | |
1713 #else | |
342 | 1714 __ cmpl(queue_index, 0); |
362 | 1715 #endif |
342 | 1716 __ jcc(Assembler::equal, runtime); |
362 | 1717 #ifdef _LP64 |
1718 __ subq(tmp, wordSize); | |
1719 __ movl(queue_index, tmp); | |
1720 __ addq(tmp, buffer); | |
1721 #else | |
342 | 1722 __ subl(queue_index, wordSize); |
1723 __ movl(tmp, buffer); | |
1724 __ addl(tmp, queue_index); | |
362 | 1725 #endif |
1726 | |
342 | 1727 // prev_val (rax) |
1728 f.load_argument(0, pre_val); | |
362 | 1729 __ movptr(Address(tmp, 0), pre_val); |
342 | 1730 __ jmp(done); |
1731 | |
1732 __ bind(runtime); | |
1733 // load the pre-value | |
362 | 1734 __ push(rcx); |
342 | 1735 f.load_argument(0, rcx); |
1736 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread); | |
362 | 1737 __ pop(rcx); |
342 | 1738 |
1739 __ bind(done); | |
362 | 1740 __ pop(rdx); |
1741 __ pop(rax); | |
342 | 1742 } |
1743 break; | |
1744 | |
1745 case g1_post_barrier_slow_id: | |
1746 { | |
1747 StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments); | |
1748 | |
1749 | |
1750 // arg0: store_address | |
1751 Address store_addr(rbp, 2*BytesPerWord); | |
1752 | |
1753 BarrierSet* bs = Universe::heap()->barrier_set(); | |
1754 CardTableModRefBS* ct = (CardTableModRefBS*)bs; | |
1755 Label done; | |
1756 Label runtime; | |
1757 | |
1758 // At this point we know new_value is non-NULL and the new_value crosses regsion. | |
1759 // Must check to see if card is already dirty | |
1760 | |
362 | 1761 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); |
342 | 1762 |
1763 Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + | |
1764 PtrQueue::byte_offset_of_index())); | |
1765 Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + | |
1766 PtrQueue::byte_offset_of_buf())); | |
1767 | |
362 | 1768 __ push(rax); |
1769 __ push(rdx); | |
342 | 1770 |
362 | 1771 NOT_LP64(__ get_thread(thread);) |
1772 ExternalAddress cardtable((address)ct->byte_map_base); | |
342 | 1773 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); |
1774 | |
362 | 1775 const Register card_addr = rdx; |
1776 #ifdef _LP64 | |
1777 const Register tmp = rscratch1; | |
1778 f.load_argument(0, card_addr); | |
1779 __ shrq(card_addr, CardTableModRefBS::card_shift); | |
1780 __ lea(tmp, cardtable); | |
1781 // get the address of the card | |
1782 __ addq(card_addr, tmp); | |
1783 #else | |
1784 const Register card_index = rdx; | |
1785 f.load_argument(0, card_index); | |
1786 __ shrl(card_index, CardTableModRefBS::card_shift); | |
1787 | |
342 | 1788 Address index(noreg, card_index, Address::times_1); |
1789 __ leal(card_addr, __ as_Address(ArrayAddress(cardtable, index))); | |
362 | 1790 #endif |
1791 | |
342 | 1792 __ cmpb(Address(card_addr, 0), 0); |
1793 __ jcc(Assembler::equal, done); | |
1794 | |
1795 // storing region crossing non-NULL, card is clean. | |
1796 // dirty card and log. | |
1797 | |
1798 __ movb(Address(card_addr, 0), 0); | |
1799 | |
1800 __ cmpl(queue_index, 0); | |
1801 __ jcc(Assembler::equal, runtime); | |
1802 __ subl(queue_index, wordSize); | |
1803 | |
1804 const Register buffer_addr = rbx; | |
362 | 1805 __ push(rbx); |
1806 | |
1807 __ movptr(buffer_addr, buffer); | |
342 | 1808 |
362 | 1809 #ifdef _LP64 |
1810 __ movslq(rscratch1, queue_index); | |
1811 __ addptr(buffer_addr, rscratch1); | |
1812 #else | |
1813 __ addptr(buffer_addr, queue_index); | |
1814 #endif | |
1815 __ movptr(Address(buffer_addr, 0), card_addr); | |
1816 | |
1817 __ pop(rbx); | |
342 | 1818 __ jmp(done); |
1819 | |
1820 __ bind(runtime); | |
362 | 1821 NOT_LP64(__ push(rcx);) |
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1822 //__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); |
362 | 1823 NOT_LP64(__ pop(rcx);) |
342 | 1824 |
1825 __ bind(done); | |
362 | 1826 __ pop(rdx); |
1827 __ pop(rax); | |
342 | 1828 |
1829 } | |
1830 break; | |
1831 #endif // !SERIALGC | |
1832 | |
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1833 case c1x_unwind_exception_call_id: |
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1834 { |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1835 // remove the frame from the stack |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1836 __ movptr(rsp, rbp); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1837 __ pop(rbp); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1838 // exception_oop is passed using ordinary java calling conventions |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1839 __ movptr(rax, j_rarg0); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1840 |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1841 Label nonNullExceptionOop; |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1842 __ testptr(rax, rax); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1843 __ jcc(Assembler::notZero, nonNullExceptionOop); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1844 { |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1845 __ enter(); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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|
1846 oop_maps = new OopMapSet(); |
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1847 OopMap* oop_map = save_live_registers(sasm, 0); |
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1848 int call_offset = __ call_RT(rax, noreg, (address)c1x_create_null_exception, 0); |
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1849 oop_maps->add_gc_map(call_offset, oop_map); |
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1850 __ leave(); |
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1851 } |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1852 __ bind(nonNullExceptionOop); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1853 |
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1854 __ set_info("unwind_exception", dont_gc_arguments); |
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1855 // note: no stubframe since we are about to leave the current |
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1856 // activation and we are calling a leaf VM function only. |
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1857 generate_unwind_exception(sasm); |
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1858 __ should_not_reach_here(); |
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1859 } |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1860 break; |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1861 |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1862 case c1x_handle_exception_id: |
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1863 { StubFrame f(sasm, "c1x_handle_exception", dont_gc_arguments); |
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1864 oop_maps = new OopMapSet(); |
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1865 OopMap* oop_map = save_live_registers(sasm, 1, false); |
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1866 c1x_generate_handle_exception(sasm, oop_maps, oop_map); |
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1867 } |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1868 break; |
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1869 |
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1870 case c1x_global_implicit_null_id: |
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1871 { |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1872 __ push(rax); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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|
1873 __ push(rax); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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|
1874 // move saved fp to make space for the inserted return address |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1875 __ get_thread(rax); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1876 __ movptr(rax, Address(rax, JavaThread::saved_exception_pc_offset())); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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|
1877 __ movptr(Address(rsp, HeapWordSize), rax); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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|
1878 __ pop(rax); |
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|
1879 |
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1880 { StubFrame f(sasm, "c1x_global_implicit_null_id", dont_gc_arguments); |
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1881 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false); |
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1882 } |
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|
1883 } |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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|
1884 break; |
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|
1885 |
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|
1886 case c1x_throw_div0_exception_id: |
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|
1887 { |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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|
1888 __ push(rax); |
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|
1889 __ push(rax); |
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|
1890 // move saved fp to make space for the inserted return address |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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|
1891 __ get_thread(rax); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1892 __ movptr(rax, Address(rax, JavaThread::saved_exception_pc_offset())); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1893 __ movptr(Address(rsp, HeapWordSize), rax); |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1894 __ pop(rax); |
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1895 |
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|
1896 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments); |
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1897 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false); |
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1898 } |
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1899 } |
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1900 break; |
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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1901 |
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1902 case c1x_slow_subtype_check_id: |
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1903 { |
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1904 Label success; |
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1905 Label miss; |
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1906 |
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1907 // TODO this should really be within the XirSnippets |
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1908 __ check_klass_subtype_fast_path(j_rarg0, j_rarg1, j_rarg2, &success, &miss, NULL); |
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1909 __ check_klass_subtype_slow_path(j_rarg0, j_rarg1, j_rarg2, j_rarg3, NULL, &miss); |
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1910 |
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1911 // fallthrough on success: |
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1912 __ bind(success); |
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1913 __ movptr(rax, 1); |
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1914 __ ret(0); |
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1915 |
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1916 __ bind(miss); |
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1917 __ movptr(rax, NULL_WORD); |
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1918 __ ret(0); |
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1919 } |
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1920 break; |
0 | 1921 default: |
1922 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments); | |
304 | 1923 __ movptr(rax, (int)id); |
0 | 1924 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); |
1925 __ should_not_reach_here(); | |
1926 } | |
1927 break; | |
1928 } | |
1929 return oop_maps; | |
1930 } | |
1931 | |
1932 #undef __ |