Mercurial > hg > truffle
annotate src/os_cpu/linux_sparc/vm/linux_sparc.s @ 4837:eff609af17d7
7127706: G1: re-enable survivors during the initial-mark pause
Summary: Re-enable survivors during the initial-mark pause. Afterwards, the concurrent marking threads have to scan them and mark everything reachable from them. The next GC will have to wait for the survivors to be scanned.
Reviewed-by: brutisso, johnc
| author | tonyp |
|---|---|
| date | Wed, 25 Jan 2012 12:58:23 -0500 |
| parents | c18cbe5936b8 |
| children | 980532a806a5 |
| rev | line source |
|---|---|
| 133 | 1 # |
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2 # Copyright (c) 2005, 2008, Oracle and/or its affiliates. All rights reserved. |
| 133 | 3 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 # | |
| 5 # This code is free software; you can redistribute it and/or modify it | |
| 6 # under the terms of the GNU General Public License version 2 only, as | |
| 7 # published by the Free Software Foundation. | |
| 8 # | |
| 9 # This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 # version 2 for more details (a copy is included in the LICENSE file that | |
| 13 # accompanied this code). | |
| 14 # | |
| 15 # You should have received a copy of the GNU General Public License version | |
| 16 # 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 # Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 # | |
|
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19 # Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 # or visit www.oracle.com if you need additional information or have any |
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21 # questions. |
| 133 | 22 # |
| 23 | |
| 24 # Prototype: int SafeFetch32 (int * adr, int ErrValue) | |
| 25 # The "ld" at Fetch32 is potentially faulting instruction. | |
| 26 # If the instruction traps the trap handler will arrange | |
| 27 # for control to resume at Fetch32Resume. | |
| 28 # By convention with the trap handler we ensure there is a non-CTI | |
| 29 # instruction in the trap shadow. | |
| 30 | |
| 31 | |
| 32 .globl SafeFetch32, Fetch32PFI, Fetch32Resume | |
| 33 .globl SafeFetchN | |
| 34 .align 32 | |
| 35 .type SafeFetch32,@function | |
| 36 SafeFetch32: | |
| 37 mov %o0, %g1 | |
| 38 mov %o1, %o0 | |
| 39 Fetch32PFI: | |
| 40 # <-- Potentially faulting instruction | |
| 41 ld [%g1], %o0 | |
| 42 Fetch32Resume: | |
| 43 nop | |
| 44 retl | |
| 45 nop | |
| 46 | |
| 47 .globl SafeFetchN, FetchNPFI, FetchNResume | |
| 48 .type SafeFetchN,@function | |
| 49 .align 32 | |
| 50 SafeFetchN: | |
| 51 mov %o0, %g1 | |
| 52 mov %o1, %o0 | |
| 53 FetchNPFI: | |
| 54 ldn [%g1], %o0 | |
| 55 FetchNResume: | |
| 56 nop | |
| 57 retl | |
| 58 nop | |
| 59 | |
| 60 # Possibilities: | |
| 61 # -- membar | |
| 62 # -- CAS (SP + BIAS, G0, G0) | |
| 63 # -- wr %g0, %asi | |
| 64 | |
| 65 .globl SpinPause | |
| 66 .type SpinPause,@function | |
| 67 .align 32 | |
| 68 SpinPause: | |
| 69 retl | |
| 70 mov %g0, %o0 | |
| 71 | |
| 72 .globl _Copy_conjoint_jlongs_atomic | |
| 73 .type _Copy_conjoint_jlongs_atomic,@function | |
| 74 _Copy_conjoint_jlongs_atomic: | |
| 75 cmp %o0, %o1 | |
| 76 bleu 4f | |
| 77 sll %o2, 3, %o4 | |
| 78 ba 2f | |
| 79 1: | |
| 80 subcc %o4, 8, %o4 | |
| 81 std %o2, [%o1] | |
| 82 add %o0, 8, %o0 | |
| 83 add %o1, 8, %o1 | |
| 84 2: | |
| 85 bge,a 1b | |
| 86 ldd [%o0], %o2 | |
| 87 ba 5f | |
| 88 nop | |
| 89 3: | |
| 90 std %o2, [%o1+%o4] | |
| 91 4: | |
| 92 subcc %o4, 8, %o4 | |
| 93 bge,a 3b | |
| 94 ldd [%o0+%o4], %o2 | |
| 95 5: | |
| 96 retl | |
| 97 nop | |
| 98 | |
| 99 | |
| 100 .globl _flush_reg_windows | |
| 101 .align 32 | |
| 102 _flush_reg_windows: | |
| 103 ta 0x03 | |
| 104 retl | |
| 105 mov %fp, %o0 |