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annotate src/os_cpu/aix_ppc/vm/prefetch_aix_ppc.inline.hpp @ 21222:f226f63af996

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Add SSAVerifier.
author Josef Eisl <josef.eisl@jku.at>
date Mon, 20 Apr 2015 18:05:27 +0200
parents c5e86c5cd22e
children
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1 /*
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
666e6ce3976c 8023038: PPC64 (part 15): Platform files for AIX/PPC64 support
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3 * Copyright 2012, 2013 SAP AG. All rights reserved.
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4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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5 *
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6 * This code is free software; you can redistribute it and/or modify it
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7 * under the terms of the GNU General Public License version 2 only, as
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8 * published by the Free Software Foundation.
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9 *
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10 * This code is distributed in the hope that it will be useful, but WITHOUT
666e6ce3976c 8023038: PPC64 (part 15): Platform files for AIX/PPC64 support
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11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
666e6ce3976c 8023038: PPC64 (part 15): Platform files for AIX/PPC64 support
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12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
666e6ce3976c 8023038: PPC64 (part 15): Platform files for AIX/PPC64 support
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13 * version 2 for more details (a copy is included in the LICENSE file that
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14 * accompanied this code).
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15 *
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16 * You should have received a copy of the GNU General Public License version
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17 * 2 along with this work; if not, write to the Free Software Foundation,
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18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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19 *
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20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
666e6ce3976c 8023038: PPC64 (part 15): Platform files for AIX/PPC64 support
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21 * or visit www.oracle.com if you need additional information or have any
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22 * questions.
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23 *
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24 */
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25
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26 #ifndef OS_CPU_AIX_PPC_VM_PREFETCH_AIX_PPC_INLINE_HPP
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27 #define OS_CPU_AIX_PPC_VM_PREFETCH_AIX_PPC_INLINE_HPP
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28
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29 #include "runtime/prefetch.hpp"
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30
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31
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32 inline void Prefetch::read(void *loc, intx interval) {
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33 #if !defined(USE_XLC_BUILTINS)
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34 __asm__ __volatile__ (
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35 " dcbt 0, %0 \n"
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36 :
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37 : /*%0*/"r" ( ((address)loc) +((long)interval) )
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38 //:
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39 );
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40 #else
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41 __dcbt(((address)loc) +((long)interval));
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42 #endif
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43 }
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44
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45 inline void Prefetch::write(void *loc, intx interval) {
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46 #if !defined(USE_XLC_PREFETCH_WRITE_BUILTIN)
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47 __asm__ __volatile__ (
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48 " dcbtst 0, %0 \n"
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49 :
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50 : /*%0*/"r" ( ((address)loc) +((long)interval) )
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51 //:
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52 );
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53 #else
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54 __dcbtst( ((address)loc) +((long)interval) );
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55 #endif
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56 }
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57
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58 #endif // OS_CPU_AIX_PPC_VM_PREFETCH_AIX_PPC_INLINE_HPP