Mercurial > hg > truffle
annotate src/share/vm/code/vmreg.hpp @ 21205:f34ae5c01864
include reexecute, rethrow_exception and return_oop info when disassembling debug scopes
| author | Doug Simon <doug.simon@oracle.com> |
|---|---|
| date | Mon, 04 May 2015 10:39:12 +0200 |
| parents | 52b4284cb496 |
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| rev | line source |
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| 0 | 1 /* |
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2 * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #ifndef SHARE_VM_CODE_VMREG_HPP |
| 26 #define SHARE_VM_CODE_VMREG_HPP | |
| 27 | |
| 28 #include "memory/allocation.hpp" | |
| 29 #include "utilities/globalDefinitions.hpp" | |
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30 #include "asm/register.hpp" |
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31 |
| 1972 | 32 #ifdef COMPILER2 |
| 33 #include "opto/adlcVMDeps.hpp" | |
| 34 #include "utilities/ostream.hpp" | |
| 35 #ifdef TARGET_ARCH_MODEL_x86_32 | |
| 36 # include "adfiles/adGlobals_x86_32.hpp" | |
| 37 #endif | |
| 38 #ifdef TARGET_ARCH_MODEL_x86_64 | |
| 39 # include "adfiles/adGlobals_x86_64.hpp" | |
| 40 #endif | |
| 41 #ifdef TARGET_ARCH_MODEL_sparc | |
| 42 # include "adfiles/adGlobals_sparc.hpp" | |
| 43 #endif | |
| 44 #ifdef TARGET_ARCH_MODEL_zero | |
| 45 # include "adfiles/adGlobals_zero.hpp" | |
| 46 #endif | |
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47 #ifdef TARGET_ARCH_MODEL_arm |
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48 # include "adfiles/adGlobals_arm.hpp" |
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49 #endif |
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50 #ifdef TARGET_ARCH_MODEL_ppc_32 |
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51 # include "adfiles/adGlobals_ppc_32.hpp" |
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52 #endif |
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53 #ifdef TARGET_ARCH_MODEL_ppc_64 |
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54 # include "adfiles/adGlobals_ppc_64.hpp" |
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55 #endif |
| 1972 | 56 #endif |
| 57 | |
| 0 | 58 //------------------------------VMReg------------------------------------------ |
| 59 // The VM uses 'unwarped' stack slots; the compiler uses 'warped' stack slots. | |
| 60 // Register numbers below VMRegImpl::stack0 are the same for both. Register | |
| 61 // numbers above stack0 are either warped (in the compiler) or unwarped | |
| 62 // (in the VM). Unwarped numbers represent stack indices, offsets from | |
| 63 // the current stack pointer. Warped numbers are required during compilation | |
| 64 // when we do not yet know how big the frame will be. | |
| 65 | |
| 66 class VMRegImpl; | |
| 67 typedef VMRegImpl* VMReg; | |
| 68 | |
| 69 class VMRegImpl { | |
| 70 // friend class OopMap; | |
| 71 friend class VMStructs; | |
| 72 friend class OptoReg; | |
| 73 // friend class Location; | |
| 74 private: | |
| 75 enum { | |
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76 BAD_REG = -1 |
| 0 | 77 }; |
| 78 | |
| 79 | |
| 80 | |
| 81 static VMReg stack0; | |
| 82 // Names for registers | |
| 83 static const char *regName[]; | |
| 84 static const int register_count; | |
| 85 | |
| 86 | |
| 87 public: | |
| 88 | |
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89 static VMReg as_VMReg(int val, bool bad_ok = false) { assert(val > BAD_REG || bad_ok, "invalid"); return (VMReg) (intptr_t) val; } |
| 0 | 90 |
| 91 const char* name() { | |
| 92 if (is_reg()) { | |
| 93 return regName[value()]; | |
| 94 } else if (!is_valid()) { | |
| 95 return "BAD"; | |
| 96 } else { | |
| 97 // shouldn't really be called with stack | |
| 98 return "STACKED REG"; | |
| 99 } | |
| 100 } | |
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101 static VMReg Bad() { return (VMReg) (intptr_t) BAD_REG; } |
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102 bool is_valid() const { return ((intptr_t) this) != BAD_REG; } |
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103 bool is_stack() const { return (intptr_t) this >= (intptr_t) stack0; } |
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104 bool is_reg() const { return is_valid() && !is_stack(); } |
| 0 | 105 |
| 106 // A concrete register is a value that returns true for is_reg() and is | |
| 107 // also a register you could use in the assembler. On machines with | |
| 108 // 64bit registers only one half of the VMReg (and OptoReg) is considered | |
| 109 // concrete. | |
| 110 bool is_concrete(); | |
| 111 | |
| 112 // VMRegs are 4 bytes wide on all platforms | |
| 113 static const int stack_slot_size; | |
| 114 static const int slots_per_word; | |
| 115 | |
| 116 | |
| 117 // This really ought to check that the register is "real" in the sense that | |
| 118 // we don't try and get the VMReg number of a physical register that doesn't | |
| 119 // have an expressible part. That would be pd specific code | |
| 120 VMReg next() { | |
| 121 assert((is_reg() && value() < stack0->value() - 1) || is_stack(), "must be"); | |
| 122 return (VMReg)(intptr_t)(value() + 1); | |
| 123 } | |
| 6225 | 124 VMReg next(int i) { |
| 125 assert((is_reg() && value() < stack0->value() - i) || is_stack(), "must be"); | |
| 126 return (VMReg)(intptr_t)(value() + i); | |
| 127 } | |
| 0 | 128 VMReg prev() { |
| 129 assert((is_stack() && value() > stack0->value()) || (is_reg() && value() != 0), "must be"); | |
| 130 return (VMReg)(intptr_t)(value() - 1); | |
| 131 } | |
| 132 | |
| 133 | |
| 134 intptr_t value() const {return (intptr_t) this; } | |
| 135 | |
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136 void print_on(outputStream* st) const; |
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137 void print() const { print_on(tty); } |
| 0 | 138 |
| 139 // bias a stack slot. | |
| 140 // Typically used to adjust a virtual frame slots by amounts that are offset by | |
| 141 // amounts that are part of the native abi. The VMReg must be a stack slot | |
| 142 // and the result must be also. | |
| 143 | |
| 144 VMReg bias(int offset) { | |
| 145 assert(is_stack(), "must be"); | |
| 146 // VMReg res = VMRegImpl::as_VMReg(value() + offset); | |
| 147 VMReg res = stack2reg(reg2stack() + offset); | |
| 148 assert(res->is_stack(), "must be"); | |
| 149 return res; | |
| 150 } | |
| 151 | |
| 152 // Convert register numbers to stack slots and vice versa | |
| 153 static VMReg stack2reg( int idx ) { | |
| 154 return (VMReg) (intptr_t) (stack0->value() + idx); | |
| 155 } | |
| 156 | |
| 157 uintptr_t reg2stack() { | |
| 158 assert( is_stack(), "Not a stack-based register" ); | |
| 159 return value() - stack0->value(); | |
| 160 } | |
| 161 | |
| 162 static void set_regName(); | |
| 163 | |
| 1972 | 164 #ifdef TARGET_ARCH_x86 |
| 165 # include "vmreg_x86.hpp" | |
| 166 #endif | |
| 167 #ifdef TARGET_ARCH_sparc | |
| 168 # include "vmreg_sparc.hpp" | |
| 169 #endif | |
| 170 #ifdef TARGET_ARCH_zero | |
| 171 # include "vmreg_zero.hpp" | |
| 172 #endif | |
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173 #ifdef TARGET_ARCH_arm |
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174 # include "vmreg_arm.hpp" |
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175 #endif |
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176 #ifdef TARGET_ARCH_ppc |
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177 # include "vmreg_ppc.hpp" |
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178 #endif |
| 1972 | 179 |
| 0 | 180 |
| 181 }; | |
| 182 | |
| 183 //---------------------------VMRegPair------------------------------------------- | |
| 184 // Pairs of 32-bit registers for arguments. | |
| 185 // SharedRuntime::java_calling_convention will overwrite the structs with | |
| 186 // the calling convention's registers. VMRegImpl::Bad is returned for any | |
| 187 // unused 32-bit register. This happens for the unused high half of Int | |
| 188 // arguments, or for 32-bit pointers or for longs in the 32-bit sparc build | |
| 189 // (which are passed to natives in low 32-bits of e.g. O0/O1 and the high | |
| 190 // 32-bits of O0/O1 are set to VMRegImpl::Bad). Longs in one register & doubles | |
| 191 // always return a high and a low register, as do 64-bit pointers. | |
| 192 // | |
| 193 class VMRegPair { | |
| 194 private: | |
| 195 VMReg _second; | |
| 196 VMReg _first; | |
| 197 public: | |
| 198 void set_bad ( ) { _second=VMRegImpl::Bad(); _first=VMRegImpl::Bad(); } | |
| 199 void set1 ( VMReg v ) { _second=VMRegImpl::Bad(); _first=v; } | |
| 200 void set2 ( VMReg v ) { _second=v->next(); _first=v; } | |
| 201 void set_pair( VMReg second, VMReg first ) { _second= second; _first= first; } | |
| 202 void set_ptr ( VMReg ptr ) { | |
| 203 #ifdef _LP64 | |
| 204 _second = ptr->next(); | |
| 205 #else | |
| 206 _second = VMRegImpl::Bad(); | |
| 207 #endif | |
| 208 _first = ptr; | |
| 209 } | |
| 210 // Return true if single register, even if the pair is really just adjacent stack slots | |
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211 bool is_single_reg() const { |
| 0 | 212 return (_first->is_valid()) && (_first->value() + 1 == _second->value()); |
| 213 } | |
| 214 | |
| 215 // Return true if single stack based "register" where the slot alignment matches input alignment | |
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216 bool is_adjacent_on_stack(int alignment) const { |
| 0 | 217 return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0)); |
| 218 } | |
| 219 | |
| 220 // Return true if single stack based "register" where the slot alignment matches input alignment | |
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221 bool is_adjacent_aligned_on_stack(int alignment) const { |
| 0 | 222 return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0)); |
| 223 } | |
| 224 | |
| 225 // Return true if single register but adjacent stack slots do not count | |
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226 bool is_single_phys_reg() const { |
| 0 | 227 return (_first->is_reg() && (_first->value() + 1 == _second->value())); |
| 228 } | |
| 229 | |
| 230 VMReg second() const { return _second; } | |
| 231 VMReg first() const { return _first; } | |
| 232 VMRegPair(VMReg s, VMReg f) { _second = s; _first = f; } | |
| 233 VMRegPair(VMReg f) { _second = VMRegImpl::Bad(); _first = f; } | |
| 234 VMRegPair() { _second = VMRegImpl::Bad(); _first = VMRegImpl::Bad(); } | |
| 235 }; | |
| 1972 | 236 |
| 237 #endif // SHARE_VM_CODE_VMREG_HPP |