Mercurial > hg > truffle
annotate src/cpu/x86/vm/assembler_x86.inline.hpp @ 1917:f42a2f0c16bb
6996563: 6984311 changes forgot to update vmStructs.cpp for new field _operands
Summary: Add missing line to vmStructs. Also fix bug with class dumper.
Reviewed-by: twisti, kvn
author | jrose |
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date | Fri, 05 Nov 2010 12:18:30 -0700 |
parents | c18cbe5936b8 |
children | f95d63e2154a |
rev | line source |
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0 | 1 /* |
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6941466: Oracle rebranding changes for Hotspot repositories
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
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20 * or visit www.oracle.com if you need additional information or have any |
c18cbe5936b8
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
25 inline void MacroAssembler::pd_patch_instruction(address branch, address target) { | |
26 unsigned char op = branch[0]; | |
27 assert(op == 0xE8 /* call */ || | |
28 op == 0xE9 /* jmp */ || | |
29 op == 0xEB /* short jmp */ || | |
30 (op & 0xF0) == 0x70 /* short jcc */ || | |
31 op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */, | |
32 "Invalid opcode at patch point"); | |
33 | |
34 if (op == 0xEB || (op & 0xF0) == 0x70) { | |
35 // short offset operators (jmp and jcc) | |
36 char* disp = (char*) &branch[1]; | |
37 int imm8 = target - (address) &disp[1]; | |
38 guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset"); | |
39 *disp = imm8; | |
40 } else { | |
41 int* disp = (int*) &branch[(op == 0x0F)? 2: 1]; | |
42 int imm32 = target - (address) &disp[1]; | |
43 *disp = imm32; | |
44 } | |
45 } | |
46 | |
47 #ifndef PRODUCT | |
48 inline void MacroAssembler::pd_print_patched_instruction(address branch) { | |
49 const char* s; | |
50 unsigned char op = branch[0]; | |
51 if (op == 0xE8) { | |
52 s = "call"; | |
53 } else if (op == 0xE9 || op == 0xEB) { | |
54 s = "jmp"; | |
55 } else if ((op & 0xF0) == 0x70) { | |
56 s = "jcc"; | |
57 } else if (op == 0x0F) { | |
58 s = "jcc"; | |
59 } else { | |
60 s = "????"; | |
61 } | |
62 tty->print("%s (unresolved)", s); | |
63 } | |
64 #endif // ndef PRODUCT | |
304 | 65 |
66 #ifndef _LP64 | |
67 inline int Assembler::prefix_and_encode(int reg_enc, bool byteinst) { return reg_enc; } | |
68 inline int Assembler::prefixq_and_encode(int reg_enc) { return reg_enc; } | |
69 | |
70 inline int Assembler::prefix_and_encode(int dst_enc, int src_enc, bool byteinst) { return dst_enc << 3 | src_enc; } | |
71 inline int Assembler::prefixq_and_encode(int dst_enc, int src_enc) { return dst_enc << 3 | src_enc; } | |
72 | |
73 inline void Assembler::prefix(Register reg) {} | |
74 inline void Assembler::prefix(Address adr) {} | |
75 inline void Assembler::prefixq(Address adr) {} | |
76 | |
77 inline void Assembler::prefix(Address adr, Register reg, bool byteinst) {} | |
78 inline void Assembler::prefixq(Address adr, Register reg) {} | |
79 | |
80 inline void Assembler::prefix(Address adr, XMMRegister reg) {} | |
81 #else | |
82 inline void Assembler::emit_long64(jlong x) { | |
83 *(jlong*) _code_pos = x; | |
84 _code_pos += sizeof(jlong); | |
85 code_section()->set_end(_code_pos); | |
86 } | |
87 #endif // _LP64 |