Mercurial > hg > truffle
annotate src/share/vm/adlc/output_c.cpp @ 11722:ff05c78a7f64
use time passed to decide what methods to compile or inline
author | Christian Wirth <christian.wirth@oracle.com> |
---|---|
date | Thu, 19 Sep 2013 10:36:56 +0200 |
parents | f15fe46d8c00 |
children | 650868c062a9 |
rev | line source |
---|---|
0 | 1 /* |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2 * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
1552
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1541
diff
changeset
|
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1541
diff
changeset
|
20 * or visit www.oracle.com if you need additional information or have any |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1541
diff
changeset
|
21 * questions. |
0 | 22 * |
23 */ | |
24 | |
25 // output_c.cpp - Class CPP file output routines for architecture definition | |
26 | |
27 #include "adlc.hpp" | |
28 | |
29 // Utilities to characterize effect statements | |
30 static bool is_def(int usedef) { | |
31 switch(usedef) { | |
32 case Component::DEF: | |
33 case Component::USE_DEF: return true; break; | |
34 } | |
35 return false; | |
36 } | |
37 | |
38 static bool is_use(int usedef) { | |
39 switch(usedef) { | |
40 case Component::USE: | |
41 case Component::USE_DEF: | |
42 case Component::USE_KILL: return true; break; | |
43 } | |
44 return false; | |
45 } | |
46 | |
47 static bool is_kill(int usedef) { | |
48 switch(usedef) { | |
49 case Component::KILL: | |
50 case Component::USE_KILL: return true; break; | |
51 } | |
52 return false; | |
53 } | |
54 | |
55 // Define an array containing the machine register names, strings. | |
56 static void defineRegNames(FILE *fp, RegisterForm *registers) { | |
57 if (registers) { | |
58 fprintf(fp,"\n"); | |
59 fprintf(fp,"// An array of character pointers to machine register names.\n"); | |
60 fprintf(fp,"const char *Matcher::regName[REG_COUNT] = {\n"); | |
61 | |
62 // Output the register name for each register in the allocation classes | |
63 RegDef *reg_def = NULL; | |
64 RegDef *next = NULL; | |
65 registers->reset_RegDefs(); | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
66 for (reg_def = registers->iter_RegDefs(); reg_def != NULL; reg_def = next) { |
0 | 67 next = registers->iter_RegDefs(); |
68 const char *comma = (next != NULL) ? "," : " // no trailing comma"; | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
69 fprintf(fp," \"%s\"%s\n", reg_def->_regname, comma); |
0 | 70 } |
71 | |
72 // Finish defining enumeration | |
73 fprintf(fp,"};\n"); | |
74 | |
75 fprintf(fp,"\n"); | |
76 fprintf(fp,"// An array of character pointers to machine register names.\n"); | |
77 fprintf(fp,"const VMReg OptoReg::opto2vm[REG_COUNT] = {\n"); | |
78 reg_def = NULL; | |
79 next = NULL; | |
80 registers->reset_RegDefs(); | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
81 for (reg_def = registers->iter_RegDefs(); reg_def != NULL; reg_def = next) { |
0 | 82 next = registers->iter_RegDefs(); |
83 const char *comma = (next != NULL) ? "," : " // no trailing comma"; | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
84 fprintf(fp,"\t%s%s\n", reg_def->_concrete, comma); |
0 | 85 } |
86 // Finish defining array | |
87 fprintf(fp,"\t};\n"); | |
88 fprintf(fp,"\n"); | |
89 | |
90 fprintf(fp," OptoReg::Name OptoReg::vm2opto[ConcreteRegisterImpl::number_of_registers];\n"); | |
91 | |
92 } | |
93 } | |
94 | |
95 // Define an array containing the machine register encoding values | |
96 static void defineRegEncodes(FILE *fp, RegisterForm *registers) { | |
97 if (registers) { | |
98 fprintf(fp,"\n"); | |
99 fprintf(fp,"// An array of the machine register encode values\n"); | |
100 fprintf(fp,"const unsigned char Matcher::_regEncode[REG_COUNT] = {\n"); | |
101 | |
102 // Output the register encoding for each register in the allocation classes | |
103 RegDef *reg_def = NULL; | |
104 RegDef *next = NULL; | |
105 registers->reset_RegDefs(); | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
106 for (reg_def = registers->iter_RegDefs(); reg_def != NULL; reg_def = next) { |
0 | 107 next = registers->iter_RegDefs(); |
108 const char* register_encode = reg_def->register_encode(); | |
109 const char *comma = (next != NULL) ? "," : " // no trailing comma"; | |
110 int encval; | |
111 if (!ADLParser::is_int_token(register_encode, encval)) { | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
112 fprintf(fp," %s%s // %s\n", register_encode, comma, reg_def->_regname); |
0 | 113 } else { |
114 // Output known constants in hex char format (backward compatibility). | |
115 assert(encval < 256, "Exceeded supported width for register encoding"); | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
116 fprintf(fp," (unsigned char)'\\x%X'%s // %s\n", encval, comma, reg_def->_regname); |
0 | 117 } |
118 } | |
119 // Finish defining enumeration | |
120 fprintf(fp,"};\n"); | |
121 | |
122 } // Done defining array | |
123 } | |
124 | |
125 // Output an enumeration of register class names | |
126 static void defineRegClassEnum(FILE *fp, RegisterForm *registers) { | |
127 if (registers) { | |
128 // Output an enumeration of register class names | |
129 fprintf(fp,"\n"); | |
130 fprintf(fp,"// Enumeration of register class names\n"); | |
131 fprintf(fp, "enum machRegisterClass {\n"); | |
132 registers->_rclasses.reset(); | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
133 for (const char *class_name = NULL; (class_name = registers->_rclasses.iter()) != NULL;) { |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
134 const char * class_name_to_upper = toUpper(class_name); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
135 fprintf(fp," %s,\n", class_name_to_upper); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
136 delete[] class_name_to_upper; |
0 | 137 } |
138 // Finish defining enumeration | |
139 fprintf(fp, " _last_Mach_Reg_Class\n"); | |
140 fprintf(fp, "};\n"); | |
141 } | |
142 } | |
143 | |
144 // Declare an enumeration of user-defined register classes | |
145 // and a list of register masks, one for each class. | |
146 void ArchDesc::declare_register_masks(FILE *fp_hpp) { | |
147 const char *rc_name; | |
148 | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
149 if (_register) { |
0 | 150 // Build enumeration of user-defined register classes. |
151 defineRegClassEnum(fp_hpp, _register); | |
152 | |
153 // Generate a list of register masks, one for each class. | |
154 fprintf(fp_hpp,"\n"); | |
155 fprintf(fp_hpp,"// Register masks, one for each register class.\n"); | |
156 _register->_rclasses.reset(); | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
157 for (rc_name = NULL; (rc_name = _register->_rclasses.iter()) != NULL;) { |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
158 const char *prefix = ""; |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
159 RegClass *reg_class = _register->getRegClass(rc_name); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
160 assert(reg_class, "Using an undefined register class"); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
161 |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
162 const char* rc_name_to_upper = toUpper(rc_name); |
0 | 163 |
4121
db2e64ca2d5a
7090968: Allow adlc register class to depend on runtime conditions
roland
parents:
4114
diff
changeset
|
164 if (reg_class->_user_defined == NULL) { |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
165 fprintf(fp_hpp, "extern const RegMask _%s%s_mask;\n", prefix, rc_name_to_upper); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
166 fprintf(fp_hpp, "inline const RegMask &%s%s_mask() { return _%s%s_mask; }\n", prefix, rc_name_to_upper, prefix, rc_name_to_upper); |
4121
db2e64ca2d5a
7090968: Allow adlc register class to depend on runtime conditions
roland
parents:
4114
diff
changeset
|
167 } else { |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
168 fprintf(fp_hpp, "inline const RegMask &%s%s_mask() { %s }\n", prefix, rc_name_to_upper, reg_class->_user_defined); |
4121
db2e64ca2d5a
7090968: Allow adlc register class to depend on runtime conditions
roland
parents:
4114
diff
changeset
|
169 } |
0 | 170 |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
171 if (reg_class->_stack_or_reg) { |
4121
db2e64ca2d5a
7090968: Allow adlc register class to depend on runtime conditions
roland
parents:
4114
diff
changeset
|
172 assert(reg_class->_user_defined == NULL, "no user defined reg class here"); |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
173 fprintf(fp_hpp, "extern const RegMask _%sSTACK_OR_%s_mask;\n", prefix, rc_name_to_upper); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
174 fprintf(fp_hpp, "inline const RegMask &%sSTACK_OR_%s_mask() { return _%sSTACK_OR_%s_mask; }\n", prefix, rc_name_to_upper, prefix, rc_name_to_upper); |
0 | 175 } |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
176 delete[] rc_name_to_upper; |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
177 |
0 | 178 } |
179 } | |
180 } | |
181 | |
182 // Generate an enumeration of user-defined register classes | |
183 // and a list of register masks, one for each class. | |
184 void ArchDesc::build_register_masks(FILE *fp_cpp) { | |
185 const char *rc_name; | |
186 | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
187 if (_register) { |
0 | 188 // Generate a list of register masks, one for each class. |
189 fprintf(fp_cpp,"\n"); | |
190 fprintf(fp_cpp,"// Register masks, one for each register class.\n"); | |
191 _register->_rclasses.reset(); | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
192 for (rc_name = NULL; (rc_name = _register->_rclasses.iter()) != NULL;) { |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
193 const char *prefix = ""; |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
194 RegClass *reg_class = _register->getRegClass(rc_name); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
195 assert(reg_class, "Using an undefined register class"); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
196 |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
197 if (reg_class->_user_defined != NULL) { |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
198 continue; |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
199 } |
4121
db2e64ca2d5a
7090968: Allow adlc register class to depend on runtime conditions
roland
parents:
4114
diff
changeset
|
200 |
0 | 201 int len = RegisterForm::RegMask_Size(); |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
202 const char* rc_name_to_upper = toUpper(rc_name); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
203 fprintf(fp_cpp, "const RegMask _%s%s_mask(", prefix, rc_name_to_upper); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
204 |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
205 { |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
206 int i; |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
207 for(i = 0; i < len - 1; i++) { |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
208 fprintf(fp_cpp," 0x%x,", reg_class->regs_in_word(i, false)); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
209 } |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
210 fprintf(fp_cpp," 0x%x );\n", reg_class->regs_in_word(i, false)); |
0 | 211 } |
212 | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
213 if (reg_class->_stack_or_reg) { |
0 | 214 int i; |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
215 fprintf(fp_cpp, "const RegMask _%sSTACK_OR_%s_mask(", prefix, rc_name_to_upper); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
216 for(i = 0; i < len - 1; i++) { |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
217 fprintf(fp_cpp," 0x%x,",reg_class->regs_in_word(i, true)); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
218 } |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
219 fprintf(fp_cpp," 0x%x );\n",reg_class->regs_in_word(i, true)); |
0 | 220 } |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
221 delete[] rc_name_to_upper; |
0 | 222 } |
223 } | |
224 } | |
225 | |
226 // Compute an index for an array in the pipeline_reads_NNN arrays | |
227 static int pipeline_reads_initializer(FILE *fp_cpp, NameList &pipeline_reads, PipeClassForm *pipeclass) | |
228 { | |
229 int templen = 1; | |
230 int paramcount = 0; | |
231 const char *paramname; | |
232 | |
233 if (pipeclass->_parameters.count() == 0) | |
234 return -1; | |
235 | |
236 pipeclass->_parameters.reset(); | |
237 paramname = pipeclass->_parameters.iter(); | |
238 const PipeClassOperandForm *pipeopnd = | |
239 (const PipeClassOperandForm *)pipeclass->_localUsage[paramname]; | |
240 if (pipeopnd && !pipeopnd->isWrite() && strcmp(pipeopnd->_stage, "Universal")) | |
241 pipeclass->_parameters.reset(); | |
242 | |
243 while ( (paramname = pipeclass->_parameters.iter()) != NULL ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
244 const PipeClassOperandForm *tmppipeopnd = |
0 | 245 (const PipeClassOperandForm *)pipeclass->_localUsage[paramname]; |
246 | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
247 if (tmppipeopnd) |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
248 templen += 10 + (int)strlen(tmppipeopnd->_stage); |
0 | 249 else |
250 templen += 19; | |
251 | |
252 paramcount++; | |
253 } | |
254 | |
255 // See if the count is zero | |
256 if (paramcount == 0) { | |
257 return -1; | |
258 } | |
259 | |
260 char *operand_stages = new char [templen]; | |
261 operand_stages[0] = 0; | |
262 int i = 0; | |
263 templen = 0; | |
264 | |
265 pipeclass->_parameters.reset(); | |
266 paramname = pipeclass->_parameters.iter(); | |
267 pipeopnd = (const PipeClassOperandForm *)pipeclass->_localUsage[paramname]; | |
268 if (pipeopnd && !pipeopnd->isWrite() && strcmp(pipeopnd->_stage, "Universal")) | |
269 pipeclass->_parameters.reset(); | |
270 | |
271 while ( (paramname = pipeclass->_parameters.iter()) != NULL ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
272 const PipeClassOperandForm *tmppipeopnd = |
0 | 273 (const PipeClassOperandForm *)pipeclass->_localUsage[paramname]; |
274 templen += sprintf(&operand_stages[templen], " stage_%s%c\n", | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
275 tmppipeopnd ? tmppipeopnd->_stage : "undefined", |
0 | 276 (++i < paramcount ? ',' : ' ') ); |
277 } | |
278 | |
279 // See if the same string is in the table | |
280 int ndx = pipeline_reads.index(operand_stages); | |
281 | |
282 // No, add it to the table | |
283 if (ndx < 0) { | |
284 pipeline_reads.addName(operand_stages); | |
285 ndx = pipeline_reads.index(operand_stages); | |
286 | |
287 fprintf(fp_cpp, "static const enum machPipelineStages pipeline_reads_%03d[%d] = {\n%s};\n\n", | |
288 ndx+1, paramcount, operand_stages); | |
289 } | |
290 else | |
291 delete [] operand_stages; | |
292 | |
293 return (ndx); | |
294 } | |
295 | |
296 // Compute an index for an array in the pipeline_res_stages_NNN arrays | |
297 static int pipeline_res_stages_initializer( | |
298 FILE *fp_cpp, | |
299 PipelineForm *pipeline, | |
300 NameList &pipeline_res_stages, | |
301 PipeClassForm *pipeclass) | |
302 { | |
303 const PipeClassResourceForm *piperesource; | |
304 int * res_stages = new int [pipeline->_rescount]; | |
305 int i; | |
306 | |
307 for (i = 0; i < pipeline->_rescount; i++) | |
308 res_stages[i] = 0; | |
309 | |
310 for (pipeclass->_resUsage.reset(); | |
311 (piperesource = (const PipeClassResourceForm *)pipeclass->_resUsage.iter()) != NULL; ) { | |
312 int used_mask = pipeline->_resdict[piperesource->_resource]->is_resource()->mask(); | |
313 for (i = 0; i < pipeline->_rescount; i++) | |
314 if ((1 << i) & used_mask) { | |
315 int stage = pipeline->_stages.index(piperesource->_stage); | |
316 if (res_stages[i] < stage+1) | |
317 res_stages[i] = stage+1; | |
318 } | |
319 } | |
320 | |
321 // Compute the length needed for the resource list | |
322 int commentlen = 0; | |
323 int max_stage = 0; | |
324 for (i = 0; i < pipeline->_rescount; i++) { | |
325 if (res_stages[i] == 0) { | |
326 if (max_stage < 9) | |
327 max_stage = 9; | |
328 } | |
329 else { | |
330 int stagelen = (int)strlen(pipeline->_stages.name(res_stages[i]-1)); | |
331 if (max_stage < stagelen) | |
332 max_stage = stagelen; | |
333 } | |
334 | |
335 commentlen += (int)strlen(pipeline->_reslist.name(i)); | |
336 } | |
337 | |
338 int templen = 1 + commentlen + pipeline->_rescount * (max_stage + 14); | |
339 | |
340 // Allocate space for the resource list | |
341 char * resource_stages = new char [templen]; | |
342 | |
343 templen = 0; | |
344 for (i = 0; i < pipeline->_rescount; i++) { | |
345 const char * const resname = | |
346 res_stages[i] == 0 ? "undefined" : pipeline->_stages.name(res_stages[i]-1); | |
347 | |
348 templen += sprintf(&resource_stages[templen], " stage_%s%-*s // %s\n", | |
349 resname, max_stage - (int)strlen(resname) + 1, | |
350 (i < pipeline->_rescount-1) ? "," : "", | |
351 pipeline->_reslist.name(i)); | |
352 } | |
353 | |
354 // See if the same string is in the table | |
355 int ndx = pipeline_res_stages.index(resource_stages); | |
356 | |
357 // No, add it to the table | |
358 if (ndx < 0) { | |
359 pipeline_res_stages.addName(resource_stages); | |
360 ndx = pipeline_res_stages.index(resource_stages); | |
361 | |
362 fprintf(fp_cpp, "static const enum machPipelineStages pipeline_res_stages_%03d[%d] = {\n%s};\n\n", | |
363 ndx+1, pipeline->_rescount, resource_stages); | |
364 } | |
365 else | |
366 delete [] resource_stages; | |
367 | |
368 delete [] res_stages; | |
369 | |
370 return (ndx); | |
371 } | |
372 | |
373 // Compute an index for an array in the pipeline_res_cycles_NNN arrays | |
374 static int pipeline_res_cycles_initializer( | |
375 FILE *fp_cpp, | |
376 PipelineForm *pipeline, | |
377 NameList &pipeline_res_cycles, | |
378 PipeClassForm *pipeclass) | |
379 { | |
380 const PipeClassResourceForm *piperesource; | |
381 int * res_cycles = new int [pipeline->_rescount]; | |
382 int i; | |
383 | |
384 for (i = 0; i < pipeline->_rescount; i++) | |
385 res_cycles[i] = 0; | |
386 | |
387 for (pipeclass->_resUsage.reset(); | |
388 (piperesource = (const PipeClassResourceForm *)pipeclass->_resUsage.iter()) != NULL; ) { | |
389 int used_mask = pipeline->_resdict[piperesource->_resource]->is_resource()->mask(); | |
390 for (i = 0; i < pipeline->_rescount; i++) | |
391 if ((1 << i) & used_mask) { | |
392 int cycles = piperesource->_cycles; | |
393 if (res_cycles[i] < cycles) | |
394 res_cycles[i] = cycles; | |
395 } | |
396 } | |
397 | |
398 // Pre-compute the string length | |
399 int templen; | |
400 int cyclelen = 0, commentlen = 0; | |
401 int max_cycles = 0; | |
402 char temp[32]; | |
403 | |
404 for (i = 0; i < pipeline->_rescount; i++) { | |
405 if (max_cycles < res_cycles[i]) | |
406 max_cycles = res_cycles[i]; | |
407 templen = sprintf(temp, "%d", res_cycles[i]); | |
408 if (cyclelen < templen) | |
409 cyclelen = templen; | |
410 commentlen += (int)strlen(pipeline->_reslist.name(i)); | |
411 } | |
412 | |
413 templen = 1 + commentlen + (cyclelen + 8) * pipeline->_rescount; | |
414 | |
415 // Allocate space for the resource list | |
416 char * resource_cycles = new char [templen]; | |
417 | |
418 templen = 0; | |
419 | |
420 for (i = 0; i < pipeline->_rescount; i++) { | |
421 templen += sprintf(&resource_cycles[templen], " %*d%c // %s\n", | |
422 cyclelen, res_cycles[i], (i < pipeline->_rescount-1) ? ',' : ' ', pipeline->_reslist.name(i)); | |
423 } | |
424 | |
425 // See if the same string is in the table | |
426 int ndx = pipeline_res_cycles.index(resource_cycles); | |
427 | |
428 // No, add it to the table | |
429 if (ndx < 0) { | |
430 pipeline_res_cycles.addName(resource_cycles); | |
431 ndx = pipeline_res_cycles.index(resource_cycles); | |
432 | |
433 fprintf(fp_cpp, "static const uint pipeline_res_cycles_%03d[%d] = {\n%s};\n\n", | |
434 ndx+1, pipeline->_rescount, resource_cycles); | |
435 } | |
436 else | |
437 delete [] resource_cycles; | |
438 | |
439 delete [] res_cycles; | |
440 | |
441 return (ndx); | |
442 } | |
443 | |
444 //typedef unsigned long long uint64_t; | |
445 | |
446 // Compute an index for an array in the pipeline_res_mask_NNN arrays | |
447 static int pipeline_res_mask_initializer( | |
448 FILE *fp_cpp, | |
449 PipelineForm *pipeline, | |
450 NameList &pipeline_res_mask, | |
451 NameList &pipeline_res_args, | |
452 PipeClassForm *pipeclass) | |
453 { | |
454 const PipeClassResourceForm *piperesource; | |
455 const uint rescount = pipeline->_rescount; | |
456 const uint maxcycleused = pipeline->_maxcycleused; | |
457 const uint cyclemasksize = (maxcycleused + 31) >> 5; | |
458 | |
459 int i, j; | |
460 int element_count = 0; | |
461 uint *res_mask = new uint [cyclemasksize]; | |
462 uint resources_used = 0; | |
463 uint resources_used_exclusively = 0; | |
464 | |
465 for (pipeclass->_resUsage.reset(); | |
10389 | 466 (piperesource = (const PipeClassResourceForm*)pipeclass->_resUsage.iter()) != NULL; ) { |
0 | 467 element_count++; |
10389 | 468 } |
0 | 469 |
470 // Pre-compute the string length | |
471 int templen; | |
472 int commentlen = 0; | |
473 int max_cycles = 0; | |
474 | |
475 int cyclelen = ((maxcycleused + 3) >> 2); | |
476 int masklen = (rescount + 3) >> 2; | |
477 | |
478 int cycledigit = 0; | |
479 for (i = maxcycleused; i > 0; i /= 10) | |
480 cycledigit++; | |
481 | |
482 int maskdigit = 0; | |
483 for (i = rescount; i > 0; i /= 10) | |
484 maskdigit++; | |
485 | |
10389 | 486 static const char* pipeline_use_cycle_mask = "Pipeline_Use_Cycle_Mask"; |
487 static const char* pipeline_use_element = "Pipeline_Use_Element"; | |
0 | 488 |
489 templen = 1 + | |
490 (int)(strlen(pipeline_use_cycle_mask) + (int)strlen(pipeline_use_element) + | |
491 (cyclemasksize * 12) + masklen + (cycledigit * 2) + 30) * element_count; | |
492 | |
493 // Allocate space for the resource list | |
494 char * resource_mask = new char [templen]; | |
495 char * last_comma = NULL; | |
496 | |
497 templen = 0; | |
498 | |
499 for (pipeclass->_resUsage.reset(); | |
10389 | 500 (piperesource = (const PipeClassResourceForm*)pipeclass->_resUsage.iter()) != NULL; ) { |
0 | 501 int used_mask = pipeline->_resdict[piperesource->_resource]->is_resource()->mask(); |
502 | |
10389 | 503 if (!used_mask) { |
0 | 504 fprintf(stderr, "*** used_mask is 0 ***\n"); |
10389 | 505 } |
0 | 506 |
507 resources_used |= used_mask; | |
508 | |
509 uint lb, ub; | |
510 | |
511 for (lb = 0; (used_mask & (1 << lb)) == 0; lb++); | |
512 for (ub = 31; (used_mask & (1 << ub)) == 0; ub--); | |
513 | |
10389 | 514 if (lb == ub) { |
0 | 515 resources_used_exclusively |= used_mask; |
10389 | 516 } |
0 | 517 |
518 int formatlen = | |
519 sprintf(&resource_mask[templen], " %s(0x%0*x, %*d, %*d, %s %s(", | |
520 pipeline_use_element, | |
521 masklen, used_mask, | |
522 cycledigit, lb, cycledigit, ub, | |
523 ((used_mask & (used_mask-1)) != 0) ? "true, " : "false,", | |
524 pipeline_use_cycle_mask); | |
525 | |
526 templen += formatlen; | |
527 | |
528 memset(res_mask, 0, cyclemasksize * sizeof(uint)); | |
529 | |
530 int cycles = piperesource->_cycles; | |
531 uint stage = pipeline->_stages.index(piperesource->_stage); | |
10389 | 532 if ((uint)NameList::Not_in_list == stage) { |
6850 | 533 fprintf(stderr, |
534 "pipeline_res_mask_initializer: " | |
535 "semantic error: " | |
536 "pipeline stage undeclared: %s\n", | |
537 piperesource->_stage); | |
538 exit(1); | |
539 } | |
10389 | 540 uint upper_limit = stage + cycles - 1; |
541 uint lower_limit = stage - 1; | |
0 | 542 uint upper_idx = upper_limit >> 5; |
543 uint lower_idx = lower_limit >> 5; | |
544 uint upper_position = upper_limit & 0x1f; | |
545 uint lower_position = lower_limit & 0x1f; | |
546 | |
547 uint mask = (((uint)1) << upper_position) - 1; | |
548 | |
10389 | 549 while (upper_idx > lower_idx) { |
0 | 550 res_mask[upper_idx--] |= mask; |
551 mask = (uint)-1; | |
552 } | |
553 | |
554 mask -= (((uint)1) << lower_position) - 1; | |
555 res_mask[upper_idx] |= mask; | |
556 | |
557 for (j = cyclemasksize-1; j >= 0; j--) { | |
558 formatlen = | |
559 sprintf(&resource_mask[templen], "0x%08x%s", res_mask[j], j > 0 ? ", " : ""); | |
560 templen += formatlen; | |
561 } | |
562 | |
563 resource_mask[templen++] = ')'; | |
564 resource_mask[templen++] = ')'; | |
565 last_comma = &resource_mask[templen]; | |
566 resource_mask[templen++] = ','; | |
567 resource_mask[templen++] = '\n'; | |
568 } | |
569 | |
570 resource_mask[templen] = 0; | |
10389 | 571 if (last_comma) { |
0 | 572 last_comma[0] = ' '; |
10389 | 573 } |
0 | 574 |
575 // See if the same string is in the table | |
576 int ndx = pipeline_res_mask.index(resource_mask); | |
577 | |
578 // No, add it to the table | |
579 if (ndx < 0) { | |
580 pipeline_res_mask.addName(resource_mask); | |
581 ndx = pipeline_res_mask.index(resource_mask); | |
582 | |
583 if (strlen(resource_mask) > 0) | |
584 fprintf(fp_cpp, "static const Pipeline_Use_Element pipeline_res_mask_%03d[%d] = {\n%s};\n\n", | |
585 ndx+1, element_count, resource_mask); | |
586 | |
10389 | 587 char* args = new char [9 + 2*masklen + maskdigit]; |
0 | 588 |
589 sprintf(args, "0x%0*x, 0x%0*x, %*d", | |
590 masklen, resources_used, | |
591 masklen, resources_used_exclusively, | |
592 maskdigit, element_count); | |
593 | |
594 pipeline_res_args.addName(args); | |
595 } | |
10389 | 596 else { |
0 | 597 delete [] resource_mask; |
10389 | 598 } |
0 | 599 |
600 delete [] res_mask; | |
601 //delete [] res_masks; | |
602 | |
603 return (ndx); | |
604 } | |
605 | |
606 void ArchDesc::build_pipe_classes(FILE *fp_cpp) { | |
607 const char *classname; | |
608 const char *resourcename; | |
609 int resourcenamelen = 0; | |
610 NameList pipeline_reads; | |
611 NameList pipeline_res_stages; | |
612 NameList pipeline_res_cycles; | |
613 NameList pipeline_res_masks; | |
614 NameList pipeline_res_args; | |
615 const int default_latency = 1; | |
616 const int non_operand_latency = 0; | |
617 const int node_latency = 0; | |
618 | |
619 if (!_pipeline) { | |
620 fprintf(fp_cpp, "uint Node::latency(uint i) const {\n"); | |
621 fprintf(fp_cpp, " // assert(false, \"pipeline functionality is not defined\");\n"); | |
622 fprintf(fp_cpp, " return %d;\n", non_operand_latency); | |
623 fprintf(fp_cpp, "}\n"); | |
624 return; | |
625 } | |
626 | |
627 fprintf(fp_cpp, "\n"); | |
628 fprintf(fp_cpp, "//------------------Pipeline Methods-----------------------------------------\n"); | |
629 fprintf(fp_cpp, "#ifndef PRODUCT\n"); | |
630 fprintf(fp_cpp, "const char * Pipeline::stageName(uint s) {\n"); | |
631 fprintf(fp_cpp, " static const char * const _stage_names[] = {\n"); | |
632 fprintf(fp_cpp, " \"undefined\""); | |
633 | |
634 for (int s = 0; s < _pipeline->_stagecnt; s++) | |
635 fprintf(fp_cpp, ", \"%s\"", _pipeline->_stages.name(s)); | |
636 | |
637 fprintf(fp_cpp, "\n };\n\n"); | |
638 fprintf(fp_cpp, " return (s <= %d ? _stage_names[s] : \"???\");\n", | |
639 _pipeline->_stagecnt); | |
640 fprintf(fp_cpp, "}\n"); | |
641 fprintf(fp_cpp, "#endif\n\n"); | |
642 | |
643 fprintf(fp_cpp, "uint Pipeline::functional_unit_latency(uint start, const Pipeline *pred) const {\n"); | |
644 fprintf(fp_cpp, " // See if the functional units overlap\n"); | |
645 #if 0 | |
646 fprintf(fp_cpp, "\n#ifndef PRODUCT\n"); | |
647 fprintf(fp_cpp, " if (TraceOptoOutput) {\n"); | |
648 fprintf(fp_cpp, " tty->print(\"# functional_unit_latency: start == %%d, this->exclusively == 0x%%03x, pred->exclusively == 0x%%03x\\n\", start, resourcesUsedExclusively(), pred->resourcesUsedExclusively());\n"); | |
649 fprintf(fp_cpp, " }\n"); | |
650 fprintf(fp_cpp, "#endif\n\n"); | |
651 #endif | |
652 fprintf(fp_cpp, " uint mask = resourcesUsedExclusively() & pred->resourcesUsedExclusively();\n"); | |
653 fprintf(fp_cpp, " if (mask == 0)\n return (start);\n\n"); | |
654 #if 0 | |
655 fprintf(fp_cpp, "\n#ifndef PRODUCT\n"); | |
656 fprintf(fp_cpp, " if (TraceOptoOutput) {\n"); | |
657 fprintf(fp_cpp, " tty->print(\"# functional_unit_latency: mask == 0x%%x\\n\", mask);\n"); | |
658 fprintf(fp_cpp, " }\n"); | |
659 fprintf(fp_cpp, "#endif\n\n"); | |
660 #endif | |
661 fprintf(fp_cpp, " for (uint i = 0; i < pred->resourceUseCount(); i++) {\n"); | |
662 fprintf(fp_cpp, " const Pipeline_Use_Element *predUse = pred->resourceUseElement(i);\n"); | |
663 fprintf(fp_cpp, " if (predUse->multiple())\n"); | |
664 fprintf(fp_cpp, " continue;\n\n"); | |
665 fprintf(fp_cpp, " for (uint j = 0; j < resourceUseCount(); j++) {\n"); | |
666 fprintf(fp_cpp, " const Pipeline_Use_Element *currUse = resourceUseElement(j);\n"); | |
667 fprintf(fp_cpp, " if (currUse->multiple())\n"); | |
668 fprintf(fp_cpp, " continue;\n\n"); | |
669 fprintf(fp_cpp, " if (predUse->used() & currUse->used()) {\n"); | |
670 fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask x = predUse->mask();\n"); | |
671 fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask y = currUse->mask();\n\n"); | |
672 fprintf(fp_cpp, " for ( y <<= start; x.overlaps(y); start++ )\n"); | |
673 fprintf(fp_cpp, " y <<= 1;\n"); | |
674 fprintf(fp_cpp, " }\n"); | |
675 fprintf(fp_cpp, " }\n"); | |
676 fprintf(fp_cpp, " }\n\n"); | |
677 fprintf(fp_cpp, " // There is the potential for overlap\n"); | |
678 fprintf(fp_cpp, " return (start);\n"); | |
679 fprintf(fp_cpp, "}\n\n"); | |
680 fprintf(fp_cpp, "// The following two routines assume that the root Pipeline_Use entity\n"); | |
681 fprintf(fp_cpp, "// consists of exactly 1 element for each functional unit\n"); | |
682 fprintf(fp_cpp, "// start is relative to the current cycle; used for latency-based info\n"); | |
683 fprintf(fp_cpp, "uint Pipeline_Use::full_latency(uint delay, const Pipeline_Use &pred) const {\n"); | |
684 fprintf(fp_cpp, " for (uint i = 0; i < pred._count; i++) {\n"); | |
685 fprintf(fp_cpp, " const Pipeline_Use_Element *predUse = pred.element(i);\n"); | |
686 fprintf(fp_cpp, " if (predUse->_multiple) {\n"); | |
687 fprintf(fp_cpp, " uint min_delay = %d;\n", | |
688 _pipeline->_maxcycleused+1); | |
689 fprintf(fp_cpp, " // Multiple possible functional units, choose first unused one\n"); | |
690 fprintf(fp_cpp, " for (uint j = predUse->_lb; j <= predUse->_ub; j++) {\n"); | |
691 fprintf(fp_cpp, " const Pipeline_Use_Element *currUse = element(j);\n"); | |
692 fprintf(fp_cpp, " uint curr_delay = delay;\n"); | |
693 fprintf(fp_cpp, " if (predUse->_used & currUse->_used) {\n"); | |
694 fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask x = predUse->_mask;\n"); | |
695 fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask y = currUse->_mask;\n\n"); | |
696 fprintf(fp_cpp, " for ( y <<= curr_delay; x.overlaps(y); curr_delay++ )\n"); | |
697 fprintf(fp_cpp, " y <<= 1;\n"); | |
698 fprintf(fp_cpp, " }\n"); | |
699 fprintf(fp_cpp, " if (min_delay > curr_delay)\n min_delay = curr_delay;\n"); | |
700 fprintf(fp_cpp, " }\n"); | |
701 fprintf(fp_cpp, " if (delay < min_delay)\n delay = min_delay;\n"); | |
702 fprintf(fp_cpp, " }\n"); | |
703 fprintf(fp_cpp, " else {\n"); | |
704 fprintf(fp_cpp, " for (uint j = predUse->_lb; j <= predUse->_ub; j++) {\n"); | |
705 fprintf(fp_cpp, " const Pipeline_Use_Element *currUse = element(j);\n"); | |
706 fprintf(fp_cpp, " if (predUse->_used & currUse->_used) {\n"); | |
707 fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask x = predUse->_mask;\n"); | |
708 fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask y = currUse->_mask;\n\n"); | |
709 fprintf(fp_cpp, " for ( y <<= delay; x.overlaps(y); delay++ )\n"); | |
710 fprintf(fp_cpp, " y <<= 1;\n"); | |
711 fprintf(fp_cpp, " }\n"); | |
712 fprintf(fp_cpp, " }\n"); | |
713 fprintf(fp_cpp, " }\n"); | |
714 fprintf(fp_cpp, " }\n\n"); | |
715 fprintf(fp_cpp, " return (delay);\n"); | |
716 fprintf(fp_cpp, "}\n\n"); | |
717 fprintf(fp_cpp, "void Pipeline_Use::add_usage(const Pipeline_Use &pred) {\n"); | |
718 fprintf(fp_cpp, " for (uint i = 0; i < pred._count; i++) {\n"); | |
719 fprintf(fp_cpp, " const Pipeline_Use_Element *predUse = pred.element(i);\n"); | |
720 fprintf(fp_cpp, " if (predUse->_multiple) {\n"); | |
721 fprintf(fp_cpp, " // Multiple possible functional units, choose first unused one\n"); | |
722 fprintf(fp_cpp, " for (uint j = predUse->_lb; j <= predUse->_ub; j++) {\n"); | |
723 fprintf(fp_cpp, " Pipeline_Use_Element *currUse = element(j);\n"); | |
724 fprintf(fp_cpp, " if ( !predUse->_mask.overlaps(currUse->_mask) ) {\n"); | |
725 fprintf(fp_cpp, " currUse->_used |= (1 << j);\n"); | |
726 fprintf(fp_cpp, " _resources_used |= (1 << j);\n"); | |
727 fprintf(fp_cpp, " currUse->_mask.Or(predUse->_mask);\n"); | |
728 fprintf(fp_cpp, " break;\n"); | |
729 fprintf(fp_cpp, " }\n"); | |
730 fprintf(fp_cpp, " }\n"); | |
731 fprintf(fp_cpp, " }\n"); | |
732 fprintf(fp_cpp, " else {\n"); | |
733 fprintf(fp_cpp, " for (uint j = predUse->_lb; j <= predUse->_ub; j++) {\n"); | |
734 fprintf(fp_cpp, " Pipeline_Use_Element *currUse = element(j);\n"); | |
735 fprintf(fp_cpp, " currUse->_used |= (1 << j);\n"); | |
736 fprintf(fp_cpp, " _resources_used |= (1 << j);\n"); | |
737 fprintf(fp_cpp, " currUse->_mask.Or(predUse->_mask);\n"); | |
738 fprintf(fp_cpp, " }\n"); | |
739 fprintf(fp_cpp, " }\n"); | |
740 fprintf(fp_cpp, " }\n"); | |
741 fprintf(fp_cpp, "}\n\n"); | |
742 | |
743 fprintf(fp_cpp, "uint Pipeline::operand_latency(uint opnd, const Pipeline *pred) const {\n"); | |
744 fprintf(fp_cpp, " int const default_latency = 1;\n"); | |
745 fprintf(fp_cpp, "\n"); | |
746 #if 0 | |
747 fprintf(fp_cpp, "#ifndef PRODUCT\n"); | |
748 fprintf(fp_cpp, " if (TraceOptoOutput) {\n"); | |
749 fprintf(fp_cpp, " tty->print(\"# operand_latency(%%d), _read_stage_count = %%d\\n\", opnd, _read_stage_count);\n"); | |
750 fprintf(fp_cpp, " }\n"); | |
751 fprintf(fp_cpp, "#endif\n\n"); | |
752 #endif | |
1489
cff162798819
6888953: some calls to function-like macros are missing semicolons
jcoomes
parents:
1203
diff
changeset
|
753 fprintf(fp_cpp, " assert(this, \"NULL pipeline info\");\n"); |
cff162798819
6888953: some calls to function-like macros are missing semicolons
jcoomes
parents:
1203
diff
changeset
|
754 fprintf(fp_cpp, " assert(pred, \"NULL predecessor pipline info\");\n\n"); |
0 | 755 fprintf(fp_cpp, " if (pred->hasFixedLatency())\n return (pred->fixedLatency());\n\n"); |
756 fprintf(fp_cpp, " // If this is not an operand, then assume a dependence with 0 latency\n"); | |
757 fprintf(fp_cpp, " if (opnd > _read_stage_count)\n return (0);\n\n"); | |
758 fprintf(fp_cpp, " uint writeStage = pred->_write_stage;\n"); | |
759 fprintf(fp_cpp, " uint readStage = _read_stages[opnd-1];\n"); | |
760 #if 0 | |
761 fprintf(fp_cpp, "\n#ifndef PRODUCT\n"); | |
762 fprintf(fp_cpp, " if (TraceOptoOutput) {\n"); | |
763 fprintf(fp_cpp, " tty->print(\"# operand_latency: writeStage=%%s readStage=%%s, opnd=%%d\\n\", stageName(writeStage), stageName(readStage), opnd);\n"); | |
764 fprintf(fp_cpp, " }\n"); | |
765 fprintf(fp_cpp, "#endif\n\n"); | |
766 #endif | |
767 fprintf(fp_cpp, "\n"); | |
768 fprintf(fp_cpp, " if (writeStage == stage_undefined || readStage == stage_undefined)\n"); | |
769 fprintf(fp_cpp, " return (default_latency);\n"); | |
770 fprintf(fp_cpp, "\n"); | |
771 fprintf(fp_cpp, " int delta = writeStage - readStage;\n"); | |
772 fprintf(fp_cpp, " if (delta < 0) delta = 0;\n\n"); | |
773 #if 0 | |
774 fprintf(fp_cpp, "\n#ifndef PRODUCT\n"); | |
775 fprintf(fp_cpp, " if (TraceOptoOutput) {\n"); | |
776 fprintf(fp_cpp, " tty->print(\"# operand_latency: delta=%%d\\n\", delta);\n"); | |
777 fprintf(fp_cpp, " }\n"); | |
778 fprintf(fp_cpp, "#endif\n\n"); | |
779 #endif | |
780 fprintf(fp_cpp, " return (delta);\n"); | |
781 fprintf(fp_cpp, "}\n\n"); | |
782 | |
783 if (!_pipeline) | |
784 /* Do Nothing */; | |
785 | |
786 else if (_pipeline->_maxcycleused <= | |
787 #ifdef SPARC | |
788 64 | |
789 #else | |
790 32 | |
791 #endif | |
792 ) { | |
793 fprintf(fp_cpp, "Pipeline_Use_Cycle_Mask operator&(const Pipeline_Use_Cycle_Mask &in1, const Pipeline_Use_Cycle_Mask &in2) {\n"); | |
794 fprintf(fp_cpp, " return Pipeline_Use_Cycle_Mask(in1._mask & in2._mask);\n"); | |
795 fprintf(fp_cpp, "}\n\n"); | |
796 fprintf(fp_cpp, "Pipeline_Use_Cycle_Mask operator|(const Pipeline_Use_Cycle_Mask &in1, const Pipeline_Use_Cycle_Mask &in2) {\n"); | |
797 fprintf(fp_cpp, " return Pipeline_Use_Cycle_Mask(in1._mask | in2._mask);\n"); | |
798 fprintf(fp_cpp, "}\n\n"); | |
799 } | |
800 else { | |
801 uint l; | |
802 uint masklen = (_pipeline->_maxcycleused + 31) >> 5; | |
803 fprintf(fp_cpp, "Pipeline_Use_Cycle_Mask operator&(const Pipeline_Use_Cycle_Mask &in1, const Pipeline_Use_Cycle_Mask &in2) {\n"); | |
804 fprintf(fp_cpp, " return Pipeline_Use_Cycle_Mask("); | |
805 for (l = 1; l <= masklen; l++) | |
806 fprintf(fp_cpp, "in1._mask%d & in2._mask%d%s\n", l, l, l < masklen ? ", " : ""); | |
807 fprintf(fp_cpp, ");\n"); | |
808 fprintf(fp_cpp, "}\n\n"); | |
809 fprintf(fp_cpp, "Pipeline_Use_Cycle_Mask operator|(const Pipeline_Use_Cycle_Mask &in1, const Pipeline_Use_Cycle_Mask &in2) {\n"); | |
810 fprintf(fp_cpp, " return Pipeline_Use_Cycle_Mask("); | |
811 for (l = 1; l <= masklen; l++) | |
812 fprintf(fp_cpp, "in1._mask%d | in2._mask%d%s", l, l, l < masklen ? ", " : ""); | |
813 fprintf(fp_cpp, ");\n"); | |
814 fprintf(fp_cpp, "}\n\n"); | |
815 fprintf(fp_cpp, "void Pipeline_Use_Cycle_Mask::Or(const Pipeline_Use_Cycle_Mask &in2) {\n "); | |
816 for (l = 1; l <= masklen; l++) | |
817 fprintf(fp_cpp, " _mask%d |= in2._mask%d;", l, l); | |
818 fprintf(fp_cpp, "\n}\n\n"); | |
819 } | |
820 | |
821 /* Get the length of all the resource names */ | |
822 for (_pipeline->_reslist.reset(), resourcenamelen = 0; | |
823 (resourcename = _pipeline->_reslist.iter()) != NULL; | |
824 resourcenamelen += (int)strlen(resourcename)); | |
825 | |
826 // Create the pipeline class description | |
827 | |
828 fprintf(fp_cpp, "static const Pipeline pipeline_class_Zero_Instructions(0, 0, true, 0, 0, false, false, false, false, NULL, NULL, NULL, Pipeline_Use(0, 0, 0, NULL));\n\n"); | |
829 fprintf(fp_cpp, "static const Pipeline pipeline_class_Unknown_Instructions(0, 0, true, 0, 0, false, true, true, false, NULL, NULL, NULL, Pipeline_Use(0, 0, 0, NULL));\n\n"); | |
830 | |
831 fprintf(fp_cpp, "const Pipeline_Use_Element Pipeline_Use::elaborated_elements[%d] = {\n", _pipeline->_rescount); | |
832 for (int i1 = 0; i1 < _pipeline->_rescount; i1++) { | |
833 fprintf(fp_cpp, " Pipeline_Use_Element(0, %d, %d, false, Pipeline_Use_Cycle_Mask(", i1, i1); | |
834 uint masklen = (_pipeline->_maxcycleused + 31) >> 5; | |
835 for (int i2 = masklen-1; i2 >= 0; i2--) | |
836 fprintf(fp_cpp, "0%s", i2 > 0 ? ", " : ""); | |
837 fprintf(fp_cpp, "))%s\n", i1 < (_pipeline->_rescount-1) ? "," : ""); | |
838 } | |
839 fprintf(fp_cpp, "};\n\n"); | |
840 | |
841 fprintf(fp_cpp, "const Pipeline_Use Pipeline_Use::elaborated_use(0, 0, %d, (Pipeline_Use_Element *)&elaborated_elements[0]);\n\n", | |
842 _pipeline->_rescount); | |
843 | |
844 for (_pipeline->_classlist.reset(); (classname = _pipeline->_classlist.iter()) != NULL; ) { | |
845 fprintf(fp_cpp, "\n"); | |
846 fprintf(fp_cpp, "// Pipeline Class \"%s\"\n", classname); | |
847 PipeClassForm *pipeclass = _pipeline->_classdict[classname]->is_pipeclass(); | |
848 int maxWriteStage = -1; | |
849 int maxMoreInstrs = 0; | |
850 int paramcount = 0; | |
851 int i = 0; | |
852 const char *paramname; | |
853 int resource_count = (_pipeline->_rescount + 3) >> 2; | |
854 | |
855 // Scan the operands, looking for last output stage and number of inputs | |
856 for (pipeclass->_parameters.reset(); (paramname = pipeclass->_parameters.iter()) != NULL; ) { | |
857 const PipeClassOperandForm *pipeopnd = | |
858 (const PipeClassOperandForm *)pipeclass->_localUsage[paramname]; | |
859 if (pipeopnd) { | |
860 if (pipeopnd->_iswrite) { | |
861 int stagenum = _pipeline->_stages.index(pipeopnd->_stage); | |
862 int moreinsts = pipeopnd->_more_instrs; | |
863 if ((maxWriteStage+maxMoreInstrs) < (stagenum+moreinsts)) { | |
864 maxWriteStage = stagenum; | |
865 maxMoreInstrs = moreinsts; | |
866 } | |
867 } | |
868 } | |
869 | |
870 if (i++ > 0 || (pipeopnd && !pipeopnd->isWrite())) | |
871 paramcount++; | |
872 } | |
873 | |
874 // Create the list of stages for the operands that are read | |
875 // Note that we will build a NameList to reduce the number of copies | |
876 | |
877 int pipeline_reads_index = pipeline_reads_initializer(fp_cpp, pipeline_reads, pipeclass); | |
878 | |
879 int pipeline_res_stages_index = pipeline_res_stages_initializer( | |
880 fp_cpp, _pipeline, pipeline_res_stages, pipeclass); | |
881 | |
882 int pipeline_res_cycles_index = pipeline_res_cycles_initializer( | |
883 fp_cpp, _pipeline, pipeline_res_cycles, pipeclass); | |
884 | |
885 int pipeline_res_mask_index = pipeline_res_mask_initializer( | |
886 fp_cpp, _pipeline, pipeline_res_masks, pipeline_res_args, pipeclass); | |
887 | |
888 #if 0 | |
889 // Process the Resources | |
890 const PipeClassResourceForm *piperesource; | |
891 | |
892 unsigned resources_used = 0; | |
893 unsigned exclusive_resources_used = 0; | |
894 unsigned resource_groups = 0; | |
895 for (pipeclass->_resUsage.reset(); | |
896 (piperesource = (const PipeClassResourceForm *)pipeclass->_resUsage.iter()) != NULL; ) { | |
897 int used_mask = _pipeline->_resdict[piperesource->_resource]->is_resource()->mask(); | |
898 if (used_mask) | |
899 resource_groups++; | |
900 resources_used |= used_mask; | |
901 if ((used_mask & (used_mask-1)) == 0) | |
902 exclusive_resources_used |= used_mask; | |
903 } | |
904 | |
905 if (resource_groups > 0) { | |
906 fprintf(fp_cpp, "static const uint pipeline_res_or_masks_%03d[%d] = {", | |
907 pipeclass->_num, resource_groups); | |
908 for (pipeclass->_resUsage.reset(), i = 1; | |
909 (piperesource = (const PipeClassResourceForm *)pipeclass->_resUsage.iter()) != NULL; | |
910 i++ ) { | |
911 int used_mask = _pipeline->_resdict[piperesource->_resource]->is_resource()->mask(); | |
912 if (used_mask) { | |
913 fprintf(fp_cpp, " 0x%0*x%c", resource_count, used_mask, i < (int)resource_groups ? ',' : ' '); | |
914 } | |
915 } | |
916 fprintf(fp_cpp, "};\n\n"); | |
917 } | |
918 #endif | |
919 | |
920 // Create the pipeline class description | |
921 fprintf(fp_cpp, "static const Pipeline pipeline_class_%03d(", | |
922 pipeclass->_num); | |
923 if (maxWriteStage < 0) | |
924 fprintf(fp_cpp, "(uint)stage_undefined"); | |
925 else if (maxMoreInstrs == 0) | |
926 fprintf(fp_cpp, "(uint)stage_%s", _pipeline->_stages.name(maxWriteStage)); | |
927 else | |
928 fprintf(fp_cpp, "((uint)stage_%s)+%d", _pipeline->_stages.name(maxWriteStage), maxMoreInstrs); | |
929 fprintf(fp_cpp, ", %d, %s, %d, %d, %s, %s, %s, %s,\n", | |
930 paramcount, | |
931 pipeclass->hasFixedLatency() ? "true" : "false", | |
932 pipeclass->fixedLatency(), | |
933 pipeclass->InstructionCount(), | |
934 pipeclass->hasBranchDelay() ? "true" : "false", | |
935 pipeclass->hasMultipleBundles() ? "true" : "false", | |
936 pipeclass->forceSerialization() ? "true" : "false", | |
937 pipeclass->mayHaveNoCode() ? "true" : "false" ); | |
938 if (paramcount > 0) { | |
939 fprintf(fp_cpp, "\n (enum machPipelineStages * const) pipeline_reads_%03d,\n ", | |
940 pipeline_reads_index+1); | |
941 } | |
942 else | |
943 fprintf(fp_cpp, " NULL,"); | |
944 fprintf(fp_cpp, " (enum machPipelineStages * const) pipeline_res_stages_%03d,\n", | |
945 pipeline_res_stages_index+1); | |
946 fprintf(fp_cpp, " (uint * const) pipeline_res_cycles_%03d,\n", | |
947 pipeline_res_cycles_index+1); | |
948 fprintf(fp_cpp, " Pipeline_Use(%s, (Pipeline_Use_Element *)", | |
949 pipeline_res_args.name(pipeline_res_mask_index)); | |
950 if (strlen(pipeline_res_masks.name(pipeline_res_mask_index)) > 0) | |
951 fprintf(fp_cpp, "&pipeline_res_mask_%03d[0]", | |
952 pipeline_res_mask_index+1); | |
953 else | |
954 fprintf(fp_cpp, "NULL"); | |
955 fprintf(fp_cpp, "));\n"); | |
956 } | |
957 | |
958 // Generate the Node::latency method if _pipeline defined | |
959 fprintf(fp_cpp, "\n"); | |
960 fprintf(fp_cpp, "//------------------Inter-Instruction Latency--------------------------------\n"); | |
961 fprintf(fp_cpp, "uint Node::latency(uint i) {\n"); | |
962 if (_pipeline) { | |
963 #if 0 | |
964 fprintf(fp_cpp, "#ifndef PRODUCT\n"); | |
965 fprintf(fp_cpp, " if (TraceOptoOutput) {\n"); | |
966 fprintf(fp_cpp, " tty->print(\"# %%4d->latency(%%d)\\n\", _idx, i);\n"); | |
967 fprintf(fp_cpp, " }\n"); | |
968 fprintf(fp_cpp, "#endif\n"); | |
969 #endif | |
970 fprintf(fp_cpp, " uint j;\n"); | |
971 fprintf(fp_cpp, " // verify in legal range for inputs\n"); | |
972 fprintf(fp_cpp, " assert(i < len(), \"index not in range\");\n\n"); | |
973 fprintf(fp_cpp, " // verify input is not null\n"); | |
974 fprintf(fp_cpp, " Node *pred = in(i);\n"); | |
975 fprintf(fp_cpp, " if (!pred)\n return %d;\n\n", | |
976 non_operand_latency); | |
977 fprintf(fp_cpp, " if (pred->is_Proj())\n pred = pred->in(0);\n\n"); | |
978 fprintf(fp_cpp, " // if either node does not have pipeline info, use default\n"); | |
979 fprintf(fp_cpp, " const Pipeline *predpipe = pred->pipeline();\n"); | |
980 fprintf(fp_cpp, " assert(predpipe, \"no predecessor pipeline info\");\n\n"); | |
981 fprintf(fp_cpp, " if (predpipe->hasFixedLatency())\n return predpipe->fixedLatency();\n\n"); | |
982 fprintf(fp_cpp, " const Pipeline *currpipe = pipeline();\n"); | |
983 fprintf(fp_cpp, " assert(currpipe, \"no pipeline info\");\n\n"); | |
984 fprintf(fp_cpp, " if (!is_Mach())\n return %d;\n\n", | |
985 node_latency); | |
986 fprintf(fp_cpp, " const MachNode *m = as_Mach();\n"); | |
987 fprintf(fp_cpp, " j = m->oper_input_base();\n"); | |
988 fprintf(fp_cpp, " if (i < j)\n return currpipe->functional_unit_latency(%d, predpipe);\n\n", | |
989 non_operand_latency); | |
990 fprintf(fp_cpp, " // determine which operand this is in\n"); | |
991 fprintf(fp_cpp, " uint n = m->num_opnds();\n"); | |
992 fprintf(fp_cpp, " int delta = %d;\n\n", | |
993 non_operand_latency); | |
994 fprintf(fp_cpp, " uint k;\n"); | |
995 fprintf(fp_cpp, " for (k = 1; k < n; k++) {\n"); | |
996 fprintf(fp_cpp, " j += m->_opnds[k]->num_edges();\n"); | |
997 fprintf(fp_cpp, " if (i < j)\n"); | |
998 fprintf(fp_cpp, " break;\n"); | |
999 fprintf(fp_cpp, " }\n"); | |
1000 fprintf(fp_cpp, " if (k < n)\n"); | |
1001 fprintf(fp_cpp, " delta = currpipe->operand_latency(k,predpipe);\n\n"); | |
1002 fprintf(fp_cpp, " return currpipe->functional_unit_latency(delta, predpipe);\n"); | |
1003 } | |
1004 else { | |
1005 fprintf(fp_cpp, " // assert(false, \"pipeline functionality is not defined\");\n"); | |
1006 fprintf(fp_cpp, " return %d;\n", | |
1007 non_operand_latency); | |
1008 } | |
1009 fprintf(fp_cpp, "}\n\n"); | |
1010 | |
1011 // Output the list of nop nodes | |
1012 fprintf(fp_cpp, "// Descriptions for emitting different functional unit nops\n"); | |
1013 const char *nop; | |
1014 int nopcnt = 0; | |
1015 for ( _pipeline->_noplist.reset(); (nop = _pipeline->_noplist.iter()) != NULL; nopcnt++ ); | |
1016 | |
1017 fprintf(fp_cpp, "void Bundle::initialize_nops(MachNode * nop_list[%d], Compile *C) {\n", nopcnt); | |
1018 int i = 0; | |
1019 for ( _pipeline->_noplist.reset(); (nop = _pipeline->_noplist.iter()) != NULL; i++ ) { | |
1020 fprintf(fp_cpp, " nop_list[%d] = (MachNode *) new (C) %sNode();\n", i, nop); | |
1021 } | |
1022 fprintf(fp_cpp, "};\n\n"); | |
1023 fprintf(fp_cpp, "#ifndef PRODUCT\n"); | |
6850 | 1024 fprintf(fp_cpp, "void Bundle::dump(outputStream *st) const {\n"); |
0 | 1025 fprintf(fp_cpp, " static const char * bundle_flags[] = {\n"); |
1026 fprintf(fp_cpp, " \"\",\n"); | |
1027 fprintf(fp_cpp, " \"use nop delay\",\n"); | |
1028 fprintf(fp_cpp, " \"use unconditional delay\",\n"); | |
1029 fprintf(fp_cpp, " \"use conditional delay\",\n"); | |
1030 fprintf(fp_cpp, " \"used in conditional delay\",\n"); | |
1031 fprintf(fp_cpp, " \"used in unconditional delay\",\n"); | |
1032 fprintf(fp_cpp, " \"used in all conditional delays\",\n"); | |
1033 fprintf(fp_cpp, " };\n\n"); | |
1034 | |
1035 fprintf(fp_cpp, " static const char *resource_names[%d] = {", _pipeline->_rescount); | |
1036 for (i = 0; i < _pipeline->_rescount; i++) | |
1037 fprintf(fp_cpp, " \"%s\"%c", _pipeline->_reslist.name(i), i < _pipeline->_rescount-1 ? ',' : ' '); | |
1038 fprintf(fp_cpp, "};\n\n"); | |
1039 | |
1040 // See if the same string is in the table | |
1041 fprintf(fp_cpp, " bool needs_comma = false;\n\n"); | |
1042 fprintf(fp_cpp, " if (_flags) {\n"); | |
6850 | 1043 fprintf(fp_cpp, " st->print(\"%%s\", bundle_flags[_flags]);\n"); |
0 | 1044 fprintf(fp_cpp, " needs_comma = true;\n"); |
1045 fprintf(fp_cpp, " };\n"); | |
1046 fprintf(fp_cpp, " if (instr_count()) {\n"); | |
6850 | 1047 fprintf(fp_cpp, " st->print(\"%%s%%d instr%%s\", needs_comma ? \", \" : \"\", instr_count(), instr_count() != 1 ? \"s\" : \"\");\n"); |
0 | 1048 fprintf(fp_cpp, " needs_comma = true;\n"); |
1049 fprintf(fp_cpp, " };\n"); | |
1050 fprintf(fp_cpp, " uint r = resources_used();\n"); | |
1051 fprintf(fp_cpp, " if (r) {\n"); | |
6850 | 1052 fprintf(fp_cpp, " st->print(\"%%sresource%%s:\", needs_comma ? \", \" : \"\", (r & (r-1)) != 0 ? \"s\" : \"\");\n"); |
0 | 1053 fprintf(fp_cpp, " for (uint i = 0; i < %d; i++)\n", _pipeline->_rescount); |
1054 fprintf(fp_cpp, " if ((r & (1 << i)) != 0)\n"); | |
6850 | 1055 fprintf(fp_cpp, " st->print(\" %%s\", resource_names[i]);\n"); |
0 | 1056 fprintf(fp_cpp, " needs_comma = true;\n"); |
1057 fprintf(fp_cpp, " };\n"); | |
6850 | 1058 fprintf(fp_cpp, " st->print(\"\\n\");\n"); |
0 | 1059 fprintf(fp_cpp, "}\n"); |
1060 fprintf(fp_cpp, "#endif\n"); | |
1061 } | |
1062 | |
1063 // --------------------------------------------------------------------------- | |
1064 //------------------------------Utilities to build Instruction Classes-------- | |
1065 // --------------------------------------------------------------------------- | |
1066 | |
1067 static void defineOut_RegMask(FILE *fp, const char *node, const char *regMask) { | |
1068 fprintf(fp,"const RegMask &%sNode::out_RegMask() const { return (%s); }\n", | |
1069 node, regMask); | |
1070 } | |
1071 | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1072 static void print_block_index(FILE *fp, int inst_position) { |
0 | 1073 assert( inst_position >= 0, "Instruction number less than zero"); |
1074 fprintf(fp, "block_index"); | |
1075 if( inst_position != 0 ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1076 fprintf(fp, " - %d", inst_position); |
0 | 1077 } |
1078 } | |
1079 | |
1080 // Scan the peepmatch and output a test for each instruction | |
1081 static void check_peepmatch_instruction_sequence(FILE *fp, PeepMatch *pmatch, PeepConstraint *pconstraint) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1082 int parent = -1; |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1083 int inst_position = 0; |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1084 const char* inst_name = NULL; |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1085 int input = 0; |
0 | 1086 fprintf(fp, " // Check instruction sub-tree\n"); |
1087 pmatch->reset(); | |
1088 for( pmatch->next_instruction( parent, inst_position, inst_name, input ); | |
1089 inst_name != NULL; | |
1090 pmatch->next_instruction( parent, inst_position, inst_name, input ) ) { | |
1091 // If this is not a placeholder | |
1092 if( ! pmatch->is_placeholder() ) { | |
1093 // Define temporaries 'inst#', based on parent and parent's input index | |
1094 if( parent != -1 ) { // root was initialized | |
1095 fprintf(fp, " // Identify previous instruction if inside this block\n"); | |
1096 fprintf(fp, " if( "); | |
1097 print_block_index(fp, inst_position); | |
1098 fprintf(fp, " > 0 ) {\n Node *n = block->_nodes.at("); | |
1099 print_block_index(fp, inst_position); | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1100 fprintf(fp, ");\n inst%d = (n->is_Mach()) ? ", inst_position); |
0 | 1101 fprintf(fp, "n->as_Mach() : NULL;\n }\n"); |
1102 } | |
1103 | |
1104 // When not the root | |
1105 // Test we have the correct instruction by comparing the rule. | |
1106 if( parent != -1 ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1107 fprintf(fp, " matches = matches && (inst%d != NULL) && (inst%d->rule() == %s_rule);\n", |
0 | 1108 inst_position, inst_position, inst_name); |
1109 } | |
1110 } else { | |
1111 // Check that user did not try to constrain a placeholder | |
1112 assert( ! pconstraint->constrains_instruction(inst_position), | |
1113 "fatal(): Can not constrain a placeholder instruction"); | |
1114 } | |
1115 } | |
1116 } | |
1117 | |
1118 // Build mapping for register indices, num_edges to input | |
1119 static void build_instruction_index_mapping( FILE *fp, FormDict &globals, PeepMatch *pmatch ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1120 int parent = -1; |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1121 int inst_position = 0; |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1122 const char* inst_name = NULL; |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1123 int input = 0; |
0 | 1124 fprintf(fp, " // Build map to register info\n"); |
1125 pmatch->reset(); | |
1126 for( pmatch->next_instruction( parent, inst_position, inst_name, input ); | |
1127 inst_name != NULL; | |
1128 pmatch->next_instruction( parent, inst_position, inst_name, input ) ) { | |
1129 // If this is not a placeholder | |
1130 if( ! pmatch->is_placeholder() ) { | |
1131 // Define temporaries 'inst#', based on self's inst_position | |
1132 InstructForm *inst = globals[inst_name]->is_instruction(); | |
1133 if( inst != NULL ) { | |
1134 char inst_prefix[] = "instXXXX_"; | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1135 sprintf(inst_prefix, "inst%d_", inst_position); |
0 | 1136 char receiver[] = "instXXXX->"; |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1137 sprintf(receiver, "inst%d->", inst_position); |
0 | 1138 inst->index_temps( fp, globals, inst_prefix, receiver ); |
1139 } | |
1140 } | |
1141 } | |
1142 } | |
1143 | |
1144 // Generate tests for the constraints | |
1145 static void check_peepconstraints(FILE *fp, FormDict &globals, PeepMatch *pmatch, PeepConstraint *pconstraint) { | |
1146 fprintf(fp, "\n"); | |
1147 fprintf(fp, " // Check constraints on sub-tree-leaves\n"); | |
1148 | |
1149 // Build mapping from num_edges to local variables | |
1150 build_instruction_index_mapping( fp, globals, pmatch ); | |
1151 | |
1152 // Build constraint tests | |
1153 if( pconstraint != NULL ) { | |
1154 fprintf(fp, " matches = matches &&"); | |
1155 bool first_constraint = true; | |
1156 while( pconstraint != NULL ) { | |
1157 // indentation and connecting '&&' | |
1158 const char *indentation = " "; | |
1159 fprintf(fp, "\n%s%s", indentation, (!first_constraint ? "&& " : " ")); | |
1160 | |
1161 // Only have '==' relation implemented | |
1162 if( strcmp(pconstraint->_relation,"==") != 0 ) { | |
1163 assert( false, "Unimplemented()" ); | |
1164 } | |
1165 | |
1166 // LEFT | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1167 int left_index = pconstraint->_left_inst; |
0 | 1168 const char *left_op = pconstraint->_left_op; |
1169 // Access info on the instructions whose operands are compared | |
1170 InstructForm *inst_left = globals[pmatch->instruction_name(left_index)]->is_instruction(); | |
1171 assert( inst_left, "Parser should guaranty this is an instruction"); | |
1172 int left_op_base = inst_left->oper_input_base(globals); | |
1173 // Access info on the operands being compared | |
1174 int left_op_index = inst_left->operand_position(left_op, Component::USE); | |
1175 if( left_op_index == -1 ) { | |
1176 left_op_index = inst_left->operand_position(left_op, Component::DEF); | |
1177 if( left_op_index == -1 ) { | |
1178 left_op_index = inst_left->operand_position(left_op, Component::USE_DEF); | |
1179 } | |
1180 } | |
1181 assert( left_op_index != NameList::Not_in_list, "Did not find operand in instruction"); | |
1182 ComponentList components_left = inst_left->_components; | |
1183 const char *left_comp_type = components_left.at(left_op_index)->_type; | |
1184 OpClassForm *left_opclass = globals[left_comp_type]->is_opclass(); | |
1185 Form::InterfaceType left_interface_type = left_opclass->interface_type(globals); | |
1186 | |
1187 | |
1188 // RIGHT | |
1189 int right_op_index = -1; | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1190 int right_index = pconstraint->_right_inst; |
0 | 1191 const char *right_op = pconstraint->_right_op; |
1192 if( right_index != -1 ) { // Match operand | |
1193 // Access info on the instructions whose operands are compared | |
1194 InstructForm *inst_right = globals[pmatch->instruction_name(right_index)]->is_instruction(); | |
1195 assert( inst_right, "Parser should guaranty this is an instruction"); | |
1196 int right_op_base = inst_right->oper_input_base(globals); | |
1197 // Access info on the operands being compared | |
1198 right_op_index = inst_right->operand_position(right_op, Component::USE); | |
1199 if( right_op_index == -1 ) { | |
1200 right_op_index = inst_right->operand_position(right_op, Component::DEF); | |
1201 if( right_op_index == -1 ) { | |
1202 right_op_index = inst_right->operand_position(right_op, Component::USE_DEF); | |
1203 } | |
1204 } | |
1205 assert( right_op_index != NameList::Not_in_list, "Did not find operand in instruction"); | |
1206 ComponentList components_right = inst_right->_components; | |
1207 const char *right_comp_type = components_right.at(right_op_index)->_type; | |
1208 OpClassForm *right_opclass = globals[right_comp_type]->is_opclass(); | |
1209 Form::InterfaceType right_interface_type = right_opclass->interface_type(globals); | |
1210 assert( right_interface_type == left_interface_type, "Both must be same interface"); | |
1211 | |
1212 } else { // Else match register | |
1213 // assert( false, "should be a register" ); | |
1214 } | |
1215 | |
1216 // | |
1217 // Check for equivalence | |
1218 // | |
1219 // fprintf(fp, "phase->eqv( "); | |
1220 // fprintf(fp, "inst%d->in(%d+%d) /* %s */, inst%d->in(%d+%d) /* %s */", | |
1221 // left_index, left_op_base, left_op_index, left_op, | |
1222 // right_index, right_op_base, right_op_index, right_op ); | |
1223 // fprintf(fp, ")"); | |
1224 // | |
1225 switch( left_interface_type ) { | |
1226 case Form::register_interface: { | |
1227 // Check that they are allocated to the same register | |
1228 // Need parameter for index position if not result operand | |
1229 char left_reg_index[] = ",instXXXX_idxXXXX"; | |
1230 if( left_op_index != 0 ) { | |
1231 assert( (left_index <= 9999) && (left_op_index <= 9999), "exceed string size"); | |
1232 // Must have index into operands | |
6850 | 1233 sprintf(left_reg_index,",inst%d_idx%d", (int)left_index, left_op_index); |
0 | 1234 } else { |
1235 strcpy(left_reg_index, ""); | |
1236 } | |
1237 fprintf(fp, "(inst%d->_opnds[%d]->reg(ra_,inst%d%s) /* %d.%s */", | |
1238 left_index, left_op_index, left_index, left_reg_index, left_index, left_op ); | |
1239 fprintf(fp, " == "); | |
1240 | |
1241 if( right_index != -1 ) { | |
1242 char right_reg_index[18] = ",instXXXX_idxXXXX"; | |
1243 if( right_op_index != 0 ) { | |
1244 assert( (right_index <= 9999) && (right_op_index <= 9999), "exceed string size"); | |
1245 // Must have index into operands | |
6850 | 1246 sprintf(right_reg_index,",inst%d_idx%d", (int)right_index, right_op_index); |
0 | 1247 } else { |
1248 strcpy(right_reg_index, ""); | |
1249 } | |
1250 fprintf(fp, "/* %d.%s */ inst%d->_opnds[%d]->reg(ra_,inst%d%s)", | |
1251 right_index, right_op, right_index, right_op_index, right_index, right_reg_index ); | |
1252 } else { | |
1253 fprintf(fp, "%s_enc", right_op ); | |
1254 } | |
1255 fprintf(fp,")"); | |
1256 break; | |
1257 } | |
1258 case Form::constant_interface: { | |
1259 // Compare the '->constant()' values | |
1260 fprintf(fp, "(inst%d->_opnds[%d]->constant() /* %d.%s */", | |
1261 left_index, left_op_index, left_index, left_op ); | |
1262 fprintf(fp, " == "); | |
1263 fprintf(fp, "/* %d.%s */ inst%d->_opnds[%d]->constant())", | |
1264 right_index, right_op, right_index, right_op_index ); | |
1265 break; | |
1266 } | |
1267 case Form::memory_interface: { | |
1268 // Compare 'base', 'index', 'scale', and 'disp' | |
1269 // base | |
1270 fprintf(fp, "( \n"); | |
1271 fprintf(fp, " (inst%d->_opnds[%d]->base(ra_,inst%d,inst%d_idx%d) /* %d.%s$$base */", | |
1272 left_index, left_op_index, left_index, left_index, left_op_index, left_index, left_op ); | |
1273 fprintf(fp, " == "); | |
1274 fprintf(fp, "/* %d.%s$$base */ inst%d->_opnds[%d]->base(ra_,inst%d,inst%d_idx%d)) &&\n", | |
1275 right_index, right_op, right_index, right_op_index, right_index, right_index, right_op_index ); | |
1276 // index | |
1277 fprintf(fp, " (inst%d->_opnds[%d]->index(ra_,inst%d,inst%d_idx%d) /* %d.%s$$index */", | |
1278 left_index, left_op_index, left_index, left_index, left_op_index, left_index, left_op ); | |
1279 fprintf(fp, " == "); | |
1280 fprintf(fp, "/* %d.%s$$index */ inst%d->_opnds[%d]->index(ra_,inst%d,inst%d_idx%d)) &&\n", | |
1281 right_index, right_op, right_index, right_op_index, right_index, right_index, right_op_index ); | |
1282 // scale | |
1283 fprintf(fp, " (inst%d->_opnds[%d]->scale() /* %d.%s$$scale */", | |
1284 left_index, left_op_index, left_index, left_op ); | |
1285 fprintf(fp, " == "); | |
1286 fprintf(fp, "/* %d.%s$$scale */ inst%d->_opnds[%d]->scale()) &&\n", | |
1287 right_index, right_op, right_index, right_op_index ); | |
1288 // disp | |
1289 fprintf(fp, " (inst%d->_opnds[%d]->disp(ra_,inst%d,inst%d_idx%d) /* %d.%s$$disp */", | |
1290 left_index, left_op_index, left_index, left_index, left_op_index, left_index, left_op ); | |
1291 fprintf(fp, " == "); | |
1292 fprintf(fp, "/* %d.%s$$disp */ inst%d->_opnds[%d]->disp(ra_,inst%d,inst%d_idx%d))\n", | |
1293 right_index, right_op, right_index, right_op_index, right_index, right_index, right_op_index ); | |
1294 fprintf(fp, ") \n"); | |
1295 break; | |
1296 } | |
1297 case Form::conditional_interface: { | |
1298 // Compare the condition code being tested | |
1299 assert( false, "Unimplemented()" ); | |
1300 break; | |
1301 } | |
1302 default: { | |
1303 assert( false, "ShouldNotReachHere()" ); | |
1304 break; | |
1305 } | |
1306 } | |
1307 | |
1308 // Advance to next constraint | |
1309 pconstraint = pconstraint->next(); | |
1310 first_constraint = false; | |
1311 } | |
1312 | |
1313 fprintf(fp, ";\n"); | |
1314 } | |
1315 } | |
1316 | |
1317 // // EXPERIMENTAL -- TEMPORARY code | |
1318 // static Form::DataType get_operand_type(FormDict &globals, InstructForm *instr, const char *op_name ) { | |
1319 // int op_index = instr->operand_position(op_name, Component::USE); | |
1320 // if( op_index == -1 ) { | |
1321 // op_index = instr->operand_position(op_name, Component::DEF); | |
1322 // if( op_index == -1 ) { | |
1323 // op_index = instr->operand_position(op_name, Component::USE_DEF); | |
1324 // } | |
1325 // } | |
1326 // assert( op_index != NameList::Not_in_list, "Did not find operand in instruction"); | |
1327 // | |
1328 // ComponentList components_right = instr->_components; | |
1329 // char *right_comp_type = components_right.at(op_index)->_type; | |
1330 // OpClassForm *right_opclass = globals[right_comp_type]->is_opclass(); | |
1331 // Form::InterfaceType right_interface_type = right_opclass->interface_type(globals); | |
1332 // | |
1333 // return; | |
1334 // } | |
1335 | |
1336 // Construct the new sub-tree | |
1337 static void generate_peepreplace( FILE *fp, FormDict &globals, PeepMatch *pmatch, PeepConstraint *pconstraint, PeepReplace *preplace, int max_position ) { | |
1338 fprintf(fp, " // IF instructions and constraints matched\n"); | |
1339 fprintf(fp, " if( matches ) {\n"); | |
1340 fprintf(fp, " // generate the new sub-tree\n"); | |
1341 fprintf(fp, " assert( true, \"Debug stopping point\");\n"); | |
1342 if( preplace != NULL ) { | |
1343 // Get the root of the new sub-tree | |
1344 const char *root_inst = NULL; | |
1345 preplace->next_instruction(root_inst); | |
1346 InstructForm *root_form = globals[root_inst]->is_instruction(); | |
1347 assert( root_form != NULL, "Replacement instruction was not previously defined"); | |
1348 fprintf(fp, " %sNode *root = new (C) %sNode();\n", root_inst, root_inst); | |
1349 | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1350 int inst_num; |
0 | 1351 const char *op_name; |
1352 int opnds_index = 0; // define result operand | |
1353 // Then install the use-operands for the new sub-tree | |
1354 // preplace->reset(); // reset breaks iteration | |
1355 for( preplace->next_operand( inst_num, op_name ); | |
1356 op_name != NULL; | |
1357 preplace->next_operand( inst_num, op_name ) ) { | |
1358 InstructForm *inst_form; | |
1359 inst_form = globals[pmatch->instruction_name(inst_num)]->is_instruction(); | |
1360 assert( inst_form, "Parser should guaranty this is an instruction"); | |
1361 int inst_op_num = inst_form->operand_position(op_name, Component::USE); | |
1362 if( inst_op_num == NameList::Not_in_list ) | |
1363 inst_op_num = inst_form->operand_position(op_name, Component::USE_DEF); | |
1364 assert( inst_op_num != NameList::Not_in_list, "Did not find operand as USE"); | |
1365 // find the name of the OperandForm from the local name | |
1366 const Form *form = inst_form->_localNames[op_name]; | |
1367 OperandForm *op_form = form->is_operand(); | |
1368 if( opnds_index == 0 ) { | |
1369 // Initial setup of new instruction | |
1370 fprintf(fp, " // ----- Initial setup -----\n"); | |
1371 // | |
1372 // Add control edge for this node | |
1373 fprintf(fp, " root->add_req(_in[0]); // control edge\n"); | |
1374 // Add unmatched edges from root of match tree | |
1375 int op_base = root_form->oper_input_base(globals); | |
1376 for( int unmatched_edge = 1; unmatched_edge < op_base; ++unmatched_edge ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1377 fprintf(fp, " root->add_req(inst%d->in(%d)); // unmatched ideal edge\n", |
0 | 1378 inst_num, unmatched_edge); |
1379 } | |
1380 // If new instruction captures bottom type | |
1541
b5fdf39b9749
6953576: bottom_type for matched AddPNodes doesn't always agree with ideal
never
parents:
1489
diff
changeset
|
1381 if( root_form->captures_bottom_type(globals) ) { |
0 | 1382 // Get bottom type from instruction whose result we are replacing |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1383 fprintf(fp, " root->_bottom_type = inst%d->bottom_type();\n", inst_num); |
0 | 1384 } |
1385 // Define result register and result operand | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1386 fprintf(fp, " ra_->add_reference(root, inst%d);\n", inst_num); |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1387 fprintf(fp, " ra_->set_oop (root, ra_->is_oop(inst%d));\n", inst_num); |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1388 fprintf(fp, " ra_->set_pair(root->_idx, ra_->get_reg_second(inst%d), ra_->get_reg_first(inst%d));\n", inst_num, inst_num); |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1389 fprintf(fp, " root->_opnds[0] = inst%d->_opnds[0]->clone(C); // result\n", inst_num); |
0 | 1390 fprintf(fp, " // ----- Done with initial setup -----\n"); |
1391 } else { | |
1392 if( (op_form == NULL) || (op_form->is_base_constant(globals) == Form::none) ) { | |
1393 // Do not have ideal edges for constants after matching | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1394 fprintf(fp, " for( unsigned x%d = inst%d_idx%d; x%d < inst%d_idx%d; x%d++ )\n", |
0 | 1395 inst_op_num, inst_num, inst_op_num, |
1396 inst_op_num, inst_num, inst_op_num+1, inst_op_num ); | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1397 fprintf(fp, " root->add_req( inst%d->in(x%d) );\n", |
0 | 1398 inst_num, inst_op_num ); |
1399 } else { | |
1400 fprintf(fp, " // no ideal edge for constants after matching\n"); | |
1401 } | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1402 fprintf(fp, " root->_opnds[%d] = inst%d->_opnds[%d]->clone(C);\n", |
0 | 1403 opnds_index, inst_num, inst_op_num ); |
1404 } | |
1405 ++opnds_index; | |
1406 } | |
1407 }else { | |
1408 // Replacing subtree with empty-tree | |
1409 assert( false, "ShouldNotReachHere();"); | |
1410 } | |
1411 | |
1412 // Return the new sub-tree | |
1413 fprintf(fp, " deleted = %d;\n", max_position+1 /*zero to one based*/); | |
1414 fprintf(fp, " return root; // return new root;\n"); | |
1415 fprintf(fp, " }\n"); | |
1416 } | |
1417 | |
1418 | |
1419 // Define the Peephole method for an instruction node | |
1420 void ArchDesc::definePeephole(FILE *fp, InstructForm *node) { | |
1421 // Generate Peephole function header | |
1422 fprintf(fp, "MachNode *%sNode::peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ) {\n", node->_ident); | |
1423 fprintf(fp, " bool matches = true;\n"); | |
1424 | |
1425 // Identify the maximum instruction position, | |
1426 // generate temporaries that hold current instruction | |
1427 // | |
1428 // MachNode *inst0 = NULL; | |
1429 // ... | |
1430 // MachNode *instMAX = NULL; | |
1431 // | |
1432 int max_position = 0; | |
1433 Peephole *peep; | |
1434 for( peep = node->peepholes(); peep != NULL; peep = peep->next() ) { | |
1435 PeepMatch *pmatch = peep->match(); | |
1436 assert( pmatch != NULL, "fatal(), missing peepmatch rule"); | |
1437 if( max_position < pmatch->max_position() ) max_position = pmatch->max_position(); | |
1438 } | |
1439 for( int i = 0; i <= max_position; ++i ) { | |
1440 if( i == 0 ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1441 fprintf(fp, " MachNode *inst0 = this;\n"); |
0 | 1442 } else { |
1443 fprintf(fp, " MachNode *inst%d = NULL;\n", i); | |
1444 } | |
1445 } | |
1446 | |
1447 // For each peephole rule in architecture description | |
1448 // Construct a test for the desired instruction sub-tree | |
1449 // then check the constraints | |
1450 // If these match, Generate the new subtree | |
1451 for( peep = node->peepholes(); peep != NULL; peep = peep->next() ) { | |
1452 int peephole_number = peep->peephole_number(); | |
1453 PeepMatch *pmatch = peep->match(); | |
1454 PeepConstraint *pconstraint = peep->constraints(); | |
1455 PeepReplace *preplace = peep->replacement(); | |
1456 | |
1457 // Root of this peephole is the current MachNode | |
1458 assert( true, // %%name?%% strcmp( node->_ident, pmatch->name(0) ) == 0, | |
1459 "root of PeepMatch does not match instruction"); | |
1460 | |
1461 // Make each peephole rule individually selectable | |
1462 fprintf(fp, " if( (OptoPeepholeAt == -1) || (OptoPeepholeAt==%d) ) {\n", peephole_number); | |
1463 fprintf(fp, " matches = true;\n"); | |
1464 // Scan the peepmatch and output a test for each instruction | |
1465 check_peepmatch_instruction_sequence( fp, pmatch, pconstraint ); | |
1466 | |
1467 // Check constraints and build replacement inside scope | |
1468 fprintf(fp, " // If instruction subtree matches\n"); | |
1469 fprintf(fp, " if( matches ) {\n"); | |
1470 | |
1471 // Generate tests for the constraints | |
1472 check_peepconstraints( fp, _globalNames, pmatch, pconstraint ); | |
1473 | |
1474 // Construct the new sub-tree | |
1475 generate_peepreplace( fp, _globalNames, pmatch, pconstraint, preplace, max_position ); | |
1476 | |
1477 // End of scope for this peephole's constraints | |
1478 fprintf(fp, " }\n"); | |
1479 // Closing brace '}' to make each peephole rule individually selectable | |
1480 fprintf(fp, " } // end of peephole rule #%d\n", peephole_number); | |
1481 fprintf(fp, "\n"); | |
1482 } | |
1483 | |
1484 fprintf(fp, " return NULL; // No peephole rules matched\n"); | |
1485 fprintf(fp, "}\n"); | |
1486 fprintf(fp, "\n"); | |
1487 } | |
1488 | |
1489 // Define the Expand method for an instruction node | |
1490 void ArchDesc::defineExpand(FILE *fp, InstructForm *node) { | |
1491 unsigned cnt = 0; // Count nodes we have expand into | |
1492 unsigned i; | |
1493 | |
1494 // Generate Expand function header | |
2008 | 1495 fprintf(fp, "MachNode* %sNode::Expand(State* state, Node_List& proj_list, Node* mem) {\n", node->_ident); |
1496 fprintf(fp, " Compile* C = Compile::current();\n"); | |
0 | 1497 // Generate expand code |
1498 if( node->expands() ) { | |
1499 const char *opid; | |
1500 int new_pos, exp_pos; | |
1501 const char *new_id = NULL; | |
1502 const Form *frm = NULL; | |
1503 InstructForm *new_inst = NULL; | |
1504 OperandForm *new_oper = NULL; | |
1505 unsigned numo = node->num_opnds() + | |
1506 node->_exprule->_newopers.count(); | |
1507 | |
1508 // If necessary, generate any operands created in expand rule | |
1509 if (node->_exprule->_newopers.count()) { | |
1510 for(node->_exprule->_newopers.reset(); | |
1511 (new_id = node->_exprule->_newopers.iter()) != NULL; cnt++) { | |
1512 frm = node->_localNames[new_id]; | |
1513 assert(frm, "Invalid entry in new operands list of expand rule"); | |
1514 new_oper = frm->is_operand(); | |
1515 char *tmp = (char *)node->_exprule->_newopconst[new_id]; | |
1516 if (tmp == NULL) { | |
1517 fprintf(fp," MachOper *op%d = new (C) %sOper();\n", | |
1518 cnt, new_oper->_ident); | |
1519 } | |
1520 else { | |
1521 fprintf(fp," MachOper *op%d = new (C) %sOper(%s);\n", | |
1522 cnt, new_oper->_ident, tmp); | |
1523 } | |
1524 } | |
1525 } | |
1526 cnt = 0; | |
1527 // Generate the temps to use for DAG building | |
1528 for(i = 0; i < numo; i++) { | |
1529 if (i < node->num_opnds()) { | |
1530 fprintf(fp," MachNode *tmp%d = this;\n", i); | |
1531 } | |
1532 else { | |
1533 fprintf(fp," MachNode *tmp%d = NULL;\n", i); | |
1534 } | |
1535 } | |
1536 // Build mapping from num_edges to local variables | |
1537 fprintf(fp," unsigned num0 = 0;\n"); | |
1538 for( i = 1; i < node->num_opnds(); i++ ) { | |
1539 fprintf(fp," unsigned num%d = opnd_array(%d)->num_edges();\n",i,i); | |
1540 } | |
1541 | |
1542 // Build a mapping from operand index to input edges | |
1543 fprintf(fp," unsigned idx0 = oper_input_base();\n"); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1544 |
1203 | 1545 // The order in which the memory input is added to a node is very |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1546 // strange. Store nodes get a memory input before Expand is |
1203 | 1547 // called and other nodes get it afterwards or before depending on |
1548 // match order so oper_input_base is wrong during expansion. This | |
1549 // code adjusts it so that expansion will work correctly. | |
1550 int has_memory_edge = node->_matrule->needs_ideal_memory_edge(_globalNames); | |
1551 if (has_memory_edge) { | |
1552 fprintf(fp," if (mem == (Node*)1) {\n"); | |
1553 fprintf(fp," idx0--; // Adjust base because memory edge hasn't been inserted yet\n"); | |
1554 fprintf(fp," }\n"); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1555 } |
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1556 |
0 | 1557 for( i = 0; i < node->num_opnds(); i++ ) { |
1558 fprintf(fp," unsigned idx%d = idx%d + num%d;\n", | |
1559 i+1,i,i); | |
1560 } | |
1561 | |
1562 // Declare variable to hold root of expansion | |
1563 fprintf(fp," MachNode *result = NULL;\n"); | |
1564 | |
1565 // Iterate over the instructions 'node' expands into | |
1566 ExpandRule *expand = node->_exprule; | |
1567 NameAndList *expand_instr = NULL; | |
1568 for(expand->reset_instructions(); | |
1569 (expand_instr = expand->iter_instructions()) != NULL; cnt++) { | |
1570 new_id = expand_instr->name(); | |
1571 | |
1572 InstructForm* expand_instruction = (InstructForm*)globalAD->globalNames()[new_id]; | |
1573 if (expand_instruction->has_temps()) { | |
1574 globalAD->syntax_err(node->_linenum, "In %s: expand rules using instructs with TEMPs aren't supported: %s", | |
1575 node->_ident, new_id); | |
1576 } | |
1577 | |
1578 // Build the node for the instruction | |
1579 fprintf(fp,"\n %sNode *n%d = new (C) %sNode();\n", new_id, cnt, new_id); | |
1580 // Add control edge for this node | |
1581 fprintf(fp," n%d->add_req(_in[0]);\n", cnt); | |
1582 // Build the operand for the value this node defines. | |
1583 Form *form = (Form*)_globalNames[new_id]; | |
1584 assert( form, "'new_id' must be a defined form name"); | |
1585 // Grab the InstructForm for the new instruction | |
1586 new_inst = form->is_instruction(); | |
1587 assert( new_inst, "'new_id' must be an instruction name"); | |
1588 if( node->is_ideal_if() && new_inst->is_ideal_if() ) { | |
1589 fprintf(fp, " ((MachIfNode*)n%d)->_prob = _prob;\n",cnt); | |
1590 fprintf(fp, " ((MachIfNode*)n%d)->_fcnt = _fcnt;\n",cnt); | |
1591 } | |
1592 | |
1593 if( node->is_ideal_fastlock() && new_inst->is_ideal_fastlock() ) { | |
1594 fprintf(fp, " ((MachFastLockNode*)n%d)->_counters = _counters;\n",cnt); | |
1595 } | |
1596 | |
6802
0702f188baeb
7200233: C2: can't use expand rules for vector instruction rules
kvn
parents:
6725
diff
changeset
|
1597 // Fill in the bottom_type where requested |
0702f188baeb
7200233: C2: can't use expand rules for vector instruction rules
kvn
parents:
6725
diff
changeset
|
1598 if (node->captures_bottom_type(_globalNames) && |
0702f188baeb
7200233: C2: can't use expand rules for vector instruction rules
kvn
parents:
6725
diff
changeset
|
1599 new_inst->captures_bottom_type(_globalNames)) { |
0702f188baeb
7200233: C2: can't use expand rules for vector instruction rules
kvn
parents:
6725
diff
changeset
|
1600 fprintf(fp, " ((MachTypeNode*)n%d)->_bottom_type = bottom_type();\n", cnt); |
0702f188baeb
7200233: C2: can't use expand rules for vector instruction rules
kvn
parents:
6725
diff
changeset
|
1601 } |
0702f188baeb
7200233: C2: can't use expand rules for vector instruction rules
kvn
parents:
6725
diff
changeset
|
1602 |
0 | 1603 const char *resultOper = new_inst->reduce_result(); |
1604 fprintf(fp," n%d->set_opnd_array(0, state->MachOperGenerator( %s, C ));\n", | |
1605 cnt, machOperEnum(resultOper)); | |
1606 | |
1607 // get the formal operand NameList | |
1608 NameList *formal_lst = &new_inst->_parameters; | |
1609 formal_lst->reset(); | |
1610 | |
1611 // Handle any memory operand | |
1612 int memory_operand = new_inst->memory_operand(_globalNames); | |
1613 if( memory_operand != InstructForm::NO_MEMORY_OPERAND ) { | |
1614 int node_mem_op = node->memory_operand(_globalNames); | |
1615 assert( node_mem_op != InstructForm::NO_MEMORY_OPERAND, | |
1616 "expand rule member needs memory but top-level inst doesn't have any" ); | |
1203 | 1617 if (has_memory_edge) { |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1618 // Copy memory edge |
1203 | 1619 fprintf(fp," if (mem != (Node*)1) {\n"); |
1620 fprintf(fp," n%d->add_req(_in[1]);\t// Add memory edge\n", cnt); | |
1621 fprintf(fp," }\n"); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1622 } |
0 | 1623 } |
1624 | |
1625 // Iterate over the new instruction's operands | |
415
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1626 int prev_pos = -1; |
0 | 1627 for( expand_instr->reset(); (opid = expand_instr->iter()) != NULL; ) { |
1628 // Use 'parameter' at current position in list of new instruction's formals | |
1629 // instead of 'opid' when looking up info internal to new_inst | |
1630 const char *parameter = formal_lst->iter(); | |
1631 // Check for an operand which is created in the expand rule | |
1632 if ((exp_pos = node->_exprule->_newopers.index(opid)) != -1) { | |
1633 new_pos = new_inst->operand_position(parameter,Component::USE); | |
1634 exp_pos += node->num_opnds(); | |
1635 // If there is no use of the created operand, just skip it | |
6850 | 1636 if (new_pos != NameList::Not_in_list) { |
0 | 1637 //Copy the operand from the original made above |
1638 fprintf(fp," n%d->set_opnd_array(%d, op%d->clone(C)); // %s\n", | |
1639 cnt, new_pos, exp_pos-node->num_opnds(), opid); | |
1640 // Check for who defines this operand & add edge if needed | |
1641 fprintf(fp," if(tmp%d != NULL)\n", exp_pos); | |
1642 fprintf(fp," n%d->add_req(tmp%d);\n", cnt, exp_pos); | |
1643 } | |
1644 } | |
1645 else { | |
1646 // Use operand name to get an index into instruction component list | |
1647 // ins = (InstructForm *) _globalNames[new_id]; | |
1648 exp_pos = node->operand_position_format(opid); | |
1649 assert(exp_pos != -1, "Bad expand rule"); | |
415
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1650 if (prev_pos > exp_pos && expand_instruction->_matrule != NULL) { |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1651 // For the add_req calls below to work correctly they need |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1652 // to added in the same order that a match would add them. |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1653 // This means that they would need to be in the order of |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1654 // the components list instead of the formal parameters. |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1655 // This is a sort of hidden invariant that previously |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1656 // wasn't checked and could lead to incorrectly |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1657 // constructed nodes. |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1658 syntax_err(node->_linenum, "For expand in %s to work, parameter declaration order in %s must follow matchrule\n", |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1659 node->_ident, new_inst->_ident); |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1660 } |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1661 prev_pos = exp_pos; |
0 | 1662 |
1663 new_pos = new_inst->operand_position(parameter,Component::USE); | |
1664 if (new_pos != -1) { | |
1665 // Copy the operand from the ExpandNode to the new node | |
1666 fprintf(fp," n%d->set_opnd_array(%d, opnd_array(%d)->clone(C)); // %s\n", | |
1667 cnt, new_pos, exp_pos, opid); | |
1668 // For each operand add appropriate input edges by looking at tmp's | |
1669 fprintf(fp," if(tmp%d == this) {\n", exp_pos); | |
1670 // Grab corresponding edges from ExpandNode and insert them here | |
1671 fprintf(fp," for(unsigned i = 0; i < num%d; i++) {\n", exp_pos); | |
1672 fprintf(fp," n%d->add_req(_in[i + idx%d]);\n", cnt, exp_pos); | |
1673 fprintf(fp," }\n"); | |
1674 fprintf(fp," }\n"); | |
1675 // This value is generated by one of the new instructions | |
1676 fprintf(fp," else n%d->add_req(tmp%d);\n", cnt, exp_pos); | |
1677 } | |
1678 } | |
1679 | |
1680 // Update the DAG tmp's for values defined by this instruction | |
1681 int new_def_pos = new_inst->operand_position(parameter,Component::DEF); | |
1682 Effect *eform = (Effect *)new_inst->_effects[parameter]; | |
1683 // If this operand is a definition in either an effects rule | |
1684 // or a match rule | |
1685 if((eform) && (is_def(eform->_use_def))) { | |
1686 // Update the temp associated with this operand | |
1687 fprintf(fp," tmp%d = n%d;\n", exp_pos, cnt); | |
1688 } | |
1689 else if( new_def_pos != -1 ) { | |
1690 // Instruction defines a value but user did not declare it | |
1691 // in the 'effect' clause | |
1692 fprintf(fp," tmp%d = n%d;\n", exp_pos, cnt); | |
1693 } | |
1694 } // done iterating over a new instruction's operands | |
1695 | |
1696 // Invoke Expand() for the newly created instruction. | |
1203 | 1697 fprintf(fp," result = n%d->Expand( state, proj_list, mem );\n", cnt); |
0 | 1698 assert( !new_inst->expands(), "Do not have complete support for recursive expansion"); |
1699 } // done iterating over new instructions | |
1700 fprintf(fp,"\n"); | |
1701 } // done generating expand rule | |
1702 | |
2254
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1703 // Generate projections for instruction's additional DEFs and KILLs |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1704 if( ! node->expands() && (node->needs_projections() || node->has_temps())) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1705 // Get string representing the MachNode that projections point at |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1706 const char *machNode = "this"; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1707 // Generate the projections |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1708 fprintf(fp," // Add projection edges for additional defs or kills\n"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1709 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1710 // Examine each component to see if it is a DEF or KILL |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1711 node->_components.reset(); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1712 // Skip the first component, if already handled as (SET dst (...)) |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1713 Component *comp = NULL; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1714 // For kills, the choice of projection numbers is arbitrary |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1715 int proj_no = 1; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1716 bool declared_def = false; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1717 bool declared_kill = false; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1718 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1719 while( (comp = node->_components.iter()) != NULL ) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1720 // Lookup register class associated with operand type |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1721 Form *form = (Form*)_globalNames[comp->_type]; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1722 assert( form, "component type must be a defined form"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1723 OperandForm *op = form->is_operand(); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1724 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1725 if (comp->is(Component::TEMP)) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1726 fprintf(fp, " // TEMP %s\n", comp->_name); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1727 if (!declared_def) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1728 // Define the variable "def" to hold new MachProjNodes |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1729 fprintf(fp, " MachTempNode *def;\n"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1730 declared_def = true; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1731 } |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1732 if (op && op->_interface && op->_interface->is_RegInterface()) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1733 fprintf(fp," def = new (C) MachTempNode(state->MachOperGenerator( %s, C ));\n", |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1734 machOperEnum(op->_ident)); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1735 fprintf(fp," add_req(def);\n"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1736 // The operand for TEMP is already constructed during |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1737 // this mach node construction, see buildMachNode(). |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1738 // |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1739 // int idx = node->operand_position_format(comp->_name); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1740 // fprintf(fp," set_opnd_array(%d, state->MachOperGenerator( %s, C ));\n", |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1741 // idx, machOperEnum(op->_ident)); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1742 } else { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1743 assert(false, "can't have temps which aren't registers"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1744 } |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1745 } else if (comp->isa(Component::KILL)) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1746 fprintf(fp, " // DEF/KILL %s\n", comp->_name); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1747 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1748 if (!declared_kill) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1749 // Define the variable "kill" to hold new MachProjNodes |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1750 fprintf(fp, " MachProjNode *kill;\n"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1751 declared_kill = true; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1752 } |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1753 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1754 assert( op, "Support additional KILLS for base operands"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1755 const char *regmask = reg_mask(*op); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1756 const char *ideal_type = op->ideal_type(_globalNames, _register); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1757 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1758 if (!op->is_bound_register()) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1759 syntax_err(node->_linenum, "In %s only bound registers can be killed: %s %s\n", |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1760 node->_ident, comp->_type, comp->_name); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1761 } |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1762 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1763 fprintf(fp," kill = "); |
6804
e626685e9f6c
7193318: C2: remove number of inputs requirement from Node's new operator
kvn
parents:
6802
diff
changeset
|
1764 fprintf(fp,"new (C) MachProjNode( %s, %d, (%s), Op_%s );\n", |
2254
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1765 machNode, proj_no++, regmask, ideal_type); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1766 fprintf(fp," proj_list.push(kill);\n"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1767 } |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1768 } |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1769 } |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1770 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1771 if( !node->expands() && node->_matrule != NULL ) { |
0 | 1772 // Remove duplicated operands and inputs which use the same name. |
1773 // Seach through match operands for the same name usage. | |
1774 uint cur_num_opnds = node->num_opnds(); | |
1775 if( cur_num_opnds > 1 && cur_num_opnds != node->num_unique_opnds() ) { | |
1776 Component *comp = NULL; | |
1777 // Build mapping from num_edges to local variables | |
1778 fprintf(fp," unsigned num0 = 0;\n"); | |
1779 for( i = 1; i < cur_num_opnds; i++ ) { | |
6850 | 1780 fprintf(fp," unsigned num%d = opnd_array(%d)->num_edges();",i,i); |
1781 fprintf(fp, " \t// %s\n", node->opnd_ident(i)); | |
0 | 1782 } |
1783 // Build a mapping from operand index to input edges | |
1784 fprintf(fp," unsigned idx0 = oper_input_base();\n"); | |
1785 for( i = 0; i < cur_num_opnds; i++ ) { | |
1786 fprintf(fp," unsigned idx%d = idx%d + num%d;\n", | |
1787 i+1,i,i); | |
1788 } | |
1789 | |
1790 uint new_num_opnds = 1; | |
1791 node->_components.reset(); | |
1792 // Skip first unique operands. | |
1793 for( i = 1; i < cur_num_opnds; i++ ) { | |
1794 comp = node->_components.iter(); | |
10389 | 1795 if (i != node->unique_opnds_idx(i)) { |
0 | 1796 break; |
1797 } | |
1798 new_num_opnds++; | |
1799 } | |
1800 // Replace not unique operands with next unique operands. | |
1801 for( ; i < cur_num_opnds; i++ ) { | |
1802 comp = node->_components.iter(); | |
10389 | 1803 uint j = node->unique_opnds_idx(i); |
0 | 1804 // unique_opnds_idx(i) is unique if unique_opnds_idx(j) is not unique. |
1805 if( j != node->unique_opnds_idx(j) ) { | |
1806 fprintf(fp," set_opnd_array(%d, opnd_array(%d)->clone(C)); // %s\n", | |
1807 new_num_opnds, i, comp->_name); | |
1808 // delete not unique edges here | |
1809 fprintf(fp," for(unsigned i = 0; i < num%d; i++) {\n", i); | |
1810 fprintf(fp," set_req(i + idx%d, _in[i + idx%d]);\n", new_num_opnds, i); | |
1811 fprintf(fp," }\n"); | |
1812 fprintf(fp," num%d = num%d;\n", new_num_opnds, i); | |
1813 fprintf(fp," idx%d = idx%d + num%d;\n", new_num_opnds+1, new_num_opnds, new_num_opnds); | |
1814 new_num_opnds++; | |
1815 } | |
1816 } | |
1817 // delete the rest of edges | |
1818 fprintf(fp," for(int i = idx%d - 1; i >= (int)idx%d; i--) {\n", cur_num_opnds, new_num_opnds); | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1819 fprintf(fp," del_req(i);\n"); |
0 | 1820 fprintf(fp," }\n"); |
1821 fprintf(fp," _num_opnds = %d;\n", new_num_opnds); | |
785 | 1822 assert(new_num_opnds == node->num_unique_opnds(), "what?"); |
0 | 1823 } |
1824 } | |
1825 | |
2008 | 1826 // If the node is a MachConstantNode, insert the MachConstantBaseNode edge. |
1827 // NOTE: this edge must be the last input (see MachConstantNode::mach_constant_base_node_input). | |
1828 if (node->is_mach_constant()) { | |
1829 fprintf(fp," add_req(C->mach_constant_base_node());\n"); | |
1830 } | |
1831 | |
0 | 1832 fprintf(fp,"\n"); |
1833 if( node->expands() ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1834 fprintf(fp," return result;\n"); |
0 | 1835 } else { |
1836 fprintf(fp," return this;\n"); | |
1837 } | |
1838 fprintf(fp,"}\n"); | |
1839 fprintf(fp,"\n"); | |
1840 } | |
1841 | |
1842 | |
1843 //------------------------------Emit Routines---------------------------------- | |
1844 // Special classes and routines for defining node emit routines which output | |
1845 // target specific instruction object encodings. | |
1846 // Define the ___Node::emit() routine | |
1847 // | |
1848 // (1) void ___Node::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { | |
1849 // (2) // ... encoding defined by user | |
1850 // (3) | |
1851 // (4) } | |
1852 // | |
1853 | |
1854 class DefineEmitState { | |
1855 private: | |
1856 enum reloc_format { RELOC_NONE = -1, | |
1857 RELOC_IMMEDIATE = 0, | |
1858 RELOC_DISP = 1, | |
1859 RELOC_CALL_DISP = 2 }; | |
1860 enum literal_status{ LITERAL_NOT_SEEN = 0, | |
1861 LITERAL_SEEN = 1, | |
1862 LITERAL_ACCESSED = 2, | |
1863 LITERAL_OUTPUT = 3 }; | |
1864 // Temporaries that describe current operand | |
1865 bool _cleared; | |
1866 OpClassForm *_opclass; | |
1867 OperandForm *_operand; | |
1868 int _operand_idx; | |
1869 const char *_local_name; | |
1870 const char *_operand_name; | |
1871 bool _doing_disp; | |
1872 bool _doing_constant; | |
1873 Form::DataType _constant_type; | |
1874 DefineEmitState::literal_status _constant_status; | |
1875 DefineEmitState::literal_status _reg_status; | |
1876 bool _doing_emit8; | |
1877 bool _doing_emit_d32; | |
1878 bool _doing_emit_d16; | |
1879 bool _doing_emit_hi; | |
1880 bool _doing_emit_lo; | |
1881 bool _may_reloc; | |
1882 reloc_format _reloc_form; | |
1883 const char * _reloc_type; | |
1884 bool _processing_noninput; | |
1885 | |
1886 NameList _strings_to_emit; | |
1887 | |
1888 // Stable state, set by constructor | |
1889 ArchDesc &_AD; | |
1890 FILE *_fp; | |
1891 EncClass &_encoding; | |
1892 InsEncode &_ins_encode; | |
1893 InstructForm &_inst; | |
1894 | |
1895 public: | |
1896 DefineEmitState(FILE *fp, ArchDesc &AD, EncClass &encoding, | |
1897 InsEncode &ins_encode, InstructForm &inst) | |
1898 : _AD(AD), _fp(fp), _encoding(encoding), _ins_encode(ins_encode), _inst(inst) { | |
1899 clear(); | |
1900 } | |
1901 | |
1902 void clear() { | |
1903 _cleared = true; | |
1904 _opclass = NULL; | |
1905 _operand = NULL; | |
1906 _operand_idx = 0; | |
1907 _local_name = ""; | |
1908 _operand_name = ""; | |
1909 _doing_disp = false; | |
1910 _doing_constant= false; | |
1911 _constant_type = Form::none; | |
1912 _constant_status = LITERAL_NOT_SEEN; | |
1913 _reg_status = LITERAL_NOT_SEEN; | |
1914 _doing_emit8 = false; | |
1915 _doing_emit_d32= false; | |
1916 _doing_emit_d16= false; | |
1917 _doing_emit_hi = false; | |
1918 _doing_emit_lo = false; | |
1919 _may_reloc = false; | |
1920 _reloc_form = RELOC_NONE; | |
1921 _reloc_type = AdlcVMDeps::none_reloc_type(); | |
1922 _strings_to_emit.clear(); | |
1923 } | |
1924 | |
1925 // Track necessary state when identifying a replacement variable | |
6850 | 1926 // @arg rep_var: The formal parameter of the encoding. |
0 | 1927 void update_state(const char *rep_var) { |
1928 // A replacement variable or one of its subfields | |
1929 // Obtain replacement variable from list | |
1930 if ( (*rep_var) != '$' ) { | |
1931 // A replacement variable, '$' prefix | |
1932 // check_rep_var( rep_var ); | |
1933 if ( Opcode::as_opcode_type(rep_var) != Opcode::NOT_AN_OPCODE ) { | |
1934 // No state needed. | |
1935 assert( _opclass == NULL, | |
1936 "'primary', 'secondary' and 'tertiary' don't follow operand."); | |
2008 | 1937 } |
1938 else if ((strcmp(rep_var, "constanttablebase") == 0) || | |
1939 (strcmp(rep_var, "constantoffset") == 0) || | |
1940 (strcmp(rep_var, "constantaddress") == 0)) { | |
1941 if (!_inst.is_mach_constant()) { | |
1942 _AD.syntax_err(_encoding._linenum, | |
1943 "Replacement variable %s not allowed in instruct %s (only in MachConstantNode).\n", | |
1944 rep_var, _encoding._name); | |
1945 } | |
1946 } | |
1947 else { | |
6850 | 1948 // Lookup its position in (formal) parameter list of encoding |
0 | 1949 int param_no = _encoding.rep_var_index(rep_var); |
1950 if ( param_no == -1 ) { | |
1951 _AD.syntax_err( _encoding._linenum, | |
1952 "Replacement variable %s not found in enc_class %s.\n", | |
1953 rep_var, _encoding._name); | |
1954 } | |
1955 | |
1956 // Lookup the corresponding ins_encode parameter | |
6850 | 1957 // This is the argument (actual parameter) to the encoding. |
0 | 1958 const char *inst_rep_var = _ins_encode.rep_var_name(_inst, param_no); |
1959 if (inst_rep_var == NULL) { | |
1960 _AD.syntax_err( _ins_encode._linenum, | |
1961 "Parameter %s not passed to enc_class %s from instruct %s.\n", | |
1962 rep_var, _encoding._name, _inst._ident); | |
1963 } | |
1964 | |
1965 // Check if instruction's actual parameter is a local name in the instruction | |
1966 const Form *local = _inst._localNames[inst_rep_var]; | |
1967 OpClassForm *opc = (local != NULL) ? local->is_opclass() : NULL; | |
1968 // Note: assert removed to allow constant and symbolic parameters | |
1969 // assert( opc, "replacement variable was not found in local names"); | |
1970 // Lookup the index position iff the replacement variable is a localName | |
1971 int idx = (opc != NULL) ? _inst.operand_position_format(inst_rep_var) : -1; | |
1972 | |
1973 if ( idx != -1 ) { | |
1974 // This is a local in the instruction | |
1975 // Update local state info. | |
1976 _opclass = opc; | |
1977 _operand_idx = idx; | |
1978 _local_name = rep_var; | |
1979 _operand_name = inst_rep_var; | |
1980 | |
1981 // !!!!! | |
1982 // Do not support consecutive operands. | |
1983 assert( _operand == NULL, "Unimplemented()"); | |
1984 _operand = opc->is_operand(); | |
1985 } | |
1986 else if( ADLParser::is_literal_constant(inst_rep_var) ) { | |
1987 // Instruction provided a constant expression | |
1988 // Check later that encoding specifies $$$constant to resolve as constant | |
1989 _constant_status = LITERAL_SEEN; | |
1990 } | |
1991 else if( Opcode::as_opcode_type(inst_rep_var) != Opcode::NOT_AN_OPCODE ) { | |
1992 // Instruction provided an opcode: "primary", "secondary", "tertiary" | |
1993 // Check later that encoding specifies $$$constant to resolve as constant | |
1994 _constant_status = LITERAL_SEEN; | |
1995 } | |
1996 else if((_AD.get_registers() != NULL ) && (_AD.get_registers()->getRegDef(inst_rep_var) != NULL)) { | |
1997 // Instruction provided a literal register name for this parameter | |
1998 // Check that encoding specifies $$$reg to resolve.as register. | |
1999 _reg_status = LITERAL_SEEN; | |
2000 } | |
2001 else { | |
2002 // Check for unimplemented functionality before hard failure | |
2003 assert( strcmp(opc->_ident,"label")==0, "Unimplemented() Label"); | |
2004 assert( false, "ShouldNotReachHere()"); | |
2005 } | |
2006 } // done checking which operand this is. | |
2007 } else { | |
2008 // | |
2009 // A subfield variable, '$$' prefix | |
2010 // Check for fields that may require relocation information. | |
2011 // Then check that literal register parameters are accessed with 'reg' or 'constant' | |
2012 // | |
2013 if ( strcmp(rep_var,"$disp") == 0 ) { | |
2014 _doing_disp = true; | |
2015 assert( _opclass, "Must use operand or operand class before '$disp'"); | |
2016 if( _operand == NULL ) { | |
2017 // Only have an operand class, generate run-time check for relocation | |
2018 _may_reloc = true; | |
2019 _reloc_form = RELOC_DISP; | |
2020 _reloc_type = AdlcVMDeps::oop_reloc_type(); | |
2021 } else { | |
2022 // Do precise check on operand: is it a ConP or not | |
2023 // | |
2024 // Check interface for value of displacement | |
2025 assert( ( _operand->_interface != NULL ), | |
2026 "$disp can only follow memory interface operand"); | |
2027 MemInterface *mem_interface= _operand->_interface->is_MemInterface(); | |
2028 assert( mem_interface != NULL, | |
2029 "$disp can only follow memory interface operand"); | |
2030 const char *disp = mem_interface->_disp; | |
2031 | |
2032 if( disp != NULL && (*disp == '$') ) { | |
2033 // MemInterface::disp contains a replacement variable, | |
2034 // Check if this matches a ConP | |
2035 // | |
2036 // Lookup replacement variable, in operand's component list | |
2037 const char *rep_var_name = disp + 1; // Skip '$' | |
2038 const Component *comp = _operand->_components.search(rep_var_name); | |
2039 assert( comp != NULL,"Replacement variable not found in components"); | |
2040 const char *type = comp->_type; | |
2041 // Lookup operand form for replacement variable's type | |
2042 const Form *form = _AD.globalNames()[type]; | |
2043 assert( form != NULL, "Replacement variable's type not found"); | |
2044 OperandForm *op = form->is_operand(); | |
2045 assert( op, "Attempting to emit a non-register or non-constant"); | |
2046 // Check if this is a constant | |
2047 if (op->_matrule && op->_matrule->is_base_constant(_AD.globalNames())) { | |
2048 // Check which constant this name maps to: _c0, _c1, ..., _cn | |
2049 // const int idx = _operand.constant_position(_AD.globalNames(), comp); | |
2050 // assert( idx != -1, "Constant component not found in operand"); | |
2051 Form::DataType dtype = op->is_base_constant(_AD.globalNames()); | |
2052 if ( dtype == Form::idealP ) { | |
2053 _may_reloc = true; | |
2054 // No longer true that idealP is always an oop | |
2055 _reloc_form = RELOC_DISP; | |
2056 _reloc_type = AdlcVMDeps::oop_reloc_type(); | |
2057 } | |
2058 } | |
2059 | |
2060 else if( _operand->is_user_name_for_sReg() != Form::none ) { | |
2061 // The only non-constant allowed access to disp is an operand sRegX in a stackSlotX | |
2062 assert( op->ideal_to_sReg_type(type) != Form::none, "StackSlots access displacements using 'sRegs'"); | |
2063 _may_reloc = false; | |
2064 } else { | |
2065 assert( false, "fatal(); Only stackSlots can access a non-constant using 'disp'"); | |
2066 } | |
2067 } | |
2068 } // finished with precise check of operand for relocation. | |
2069 } // finished with subfield variable | |
2070 else if ( strcmp(rep_var,"$constant") == 0 ) { | |
2071 _doing_constant = true; | |
2072 if ( _constant_status == LITERAL_NOT_SEEN ) { | |
2073 // Check operand for type of constant | |
2074 assert( _operand, "Must use operand before '$$constant'"); | |
2075 Form::DataType dtype = _operand->is_base_constant(_AD.globalNames()); | |
2076 _constant_type = dtype; | |
2077 if ( dtype == Form::idealP ) { | |
2078 _may_reloc = true; | |
2079 // No longer true that idealP is always an oop | |
2080 // // _must_reloc = true; | |
2081 _reloc_form = RELOC_IMMEDIATE; | |
2082 _reloc_type = AdlcVMDeps::oop_reloc_type(); | |
2083 } else { | |
2084 // No relocation information needed | |
2085 } | |
2086 } else { | |
2087 // User-provided literals may not require relocation information !!!!! | |
2088 assert( _constant_status == LITERAL_SEEN, "Must know we are processing a user-provided literal"); | |
2089 } | |
2090 } | |
2091 else if ( strcmp(rep_var,"$label") == 0 ) { | |
2092 // Calls containing labels require relocation | |
2093 if ( _inst.is_ideal_call() ) { | |
2094 _may_reloc = true; | |
2095 // !!!!! !!!!! | |
2096 _reloc_type = AdlcVMDeps::none_reloc_type(); | |
2097 } | |
2098 } | |
2099 | |
2100 // literal register parameter must be accessed as a 'reg' field. | |
2101 if ( _reg_status != LITERAL_NOT_SEEN ) { | |
2102 assert( _reg_status == LITERAL_SEEN, "Must have seen register literal before now"); | |
2103 if (strcmp(rep_var,"$reg") == 0 || reg_conversion(rep_var) != NULL) { | |
2104 _reg_status = LITERAL_ACCESSED; | |
2105 } else { | |
2106 assert( false, "invalid access to literal register parameter"); | |
2107 } | |
2108 } | |
2109 // literal constant parameters must be accessed as a 'constant' field | |
2110 if ( _constant_status != LITERAL_NOT_SEEN ) { | |
2111 assert( _constant_status == LITERAL_SEEN, "Must have seen constant literal before now"); | |
2112 if( strcmp(rep_var,"$constant") == 0 ) { | |
2113 _constant_status = LITERAL_ACCESSED; | |
2114 } else { | |
2115 assert( false, "invalid access to literal constant parameter"); | |
2116 } | |
2117 } | |
2118 } // end replacement and/or subfield | |
2119 | |
2120 } | |
2121 | |
2122 void add_rep_var(const char *rep_var) { | |
2123 // Handle subfield and replacement variables. | |
2124 if ( ( *rep_var == '$' ) && ( *(rep_var+1) == '$' ) ) { | |
2125 // Check for emit prefix, '$$emit32' | |
2126 assert( _cleared, "Can not nest $$$emit32"); | |
2127 if ( strcmp(rep_var,"$$emit32") == 0 ) { | |
2128 _doing_emit_d32 = true; | |
2129 } | |
2130 else if ( strcmp(rep_var,"$$emit16") == 0 ) { | |
2131 _doing_emit_d16 = true; | |
2132 } | |
2133 else if ( strcmp(rep_var,"$$emit_hi") == 0 ) { | |
2134 _doing_emit_hi = true; | |
2135 } | |
2136 else if ( strcmp(rep_var,"$$emit_lo") == 0 ) { | |
2137 _doing_emit_lo = true; | |
2138 } | |
2139 else if ( strcmp(rep_var,"$$emit8") == 0 ) { | |
2140 _doing_emit8 = true; | |
2141 } | |
2142 else { | |
2143 _AD.syntax_err(_encoding._linenum, "Unsupported $$operation '%s'\n",rep_var); | |
2144 assert( false, "fatal();"); | |
2145 } | |
2146 } | |
2147 else { | |
2148 // Update state for replacement variables | |
2149 update_state( rep_var ); | |
2150 _strings_to_emit.addName(rep_var); | |
2151 } | |
2152 _cleared = false; | |
2153 } | |
2154 | |
2155 void emit_replacement() { | |
2156 // A replacement variable or one of its subfields | |
2157 // Obtain replacement variable from list | |
2158 // const char *ec_rep_var = encoding->_rep_vars.iter(); | |
2159 const char *rep_var; | |
2160 _strings_to_emit.reset(); | |
2161 while ( (rep_var = _strings_to_emit.iter()) != NULL ) { | |
2162 | |
2163 if ( (*rep_var) == '$' ) { | |
2164 // A subfield variable, '$$' prefix | |
2165 emit_field( rep_var ); | |
2166 } else { | |
624 | 2167 if (_strings_to_emit.peek() != NULL && |
2168 strcmp(_strings_to_emit.peek(), "$Address") == 0) { | |
2169 fprintf(_fp, "Address::make_raw("); | |
2170 | |
2171 emit_rep_var( rep_var ); | |
2172 fprintf(_fp,"->base(ra_,this,idx%d), ", _operand_idx); | |
2173 | |
2174 _reg_status = LITERAL_ACCESSED; | |
2175 emit_rep_var( rep_var ); | |
2176 fprintf(_fp,"->index(ra_,this,idx%d), ", _operand_idx); | |
2177 | |
2178 _reg_status = LITERAL_ACCESSED; | |
2179 emit_rep_var( rep_var ); | |
2180 fprintf(_fp,"->scale(), "); | |
2181 | |
2182 _reg_status = LITERAL_ACCESSED; | |
2183 emit_rep_var( rep_var ); | |
2184 Form::DataType stack_type = _operand ? _operand->is_user_name_for_sReg() : Form::none; | |
2185 if( _operand && _operand_idx==0 && stack_type != Form::none ) { | |
2186 fprintf(_fp,"->disp(ra_,this,0), "); | |
2187 } else { | |
2188 fprintf(_fp,"->disp(ra_,this,idx%d), ", _operand_idx); | |
2189 } | |
2190 | |
2191 _reg_status = LITERAL_ACCESSED; | |
2192 emit_rep_var( rep_var ); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2193 fprintf(_fp,"->disp_reloc())"); |
624 | 2194 |
2195 // skip trailing $Address | |
2196 _strings_to_emit.iter(); | |
2197 } else { | |
2198 // A replacement variable, '$' prefix | |
2199 const char* next = _strings_to_emit.peek(); | |
2200 const char* next2 = _strings_to_emit.peek(2); | |
2201 if (next != NULL && next2 != NULL && strcmp(next2, "$Register") == 0 && | |
2202 (strcmp(next, "$base") == 0 || strcmp(next, "$index") == 0)) { | |
2203 // handle $rev_var$$base$$Register and $rev_var$$index$$Register by | |
2204 // producing as_Register(opnd_array(#)->base(ra_,this,idx1)). | |
2205 fprintf(_fp, "as_Register("); | |
2206 // emit the operand reference | |
2207 emit_rep_var( rep_var ); | |
2208 rep_var = _strings_to_emit.iter(); | |
2209 assert(strcmp(rep_var, "$base") == 0 || strcmp(rep_var, "$index") == 0, "bad pattern"); | |
2210 // handle base or index | |
2211 emit_field(rep_var); | |
2212 rep_var = _strings_to_emit.iter(); | |
2213 assert(strcmp(rep_var, "$Register") == 0, "bad pattern"); | |
2214 // close up the parens | |
2215 fprintf(_fp, ")"); | |
2216 } else { | |
2217 emit_rep_var( rep_var ); | |
2218 } | |
2219 } | |
0 | 2220 } // end replacement and/or subfield |
2221 } | |
2222 } | |
2223 | |
2224 void emit_reloc_type(const char* type) { | |
2225 fprintf(_fp, "%s", type) | |
2226 ; | |
2227 } | |
2228 | |
2229 | |
2230 void emit() { | |
2231 // | |
2232 // "emit_d32_reloc(" or "emit_hi_reloc" or "emit_lo_reloc" | |
2233 // | |
2234 // Emit the function name when generating an emit function | |
2235 if ( _doing_emit_d32 || _doing_emit_hi || _doing_emit_lo ) { | |
2236 const char *d32_hi_lo = _doing_emit_d32 ? "d32" : (_doing_emit_hi ? "hi" : "lo"); | |
2237 // In general, relocatable isn't known at compiler compile time. | |
2238 // Check results of prior scan | |
2239 if ( ! _may_reloc ) { | |
2240 // Definitely don't need relocation information | |
2241 fprintf( _fp, "emit_%s(cbuf, ", d32_hi_lo ); | |
2242 emit_replacement(); fprintf(_fp, ")"); | |
2243 } | |
2244 else { | |
2245 // Emit RUNTIME CHECK to see if value needs relocation info | |
2246 // If emitting a relocatable address, use 'emit_d32_reloc' | |
2247 const char *disp_constant = _doing_disp ? "disp" : _doing_constant ? "constant" : "INVALID"; | |
2248 assert( (_doing_disp || _doing_constant) | |
2249 && !(_doing_disp && _doing_constant), | |
2250 "Must be emitting either a displacement or a constant"); | |
2251 fprintf(_fp,"\n"); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2252 fprintf(_fp,"if ( opnd_array(%d)->%s_reloc() != relocInfo::none ) {\n", |
0 | 2253 _operand_idx, disp_constant); |
2254 fprintf(_fp," "); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2255 fprintf(_fp,"emit_%s_reloc(cbuf, ", d32_hi_lo ); |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2256 emit_replacement(); fprintf(_fp,", "); |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2257 fprintf(_fp,"opnd_array(%d)->%s_reloc(), ", |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2258 _operand_idx, disp_constant); |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2259 fprintf(_fp, "%d", _reloc_form);fprintf(_fp, ");"); |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2260 fprintf(_fp,"\n"); |
0 | 2261 fprintf(_fp,"} else {\n"); |
2262 fprintf(_fp," emit_%s(cbuf, ", d32_hi_lo); | |
2263 emit_replacement(); fprintf(_fp, ");\n"); fprintf(_fp,"}"); | |
2264 } | |
2265 } | |
2266 else if ( _doing_emit_d16 ) { | |
2267 // Relocation of 16-bit values is not supported | |
2268 fprintf(_fp,"emit_d16(cbuf, "); | |
2269 emit_replacement(); fprintf(_fp, ")"); | |
2270 // No relocation done for 16-bit values | |
2271 } | |
2272 else if ( _doing_emit8 ) { | |
2273 // Relocation of 8-bit values is not supported | |
2274 fprintf(_fp,"emit_d8(cbuf, "); | |
2275 emit_replacement(); fprintf(_fp, ")"); | |
2276 // No relocation done for 8-bit values | |
2277 } | |
2278 else { | |
2279 // Not an emit# command, just output the replacement string. | |
2280 emit_replacement(); | |
2281 } | |
2282 | |
2283 // Get ready for next state collection. | |
2284 clear(); | |
2285 } | |
2286 | |
2287 private: | |
2288 | |
2289 // recognizes names which represent MacroAssembler register types | |
2290 // and return the conversion function to build them from OptoReg | |
2291 const char* reg_conversion(const char* rep_var) { | |
2292 if (strcmp(rep_var,"$Register") == 0) return "as_Register"; | |
2293 if (strcmp(rep_var,"$FloatRegister") == 0) return "as_FloatRegister"; | |
2294 #if defined(IA32) || defined(AMD64) | |
2295 if (strcmp(rep_var,"$XMMRegister") == 0) return "as_XMMRegister"; | |
2296 #endif | |
2297 return NULL; | |
2298 } | |
2299 | |
2300 void emit_field(const char *rep_var) { | |
2301 const char* reg_convert = reg_conversion(rep_var); | |
2302 | |
2303 // A subfield variable, '$$subfield' | |
2304 if ( strcmp(rep_var, "$reg") == 0 || reg_convert != NULL) { | |
2305 // $reg form or the $Register MacroAssembler type conversions | |
2306 assert( _operand_idx != -1, | |
2307 "Must use this subfield after operand"); | |
2308 if( _reg_status == LITERAL_NOT_SEEN ) { | |
2309 if (_processing_noninput) { | |
2310 const Form *local = _inst._localNames[_operand_name]; | |
2311 OperandForm *oper = local->is_operand(); | |
2312 const RegDef* first = oper->get_RegClass()->find_first_elem(); | |
2313 if (reg_convert != NULL) { | |
2314 fprintf(_fp, "%s(%s_enc)", reg_convert, first->_regname); | |
2315 } else { | |
2316 fprintf(_fp, "%s_enc", first->_regname); | |
2317 } | |
2318 } else { | |
2319 fprintf(_fp,"->%s(ra_,this", reg_convert != NULL ? reg_convert : "reg"); | |
2320 // Add parameter for index position, if not result operand | |
2321 if( _operand_idx != 0 ) fprintf(_fp,",idx%d", _operand_idx); | |
2322 fprintf(_fp,")"); | |
6850 | 2323 fprintf(_fp, "/* %s */", _operand_name); |
0 | 2324 } |
2325 } else { | |
2326 assert( _reg_status == LITERAL_OUTPUT, "should have output register literal in emit_rep_var"); | |
2327 // Register literal has already been sent to output file, nothing more needed | |
2328 } | |
2329 } | |
2330 else if ( strcmp(rep_var,"$base") == 0 ) { | |
2331 assert( _operand_idx != -1, | |
2332 "Must use this subfield after operand"); | |
2333 assert( ! _may_reloc, "UnImplemented()"); | |
2334 fprintf(_fp,"->base(ra_,this,idx%d)", _operand_idx); | |
2335 } | |
2336 else if ( strcmp(rep_var,"$index") == 0 ) { | |
2337 assert( _operand_idx != -1, | |
2338 "Must use this subfield after operand"); | |
2339 assert( ! _may_reloc, "UnImplemented()"); | |
2340 fprintf(_fp,"->index(ra_,this,idx%d)", _operand_idx); | |
2341 } | |
2342 else if ( strcmp(rep_var,"$scale") == 0 ) { | |
2343 assert( ! _may_reloc, "UnImplemented()"); | |
2344 fprintf(_fp,"->scale()"); | |
2345 } | |
2346 else if ( strcmp(rep_var,"$cmpcode") == 0 ) { | |
2347 assert( ! _may_reloc, "UnImplemented()"); | |
2348 fprintf(_fp,"->ccode()"); | |
2349 } | |
2350 else if ( strcmp(rep_var,"$constant") == 0 ) { | |
2351 if( _constant_status == LITERAL_NOT_SEEN ) { | |
2352 if ( _constant_type == Form::idealD ) { | |
2353 fprintf(_fp,"->constantD()"); | |
2354 } else if ( _constant_type == Form::idealF ) { | |
2355 fprintf(_fp,"->constantF()"); | |
2356 } else if ( _constant_type == Form::idealL ) { | |
2357 fprintf(_fp,"->constantL()"); | |
2358 } else { | |
2359 fprintf(_fp,"->constant()"); | |
2360 } | |
2361 } else { | |
2362 assert( _constant_status == LITERAL_OUTPUT, "should have output constant literal in emit_rep_var"); | |
6850 | 2363 // Constant literal has already been sent to output file, nothing more needed |
0 | 2364 } |
2365 } | |
2366 else if ( strcmp(rep_var,"$disp") == 0 ) { | |
2367 Form::DataType stack_type = _operand ? _operand->is_user_name_for_sReg() : Form::none; | |
2368 if( _operand && _operand_idx==0 && stack_type != Form::none ) { | |
2369 fprintf(_fp,"->disp(ra_,this,0)"); | |
2370 } else { | |
2371 fprintf(_fp,"->disp(ra_,this,idx%d)", _operand_idx); | |
2372 } | |
2373 } | |
2374 else if ( strcmp(rep_var,"$label") == 0 ) { | |
2375 fprintf(_fp,"->label()"); | |
2376 } | |
2377 else if ( strcmp(rep_var,"$method") == 0 ) { | |
2378 fprintf(_fp,"->method()"); | |
2379 } | |
2380 else { | |
2381 printf("emit_field: %s\n",rep_var); | |
6850 | 2382 globalAD->syntax_err(_inst._linenum, "Unknown replacement variable %s in format statement of %s.", |
2383 rep_var, _inst._ident); | |
0 | 2384 assert( false, "UnImplemented()"); |
2385 } | |
2386 } | |
2387 | |
2388 | |
2389 void emit_rep_var(const char *rep_var) { | |
2390 _processing_noninput = false; | |
2391 // A replacement variable, originally '$' | |
2392 if ( Opcode::as_opcode_type(rep_var) != Opcode::NOT_AN_OPCODE ) { | |
415
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2393 if (!_inst._opcode->print_opcode(_fp, Opcode::as_opcode_type(rep_var) )) { |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2394 // Missing opcode |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2395 _AD.syntax_err( _inst._linenum, |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2396 "Missing $%s opcode definition in %s, used by encoding %s\n", |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2397 rep_var, _inst._ident, _encoding._name); |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2398 } |
0 | 2399 } |
2008 | 2400 else if (strcmp(rep_var, "constanttablebase") == 0) { |
2401 fprintf(_fp, "as_Register(ra_->get_encode(in(mach_constant_base_node_input())))"); | |
2402 } | |
2403 else if (strcmp(rep_var, "constantoffset") == 0) { | |
2404 fprintf(_fp, "constant_offset()"); | |
2405 } | |
2406 else if (strcmp(rep_var, "constantaddress") == 0) { | |
2407 fprintf(_fp, "InternalAddress(__ code()->consts()->start() + constant_offset())"); | |
2408 } | |
0 | 2409 else { |
2410 // Lookup its position in parameter list | |
2411 int param_no = _encoding.rep_var_index(rep_var); | |
2412 if ( param_no == -1 ) { | |
2413 _AD.syntax_err( _encoding._linenum, | |
2414 "Replacement variable %s not found in enc_class %s.\n", | |
2415 rep_var, _encoding._name); | |
2416 } | |
2417 // Lookup the corresponding ins_encode parameter | |
2418 const char *inst_rep_var = _ins_encode.rep_var_name(_inst, param_no); | |
2419 | |
2420 // Check if instruction's actual parameter is a local name in the instruction | |
2421 const Form *local = _inst._localNames[inst_rep_var]; | |
2422 OpClassForm *opc = (local != NULL) ? local->is_opclass() : NULL; | |
2423 // Note: assert removed to allow constant and symbolic parameters | |
2424 // assert( opc, "replacement variable was not found in local names"); | |
2425 // Lookup the index position iff the replacement variable is a localName | |
2426 int idx = (opc != NULL) ? _inst.operand_position_format(inst_rep_var) : -1; | |
2427 if( idx != -1 ) { | |
2428 if (_inst.is_noninput_operand(idx)) { | |
2429 // This operand isn't a normal input so printing it is done | |
2430 // specially. | |
2431 _processing_noninput = true; | |
2432 } else { | |
2433 // Output the emit code for this operand | |
2434 fprintf(_fp,"opnd_array(%d)",idx); | |
2435 } | |
2436 assert( _operand == opc->is_operand(), | |
2437 "Previous emit $operand does not match current"); | |
2438 } | |
2439 else if( ADLParser::is_literal_constant(inst_rep_var) ) { | |
2440 // else check if it is a constant expression | |
2441 // Removed following assert to allow primitive C types as arguments to encodings | |
2442 // assert( _constant_status == LITERAL_ACCESSED, "Must be processing a literal constant parameter"); | |
2443 fprintf(_fp,"(%s)", inst_rep_var); | |
2444 _constant_status = LITERAL_OUTPUT; | |
2445 } | |
2446 else if( Opcode::as_opcode_type(inst_rep_var) != Opcode::NOT_AN_OPCODE ) { | |
2447 // else check if "primary", "secondary", "tertiary" | |
2448 assert( _constant_status == LITERAL_ACCESSED, "Must be processing a literal constant parameter"); | |
415
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2449 if (!_inst._opcode->print_opcode(_fp, Opcode::as_opcode_type(inst_rep_var) )) { |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2450 // Missing opcode |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2451 _AD.syntax_err( _inst._linenum, |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2452 "Missing $%s opcode definition in %s\n", |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2453 rep_var, _inst._ident); |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2454 |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2455 } |
0 | 2456 _constant_status = LITERAL_OUTPUT; |
2457 } | |
2458 else if((_AD.get_registers() != NULL ) && (_AD.get_registers()->getRegDef(inst_rep_var) != NULL)) { | |
2459 // Instruction provided a literal register name for this parameter | |
2460 // Check that encoding specifies $$$reg to resolve.as register. | |
2461 assert( _reg_status == LITERAL_ACCESSED, "Must be processing a literal register parameter"); | |
2462 fprintf(_fp,"(%s_enc)", inst_rep_var); | |
2463 _reg_status = LITERAL_OUTPUT; | |
2464 } | |
2465 else { | |
2466 // Check for unimplemented functionality before hard failure | |
2467 assert( strcmp(opc->_ident,"label")==0, "Unimplemented() Label"); | |
2468 assert( false, "ShouldNotReachHere()"); | |
2469 } | |
2470 // all done | |
2471 } | |
2472 } | |
2473 | |
2474 }; // end class DefineEmitState | |
2475 | |
2476 | |
2477 void ArchDesc::defineSize(FILE *fp, InstructForm &inst) { | |
2478 | |
2479 //(1) | |
2480 // Output instruction's emit prototype | |
6850 | 2481 fprintf(fp,"uint %sNode::size(PhaseRegAlloc *ra_) const {\n", |
0 | 2482 inst._ident); |
2483 | |
6850 | 2484 fprintf(fp, " assert(VerifyOops || MachNode::size(ra_) <= %s, \"bad fixed size\");\n", inst._size); |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
2485 |
0 | 2486 //(2) |
2487 // Print the size | |
6850 | 2488 fprintf(fp, " return (VerifyOops ? MachNode::size(ra_) : %s);\n", inst._size); |
0 | 2489 |
2490 // (3) and (4) | |
2491 fprintf(fp,"}\n"); | |
2492 } | |
2493 | |
2008 | 2494 // defineEmit ----------------------------------------------------------------- |
2495 void ArchDesc::defineEmit(FILE* fp, InstructForm& inst) { | |
2496 InsEncode* encode = inst._insencode; | |
0 | 2497 |
2498 // (1) | |
2499 // Output instruction's emit prototype | |
2008 | 2500 fprintf(fp, "void %sNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {\n", inst._ident); |
0 | 2501 |
2502 // If user did not define an encode section, | |
2503 // provide stub that does not generate any machine code. | |
2008 | 2504 if( (_encode == NULL) || (encode == NULL) ) { |
0 | 2505 fprintf(fp, " // User did not define an encode section.\n"); |
2008 | 2506 fprintf(fp, "}\n"); |
0 | 2507 return; |
2508 } | |
2509 | |
2510 // Save current instruction's starting address (helps with relocation). | |
2008 | 2511 fprintf(fp, " cbuf.set_insts_mark();\n"); |
2512 | |
2513 // For MachConstantNodes which are ideal jump nodes, fill the jump table. | |
2514 if (inst.is_mach_constant() && inst.is_ideal_jump()) { | |
2515 fprintf(fp, " ra_->C->constant_table().fill_jump_table(cbuf, (MachConstantNode*) this, _index2label);\n"); | |
2516 } | |
0 | 2517 |
2518 // Output each operand's offset into the array of registers. | |
2008 | 2519 inst.index_temps(fp, _globalNames); |
0 | 2520 |
2521 // Output this instruction's encodings | |
2522 const char *ec_name; | |
2523 bool user_defined = false; | |
2008 | 2524 encode->reset(); |
2525 while ((ec_name = encode->encode_class_iter()) != NULL) { | |
2526 fprintf(fp, " {\n"); | |
0 | 2527 // Output user-defined encoding |
2528 user_defined = true; | |
2529 | |
2530 const char *ec_code = NULL; | |
2531 const char *ec_rep_var = NULL; | |
2532 EncClass *encoding = _encode->encClass(ec_name); | |
2533 if (encoding == NULL) { | |
2534 fprintf(stderr, "User did not define contents of this encode_class: %s\n", ec_name); | |
2535 abort(); | |
2536 } | |
2537 | |
2008 | 2538 if (encode->current_encoding_num_args() != encoding->num_args()) { |
2539 globalAD->syntax_err(encode->_linenum, "In %s: passing %d arguments to %s but expecting %d", | |
2540 inst._ident, encode->current_encoding_num_args(), | |
0 | 2541 ec_name, encoding->num_args()); |
2542 } | |
2543 | |
2008 | 2544 DefineEmitState pending(fp, *this, *encoding, *encode, inst); |
0 | 2545 encoding->_code.reset(); |
2546 encoding->_rep_vars.reset(); | |
2547 // Process list of user-defined strings, | |
2548 // and occurrences of replacement variables. | |
2549 // Replacement Vars are pushed into a list and then output | |
2008 | 2550 while ((ec_code = encoding->_code.iter()) != NULL) { |
2551 if (!encoding->_code.is_signal(ec_code)) { | |
0 | 2552 // Emit pending code |
2553 pending.emit(); | |
2554 pending.clear(); | |
2555 // Emit this code section | |
2008 | 2556 fprintf(fp, "%s", ec_code); |
0 | 2557 } else { |
2558 // A replacement variable or one of its subfields | |
2559 // Obtain replacement variable from list | |
2560 ec_rep_var = encoding->_rep_vars.iter(); | |
2561 pending.add_rep_var(ec_rep_var); | |
2562 } | |
2563 } | |
2564 // Emit pending code | |
2565 pending.emit(); | |
2566 pending.clear(); | |
2008 | 2567 fprintf(fp, " }\n"); |
0 | 2568 } // end while instruction's encodings |
2569 | |
2570 // Check if user stated which encoding to user | |
2571 if ( user_defined == false ) { | |
2572 fprintf(fp, " // User did not define which encode class to use.\n"); | |
2573 } | |
2574 | |
2575 // (3) and (4) | |
6850 | 2576 fprintf(fp, "}\n\n"); |
2008 | 2577 } |
2578 | |
2579 // defineEvalConstant --------------------------------------------------------- | |
2580 void ArchDesc::defineEvalConstant(FILE* fp, InstructForm& inst) { | |
2581 InsEncode* encode = inst._constant; | |
2582 | |
2583 // (1) | |
2584 // Output instruction's emit prototype | |
2585 fprintf(fp, "void %sNode::eval_constant(Compile* C) {\n", inst._ident); | |
2586 | |
4114
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
3853
diff
changeset
|
2587 // For ideal jump nodes, add a jump-table entry. |
2008 | 2588 if (inst.is_ideal_jump()) { |
4114
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
3853
diff
changeset
|
2589 fprintf(fp, " _constant = C->constant_table().add_jump_table(this);\n"); |
2008 | 2590 } |
2591 | |
2592 // If user did not define an encode section, | |
2593 // provide stub that does not generate any machine code. | |
2594 if ((_encode == NULL) || (encode == NULL)) { | |
2595 fprintf(fp, " // User did not define an encode section.\n"); | |
2596 fprintf(fp, "}\n"); | |
2597 return; | |
2598 } | |
2599 | |
2600 // Output this instruction's encodings | |
2601 const char *ec_name; | |
2602 bool user_defined = false; | |
2603 encode->reset(); | |
2604 while ((ec_name = encode->encode_class_iter()) != NULL) { | |
2605 fprintf(fp, " {\n"); | |
2606 // Output user-defined encoding | |
2607 user_defined = true; | |
2608 | |
2609 const char *ec_code = NULL; | |
2610 const char *ec_rep_var = NULL; | |
2611 EncClass *encoding = _encode->encClass(ec_name); | |
2612 if (encoding == NULL) { | |
2613 fprintf(stderr, "User did not define contents of this encode_class: %s\n", ec_name); | |
2614 abort(); | |
2615 } | |
2616 | |
2617 if (encode->current_encoding_num_args() != encoding->num_args()) { | |
2618 globalAD->syntax_err(encode->_linenum, "In %s: passing %d arguments to %s but expecting %d", | |
2619 inst._ident, encode->current_encoding_num_args(), | |
2620 ec_name, encoding->num_args()); | |
2621 } | |
2622 | |
2623 DefineEmitState pending(fp, *this, *encoding, *encode, inst); | |
2624 encoding->_code.reset(); | |
2625 encoding->_rep_vars.reset(); | |
2626 // Process list of user-defined strings, | |
2627 // and occurrences of replacement variables. | |
2628 // Replacement Vars are pushed into a list and then output | |
2629 while ((ec_code = encoding->_code.iter()) != NULL) { | |
2630 if (!encoding->_code.is_signal(ec_code)) { | |
2631 // Emit pending code | |
2632 pending.emit(); | |
2633 pending.clear(); | |
2634 // Emit this code section | |
2635 fprintf(fp, "%s", ec_code); | |
2636 } else { | |
2637 // A replacement variable or one of its subfields | |
2638 // Obtain replacement variable from list | |
2639 ec_rep_var = encoding->_rep_vars.iter(); | |
2640 pending.add_rep_var(ec_rep_var); | |
2641 } | |
2642 } | |
2643 // Emit pending code | |
2644 pending.emit(); | |
2645 pending.clear(); | |
2646 fprintf(fp, " }\n"); | |
2647 } // end while instruction's encodings | |
2648 | |
2649 // Check if user stated which encoding to user | |
2650 if (user_defined == false) { | |
2651 fprintf(fp, " // User did not define which encode class to use.\n"); | |
2652 } | |
2653 | |
2654 // (3) and (4) | |
2655 fprintf(fp, "}\n"); | |
0 | 2656 } |
2657 | |
2658 // --------------------------------------------------------------------------- | |
2659 //--------Utilities to build MachOper and MachNode derived Classes------------ | |
2660 // --------------------------------------------------------------------------- | |
2661 | |
2662 //------------------------------Utilities to build Operand Classes------------ | |
2663 static void defineIn_RegMask(FILE *fp, FormDict &globals, OperandForm &oper) { | |
2664 uint num_edges = oper.num_edges(globals); | |
2665 if( num_edges != 0 ) { | |
2666 // Method header | |
2667 fprintf(fp, "const RegMask *%sOper::in_RegMask(int index) const {\n", | |
2668 oper._ident); | |
2669 | |
2670 // Assert that the index is in range. | |
2671 fprintf(fp, " assert(0 <= index && index < %d, \"index out of range\");\n", | |
2672 num_edges); | |
2673 | |
2674 // Figure out if all RegMasks are the same. | |
2675 const char* first_reg_class = oper.in_reg_class(0, globals); | |
2676 bool all_same = true; | |
2677 assert(first_reg_class != NULL, "did not find register mask"); | |
2678 | |
2679 for (uint index = 1; all_same && index < num_edges; index++) { | |
2680 const char* some_reg_class = oper.in_reg_class(index, globals); | |
2681 assert(some_reg_class != NULL, "did not find register mask"); | |
2682 if (strcmp(first_reg_class, some_reg_class) != 0) { | |
2683 all_same = false; | |
2684 } | |
2685 } | |
2686 | |
2687 if (all_same) { | |
2688 // Return the sole RegMask. | |
2689 if (strcmp(first_reg_class, "stack_slots") == 0) { | |
2690 fprintf(fp," return &(Compile::current()->FIRST_STACK_mask());\n"); | |
2691 } else { | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
2692 const char* first_reg_class_to_upper = toUpper(first_reg_class); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
2693 fprintf(fp," return &%s_mask();\n", first_reg_class_to_upper); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
2694 delete[] first_reg_class_to_upper; |
0 | 2695 } |
2696 } else { | |
2697 // Build a switch statement to return the desired mask. | |
2698 fprintf(fp," switch (index) {\n"); | |
2699 | |
2700 for (uint index = 0; index < num_edges; index++) { | |
2701 const char *reg_class = oper.in_reg_class(index, globals); | |
2702 assert(reg_class != NULL, "did not find register mask"); | |
2703 if( !strcmp(reg_class, "stack_slots") ) { | |
2704 fprintf(fp, " case %d: return &(Compile::current()->FIRST_STACK_mask());\n", index); | |
2705 } else { | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
2706 const char* reg_class_to_upper = toUpper(reg_class); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
2707 fprintf(fp, " case %d: return &%s_mask();\n", index, reg_class_to_upper); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
2708 delete[] reg_class_to_upper; |
0 | 2709 } |
2710 } | |
2711 fprintf(fp," }\n"); | |
2712 fprintf(fp," ShouldNotReachHere();\n"); | |
2713 fprintf(fp," return NULL;\n"); | |
2714 } | |
2715 | |
2716 // Method close | |
2717 fprintf(fp, "}\n\n"); | |
2718 } | |
2719 } | |
2720 | |
2721 // generate code to create a clone for a class derived from MachOper | |
2722 // | |
2723 // (0) MachOper *MachOperXOper::clone(Compile* C) const { | |
2724 // (1) return new (C) MachXOper( _ccode, _c0, _c1, ..., _cn); | |
2725 // (2) } | |
2726 // | |
2727 static void defineClone(FILE *fp, FormDict &globalNames, OperandForm &oper) { | |
6850 | 2728 fprintf(fp,"MachOper *%sOper::clone(Compile* C) const {\n", oper._ident); |
0 | 2729 // Check for constants that need to be copied over |
2730 const int num_consts = oper.num_consts(globalNames); | |
2731 const bool is_ideal_bool = oper.is_ideal_bool(); | |
2732 if( (num_consts > 0) ) { | |
6850 | 2733 fprintf(fp," return new (C) %sOper(", oper._ident); |
0 | 2734 // generate parameters for constants |
2735 int i = 0; | |
2736 fprintf(fp,"_c%d", i); | |
2737 for( i = 1; i < num_consts; ++i) { | |
2738 fprintf(fp,", _c%d", i); | |
2739 } | |
2740 // finish line (1) | |
2741 fprintf(fp,");\n"); | |
2742 } | |
2743 else { | |
2744 assert( num_consts == 0, "Currently support zero or one constant per operand clone function"); | |
6850 | 2745 fprintf(fp," return new (C) %sOper();\n", oper._ident); |
0 | 2746 } |
2747 // finish method | |
2748 fprintf(fp,"}\n"); | |
2749 } | |
2750 | |
2751 // Helper functions for bug 4796752, abstracted with minimal modification | |
2752 // from define_oper_interface() | |
2753 OperandForm *rep_var_to_operand(const char *encoding, OperandForm &oper, FormDict &globals) { | |
2754 OperandForm *op = NULL; | |
2755 // Check for replacement variable | |
2756 if( *encoding == '$' ) { | |
2757 // Replacement variable | |
2758 const char *rep_var = encoding + 1; | |
2759 // Lookup replacement variable, rep_var, in operand's component list | |
2760 const Component *comp = oper._components.search(rep_var); | |
2761 assert( comp != NULL, "Replacement variable not found in components"); | |
2762 // Lookup operand form for replacement variable's type | |
2763 const char *type = comp->_type; | |
2764 Form *form = (Form*)globals[type]; | |
2765 assert( form != NULL, "Replacement variable's type not found"); | |
2766 op = form->is_operand(); | |
2767 assert( op, "Attempting to emit a non-register or non-constant"); | |
2768 } | |
2769 | |
2770 return op; | |
2771 } | |
2772 | |
2773 int rep_var_to_constant_index(const char *encoding, OperandForm &oper, FormDict &globals) { | |
2774 int idx = -1; | |
2775 // Check for replacement variable | |
2776 if( *encoding == '$' ) { | |
2777 // Replacement variable | |
2778 const char *rep_var = encoding + 1; | |
2779 // Lookup replacement variable, rep_var, in operand's component list | |
2780 const Component *comp = oper._components.search(rep_var); | |
2781 assert( comp != NULL, "Replacement variable not found in components"); | |
2782 // Lookup operand form for replacement variable's type | |
2783 const char *type = comp->_type; | |
2784 Form *form = (Form*)globals[type]; | |
2785 assert( form != NULL, "Replacement variable's type not found"); | |
2786 OperandForm *op = form->is_operand(); | |
2787 assert( op, "Attempting to emit a non-register or non-constant"); | |
2788 // Check that this is a constant and find constant's index: | |
2789 if (op->_matrule && op->_matrule->is_base_constant(globals)) { | |
2790 idx = oper.constant_position(globals, comp); | |
2791 } | |
2792 } | |
2793 | |
2794 return idx; | |
2795 } | |
2796 | |
2797 bool is_regI(const char *encoding, OperandForm &oper, FormDict &globals ) { | |
2798 bool is_regI = false; | |
2799 | |
2800 OperandForm *op = rep_var_to_operand(encoding, oper, globals); | |
2801 if( op != NULL ) { | |
2802 // Check that this is a register | |
2803 if ( (op->_matrule && op->_matrule->is_base_register(globals)) ) { | |
2804 // Register | |
2805 const char* ideal = op->ideal_type(globals); | |
2806 is_regI = (ideal && (op->ideal_to_Reg_type(ideal) == Form::idealI)); | |
2807 } | |
2808 } | |
2809 | |
2810 return is_regI; | |
2811 } | |
2812 | |
2813 bool is_conP(const char *encoding, OperandForm &oper, FormDict &globals ) { | |
2814 bool is_conP = false; | |
2815 | |
2816 OperandForm *op = rep_var_to_operand(encoding, oper, globals); | |
2817 if( op != NULL ) { | |
2818 // Check that this is a constant pointer | |
2819 if (op->_matrule && op->_matrule->is_base_constant(globals)) { | |
2820 // Constant | |
2821 Form::DataType dtype = op->is_base_constant(globals); | |
2822 is_conP = (dtype == Form::idealP); | |
2823 } | |
2824 } | |
2825 | |
2826 return is_conP; | |
2827 } | |
2828 | |
2829 | |
2830 // Define a MachOper interface methods | |
2831 void ArchDesc::define_oper_interface(FILE *fp, OperandForm &oper, FormDict &globals, | |
2832 const char *name, const char *encoding) { | |
2833 bool emit_position = false; | |
2834 int position = -1; | |
2835 | |
2836 fprintf(fp," virtual int %s", name); | |
2837 // Generate access method for base, index, scale, disp, ... | |
2838 if( (strcmp(name,"base") == 0) || (strcmp(name,"index") == 0) ) { | |
2839 fprintf(fp,"(PhaseRegAlloc *ra_, const Node *node, int idx) const { \n"); | |
2840 emit_position = true; | |
2841 } else if ( (strcmp(name,"disp") == 0) ) { | |
2842 fprintf(fp,"(PhaseRegAlloc *ra_, const Node *node, int idx) const { \n"); | |
2843 } else { | |
6850 | 2844 fprintf(fp,"() const { \n"); |
0 | 2845 } |
2846 | |
2847 // Check for hexadecimal value OR replacement variable | |
2848 if( *encoding == '$' ) { | |
2849 // Replacement variable | |
2850 const char *rep_var = encoding + 1; | |
6850 | 2851 fprintf(fp," // Replacement variable: %s\n", encoding+1); |
0 | 2852 // Lookup replacement variable, rep_var, in operand's component list |
2853 const Component *comp = oper._components.search(rep_var); | |
2854 assert( comp != NULL, "Replacement variable not found in components"); | |
2855 // Lookup operand form for replacement variable's type | |
2856 const char *type = comp->_type; | |
2857 Form *form = (Form*)globals[type]; | |
2858 assert( form != NULL, "Replacement variable's type not found"); | |
2859 OperandForm *op = form->is_operand(); | |
2860 assert( op, "Attempting to emit a non-register or non-constant"); | |
2861 // Check that this is a register or a constant and generate code: | |
2862 if ( (op->_matrule && op->_matrule->is_base_register(globals)) ) { | |
2863 // Register | |
2864 int idx_offset = oper.register_position( globals, rep_var); | |
2865 position = idx_offset; | |
2866 fprintf(fp," return (int)ra_->get_encode(node->in(idx"); | |
2867 if ( idx_offset > 0 ) fprintf(fp, "+%d",idx_offset); | |
2868 fprintf(fp,"));\n"); | |
2869 } else if ( op->ideal_to_sReg_type(op->_ident) != Form::none ) { | |
2870 // StackSlot for an sReg comes either from input node or from self, when idx==0 | |
2871 fprintf(fp," if( idx != 0 ) {\n"); | |
6850 | 2872 fprintf(fp," // Access stack offset (register number) for input operand\n"); |
0 | 2873 fprintf(fp," return ra_->reg2offset(ra_->get_reg_first(node->in(idx)));/* sReg */\n"); |
2874 fprintf(fp," }\n"); | |
6850 | 2875 fprintf(fp," // Access stack offset (register number) from myself\n"); |
0 | 2876 fprintf(fp," return ra_->reg2offset(ra_->get_reg_first(node));/* sReg */\n"); |
2877 } else if (op->_matrule && op->_matrule->is_base_constant(globals)) { | |
2878 // Constant | |
2879 // Check which constant this name maps to: _c0, _c1, ..., _cn | |
2880 const int idx = oper.constant_position(globals, comp); | |
2881 assert( idx != -1, "Constant component not found in operand"); | |
2882 // Output code for this constant, type dependent. | |
2883 fprintf(fp," return (int)" ); | |
2884 oper.access_constant(fp, globals, (uint)idx /* , const_type */); | |
2885 fprintf(fp,";\n"); | |
2886 } else { | |
2887 assert( false, "Attempting to emit a non-register or non-constant"); | |
2888 } | |
2889 } | |
2890 else if( *encoding == '0' && *(encoding+1) == 'x' ) { | |
2891 // Hex value | |
6850 | 2892 fprintf(fp," return %s;\n", encoding); |
0 | 2893 } else { |
2894 assert( false, "Do not support octal or decimal encode constants"); | |
2895 } | |
2896 fprintf(fp," }\n"); | |
2897 | |
2898 if( emit_position && (position != -1) && (oper.num_edges(globals) > 0) ) { | |
2899 fprintf(fp," virtual int %s_position() const { return %d; }\n", name, position); | |
2900 MemInterface *mem_interface = oper._interface->is_MemInterface(); | |
2901 const char *base = mem_interface->_base; | |
2902 const char *disp = mem_interface->_disp; | |
2903 if( emit_position && (strcmp(name,"base") == 0) | |
2904 && base != NULL && is_regI(base, oper, globals) | |
2905 && disp != NULL && is_conP(disp, oper, globals) ) { | |
2906 // Found a memory access using a constant pointer for a displacement | |
2907 // and a base register containing an integer offset. | |
2908 // In this case the base and disp are reversed with respect to what | |
2909 // is expected by MachNode::get_base_and_disp() and MachNode::adr_type(). | |
2910 // Provide a non-NULL return for disp_as_type() that will allow adr_type() | |
2911 // to correctly compute the access type for alias analysis. | |
2912 // | |
2913 // See BugId 4796752, operand indOffset32X in i486.ad | |
2914 int idx = rep_var_to_constant_index(disp, oper, globals); | |
2915 fprintf(fp," virtual const TypePtr *disp_as_type() const { return _c%d; }\n", idx); | |
2916 } | |
2917 } | |
2918 } | |
2919 | |
2920 // | |
2921 // Construct the method to copy _idx, inputs and operands to new node. | |
2922 static void define_fill_new_machnode(bool used, FILE *fp_cpp) { | |
2923 fprintf(fp_cpp, "\n"); | |
2924 fprintf(fp_cpp, "// Copy _idx, inputs and operands to new node\n"); | |
2925 fprintf(fp_cpp, "void MachNode::fill_new_machnode( MachNode* node, Compile* C) const {\n"); | |
2926 if( !used ) { | |
2927 fprintf(fp_cpp, " // This architecture does not have cisc or short branch instructions\n"); | |
2928 fprintf(fp_cpp, " ShouldNotCallThis();\n"); | |
2929 fprintf(fp_cpp, "}\n"); | |
2930 } else { | |
2931 // New node must use same node index for access through allocator's tables | |
2932 fprintf(fp_cpp, " // New node must use same node index\n"); | |
2933 fprintf(fp_cpp, " node->set_idx( _idx );\n"); | |
2934 // Copy machine-independent inputs | |
2935 fprintf(fp_cpp, " // Copy machine-independent inputs\n"); | |
2936 fprintf(fp_cpp, " for( uint j = 0; j < req(); j++ ) {\n"); | |
2937 fprintf(fp_cpp, " node->add_req(in(j));\n"); | |
2938 fprintf(fp_cpp, " }\n"); | |
2939 // Copy machine operands to new MachNode | |
2940 fprintf(fp_cpp, " // Copy my operands, except for cisc position\n"); | |
2941 fprintf(fp_cpp, " int nopnds = num_opnds();\n"); | |
2942 fprintf(fp_cpp, " assert( node->num_opnds() == (uint)nopnds, \"Must have same number of operands\");\n"); | |
2943 fprintf(fp_cpp, " MachOper **to = node->_opnds;\n"); | |
2944 fprintf(fp_cpp, " for( int i = 0; i < nopnds; i++ ) {\n"); | |
2945 fprintf(fp_cpp, " if( i != cisc_operand() ) \n"); | |
2946 fprintf(fp_cpp, " to[i] = _opnds[i]->clone(C);\n"); | |
2947 fprintf(fp_cpp, " }\n"); | |
2948 fprintf(fp_cpp, "}\n"); | |
2949 } | |
2950 fprintf(fp_cpp, "\n"); | |
2951 } | |
2952 | |
2953 //------------------------------defineClasses---------------------------------- | |
2954 // Define members of MachNode and MachOper classes based on | |
2955 // operand and instruction lists | |
2956 void ArchDesc::defineClasses(FILE *fp) { | |
2957 | |
2958 // Define the contents of an array containing the machine register names | |
2959 defineRegNames(fp, _register); | |
2960 // Define an array containing the machine register encoding values | |
2961 defineRegEncodes(fp, _register); | |
2962 // Generate an enumeration of user-defined register classes | |
2963 // and a list of register masks, one for each class. | |
2964 // Only define the RegMask value objects in the expand file. | |
2965 // Declare each as an extern const RegMask ...; in ad_<arch>.hpp | |
2966 declare_register_masks(_HPP_file._fp); | |
2967 // build_register_masks(fp); | |
2968 build_register_masks(_CPP_EXPAND_file._fp); | |
2969 // Define the pipe_classes | |
2970 build_pipe_classes(_CPP_PIPELINE_file._fp); | |
2971 | |
2972 // Generate Machine Classes for each operand defined in AD file | |
2973 fprintf(fp,"\n"); | |
2974 fprintf(fp,"\n"); | |
2975 fprintf(fp,"//------------------Define classes derived from MachOper---------------------\n"); | |
2976 // Iterate through all operands | |
2977 _operands.reset(); | |
2978 OperandForm *oper; | |
2979 for( ; (oper = (OperandForm*)_operands.iter()) != NULL; ) { | |
2980 // Ensure this is a machine-world instruction | |
2981 if ( oper->ideal_only() ) continue; | |
2982 // !!!!! | |
2983 // The declaration of labelOper is in machine-independent file: machnode | |
2984 if ( strcmp(oper->_ident,"label") == 0 ) { | |
2985 defineIn_RegMask(_CPP_MISC_file._fp, _globalNames, *oper); | |
2986 | |
2987 fprintf(fp,"MachOper *%sOper::clone(Compile* C) const {\n", oper->_ident); | |
2988 fprintf(fp," return new (C) %sOper(_label, _block_num);\n", oper->_ident); | |
2989 fprintf(fp,"}\n"); | |
2990 | |
2991 fprintf(fp,"uint %sOper::opcode() const { return %s; }\n", | |
2992 oper->_ident, machOperEnum(oper->_ident)); | |
2993 // // Currently all XXXOper::Hash() methods are identical (990820) | |
2994 // define_hash(fp, oper->_ident); | |
2995 // // Currently all XXXOper::Cmp() methods are identical (990820) | |
2996 // define_cmp(fp, oper->_ident); | |
2997 fprintf(fp,"\n"); | |
2998 | |
2999 continue; | |
3000 } | |
3001 | |
3002 // The declaration of methodOper is in machine-independent file: machnode | |
3003 if ( strcmp(oper->_ident,"method") == 0 ) { | |
3004 defineIn_RegMask(_CPP_MISC_file._fp, _globalNames, *oper); | |
3005 | |
3006 fprintf(fp,"MachOper *%sOper::clone(Compile* C) const {\n", oper->_ident); | |
3007 fprintf(fp," return new (C) %sOper(_method);\n", oper->_ident); | |
3008 fprintf(fp,"}\n"); | |
3009 | |
3010 fprintf(fp,"uint %sOper::opcode() const { return %s; }\n", | |
3011 oper->_ident, machOperEnum(oper->_ident)); | |
3012 // // Currently all XXXOper::Hash() methods are identical (990820) | |
3013 // define_hash(fp, oper->_ident); | |
3014 // // Currently all XXXOper::Cmp() methods are identical (990820) | |
3015 // define_cmp(fp, oper->_ident); | |
3016 fprintf(fp,"\n"); | |
3017 | |
3018 continue; | |
3019 } | |
3020 | |
3021 defineIn_RegMask(fp, _globalNames, *oper); | |
3022 defineClone(_CPP_CLONE_file._fp, _globalNames, *oper); | |
3023 // // Currently all XXXOper::Hash() methods are identical (990820) | |
3024 // define_hash(fp, oper->_ident); | |
3025 // // Currently all XXXOper::Cmp() methods are identical (990820) | |
3026 // define_cmp(fp, oper->_ident); | |
3027 | |
3028 // side-call to generate output that used to be in the header file: | |
3029 extern void gen_oper_format(FILE *fp, FormDict &globals, OperandForm &oper, bool for_c_file); | |
3030 gen_oper_format(_CPP_FORMAT_file._fp, _globalNames, *oper, true); | |
3031 | |
3032 } | |
3033 | |
3034 | |
3035 // Generate Machine Classes for each instruction defined in AD file | |
3036 fprintf(fp,"//------------------Define members for classes derived from MachNode----------\n"); | |
3037 // Output the definitions for out_RegMask() // & kill_RegMask() | |
3038 _instructions.reset(); | |
3039 InstructForm *instr; | |
3040 MachNodeForm *machnode; | |
3041 for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3042 // Ensure this is a machine-world instruction | |
3043 if ( instr->ideal_only() ) continue; | |
3044 | |
3045 defineOut_RegMask(_CPP_MISC_file._fp, instr->_ident, reg_mask(*instr)); | |
3046 } | |
3047 | |
3048 bool used = false; | |
3049 // Output the definitions for expand rules & peephole rules | |
3050 _instructions.reset(); | |
3051 for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3052 // Ensure this is a machine-world instruction | |
3053 if ( instr->ideal_only() ) continue; | |
3054 // If there are multiple defs/kills, or an explicit expand rule, build rule | |
3055 if( instr->expands() || instr->needs_projections() || | |
3056 instr->has_temps() || | |
2008 | 3057 instr->is_mach_constant() || |
0 | 3058 instr->_matrule != NULL && |
3059 instr->num_opnds() != instr->num_unique_opnds() ) | |
3060 defineExpand(_CPP_EXPAND_file._fp, instr); | |
3061 // If there is an explicit peephole rule, build it | |
3062 if ( instr->peepholes() ) | |
3063 definePeephole(_CPP_PEEPHOLE_file._fp, instr); | |
3064 | |
3065 // Output code to convert to the cisc version, if applicable | |
3066 used |= instr->define_cisc_version(*this, fp); | |
3067 | |
3068 // Output code to convert to the short branch version, if applicable | |
1541
b5fdf39b9749
6953576: bottom_type for matched AddPNodes doesn't always agree with ideal
never
parents:
1489
diff
changeset
|
3069 used |= instr->define_short_branch_methods(*this, fp); |
0 | 3070 } |
3071 | |
3072 // Construct the method called by cisc_version() to copy inputs and operands. | |
3073 define_fill_new_machnode(used, fp); | |
3074 | |
3075 // Output the definitions for labels | |
3076 _instructions.reset(); | |
3077 while( (instr = (InstructForm*)_instructions.iter()) != NULL ) { | |
3078 // Ensure this is a machine-world instruction | |
3079 if ( instr->ideal_only() ) continue; | |
3080 | |
3081 // Access the fields for operand Label | |
3082 int label_position = instr->label_position(); | |
3083 if( label_position != -1 ) { | |
3084 // Set the label | |
3839 | 3085 fprintf(fp,"void %sNode::label_set( Label* label, uint block_num ) {\n", instr->_ident); |
0 | 3086 fprintf(fp," labelOper* oper = (labelOper*)(opnd_array(%d));\n", |
3087 label_position ); | |
3839 | 3088 fprintf(fp," oper->_label = label;\n"); |
0 | 3089 fprintf(fp," oper->_block_num = block_num;\n"); |
3090 fprintf(fp,"}\n"); | |
3853
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
3091 // Save the label |
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
3092 fprintf(fp,"void %sNode::save_label( Label** label, uint* block_num ) {\n", instr->_ident); |
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
3093 fprintf(fp," labelOper* oper = (labelOper*)(opnd_array(%d));\n", |
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
3094 label_position ); |
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
3095 fprintf(fp," *label = oper->_label;\n"); |
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
3096 fprintf(fp," *block_num = oper->_block_num;\n"); |
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
3097 fprintf(fp,"}\n"); |
0 | 3098 } |
3099 } | |
3100 | |
3101 // Output the definitions for methods | |
3102 _instructions.reset(); | |
3103 while( (instr = (InstructForm*)_instructions.iter()) != NULL ) { | |
3104 // Ensure this is a machine-world instruction | |
3105 if ( instr->ideal_only() ) continue; | |
3106 | |
3107 // Access the fields for operand Label | |
3108 int method_position = instr->method_position(); | |
3109 if( method_position != -1 ) { | |
3110 // Access the method's address | |
3111 fprintf(fp,"void %sNode::method_set( intptr_t method ) {\n", instr->_ident); | |
3112 fprintf(fp," ((methodOper*)opnd_array(%d))->_method = method;\n", | |
3113 method_position ); | |
3114 fprintf(fp,"}\n"); | |
3115 fprintf(fp,"\n"); | |
3116 } | |
3117 } | |
3118 | |
3119 // Define this instruction's number of relocation entries, base is '0' | |
3120 _instructions.reset(); | |
3121 while( (instr = (InstructForm*)_instructions.iter()) != NULL ) { | |
3122 // Output the definition for number of relocation entries | |
3123 uint reloc_size = instr->reloc(_globalNames); | |
3124 if ( reloc_size != 0 ) { | |
6850 | 3125 fprintf(fp,"int %sNode::reloc() const {\n", instr->_ident); |
3126 fprintf(fp," return %d;\n", reloc_size); | |
0 | 3127 fprintf(fp,"}\n"); |
3128 fprintf(fp,"\n"); | |
3129 } | |
3130 } | |
3131 fprintf(fp,"\n"); | |
3132 | |
3133 // Output the definitions for code generation | |
3134 // | |
3135 // address ___Node::emit(address ptr, PhaseRegAlloc *ra_) const { | |
3136 // // ... encoding defined by user | |
3137 // return ptr; | |
3138 // } | |
3139 // | |
3140 _instructions.reset(); | |
3141 for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3142 // Ensure this is a machine-world instruction | |
3143 if ( instr->ideal_only() ) continue; | |
3144 | |
2008 | 3145 if (instr->_insencode) defineEmit (fp, *instr); |
3146 if (instr->is_mach_constant()) defineEvalConstant(fp, *instr); | |
3147 if (instr->_size) defineSize (fp, *instr); | |
0 | 3148 |
3149 // side-call to generate output that used to be in the header file: | |
3150 extern void gen_inst_format(FILE *fp, FormDict &globals, InstructForm &oper, bool for_c_file); | |
3151 gen_inst_format(_CPP_FORMAT_file._fp, _globalNames, *instr, true); | |
3152 } | |
3153 | |
3154 // Output the definitions for alias analysis | |
3155 _instructions.reset(); | |
3156 for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3157 // Ensure this is a machine-world instruction | |
3158 if ( instr->ideal_only() ) continue; | |
3159 | |
3160 // Analyze machine instructions that either USE or DEF memory. | |
3161 int memory_operand = instr->memory_operand(_globalNames); | |
3162 // Some guys kill all of memory | |
3163 if ( instr->is_wide_memory_kill(_globalNames) ) { | |
3164 memory_operand = InstructForm::MANY_MEMORY_OPERANDS; | |
3165 } | |
3166 | |
3167 if ( memory_operand != InstructForm::NO_MEMORY_OPERAND ) { | |
3168 if( memory_operand == InstructForm::MANY_MEMORY_OPERANDS ) { | |
3169 fprintf(fp,"const TypePtr *%sNode::adr_type() const { return TypePtr::BOTTOM; }\n", instr->_ident); | |
3170 fprintf(fp,"const MachOper* %sNode::memory_operand() const { return (MachOper*)-1; }\n", instr->_ident); | |
3171 } else { | |
3172 fprintf(fp,"const MachOper* %sNode::memory_operand() const { return _opnds[%d]; }\n", instr->_ident, memory_operand); | |
3173 } | |
3174 } | |
3175 } | |
3176 | |
3177 // Get the length of the longest identifier | |
3178 int max_ident_len = 0; | |
3179 _instructions.reset(); | |
3180 | |
3181 for ( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3182 if (instr->_ins_pipe && _pipeline->_classlist.search(instr->_ins_pipe)) { | |
3183 int ident_len = (int)strlen(instr->_ident); | |
3184 if( max_ident_len < ident_len ) | |
3185 max_ident_len = ident_len; | |
3186 } | |
3187 } | |
3188 | |
3189 // Emit specifically for Node(s) | |
3190 fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*s::pipeline_class() { return %s; }\n", | |
3191 max_ident_len, "Node", _pipeline ? "(&pipeline_class_Zero_Instructions)" : "NULL"); | |
3192 fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*s::pipeline() const { return %s; }\n", | |
3193 max_ident_len, "Node", _pipeline ? "(&pipeline_class_Zero_Instructions)" : "NULL"); | |
3194 fprintf(_CPP_PIPELINE_file._fp, "\n"); | |
3195 | |
3196 fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*s::pipeline_class() { return %s; }\n", | |
3197 max_ident_len, "MachNode", _pipeline ? "(&pipeline_class_Unknown_Instructions)" : "NULL"); | |
3198 fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*s::pipeline() const { return pipeline_class(); }\n", | |
3199 max_ident_len, "MachNode"); | |
3200 fprintf(_CPP_PIPELINE_file._fp, "\n"); | |
3201 | |
3202 // Output the definitions for machine node specific pipeline data | |
3203 _machnodes.reset(); | |
3204 | |
3205 for ( ; (machnode = (MachNodeForm*)_machnodes.iter()) != NULL; ) { | |
3206 fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %sNode::pipeline() const { return (&pipeline_class_%03d); }\n", | |
3207 machnode->_ident, ((class PipeClassForm *)_pipeline->_classdict[machnode->_machnode_pipe])->_num); | |
3208 } | |
3209 | |
3210 fprintf(_CPP_PIPELINE_file._fp, "\n"); | |
3211 | |
3212 // Output the definitions for instruction pipeline static data references | |
3213 _instructions.reset(); | |
3214 | |
3215 for ( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3216 if (instr->_ins_pipe && _pipeline->_classlist.search(instr->_ins_pipe)) { | |
3217 fprintf(_CPP_PIPELINE_file._fp, "\n"); | |
3218 fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*sNode::pipeline_class() { return (&pipeline_class_%03d); }\n", | |
3219 max_ident_len, instr->_ident, ((class PipeClassForm *)_pipeline->_classdict[instr->_ins_pipe])->_num); | |
3220 fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*sNode::pipeline() const { return (&pipeline_class_%03d); }\n", | |
3221 max_ident_len, instr->_ident, ((class PipeClassForm *)_pipeline->_classdict[instr->_ins_pipe])->_num); | |
3222 } | |
3223 } | |
3224 } | |
3225 | |
3226 | |
3227 // -------------------------------- maps ------------------------------------ | |
3228 | |
3229 // Information needed to generate the ReduceOp mapping for the DFA | |
3230 class OutputReduceOp : public OutputMap { | |
3231 public: | |
3232 OutputReduceOp(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD) | |
6850 | 3233 : OutputMap(hpp, cpp, globals, AD, "reduceOp") {}; |
0 | 3234 |
3235 void declaration() { fprintf(_hpp, "extern const int reduceOp[];\n"); } | |
3236 void definition() { fprintf(_cpp, "const int reduceOp[] = {\n"); } | |
3237 void closing() { fprintf(_cpp, " 0 // no trailing comma\n"); | |
3238 OutputMap::closing(); | |
3239 } | |
3240 void map(OpClassForm &opc) { | |
3241 const char *reduce = opc._ident; | |
3242 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3243 else fprintf(_cpp, " 0"); | |
3244 } | |
3245 void map(OperandForm &oper) { | |
3246 // Most operands without match rules, e.g. eFlagsReg, do not have a result operand | |
3247 const char *reduce = (oper._matrule ? oper.reduce_result() : NULL); | |
3248 // operand stackSlot does not have a match rule, but produces a stackSlot | |
3249 if( oper.is_user_name_for_sReg() != Form::none ) reduce = oper.reduce_result(); | |
3250 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3251 else fprintf(_cpp, " 0"); | |
3252 } | |
3253 void map(InstructForm &inst) { | |
3254 const char *reduce = (inst._matrule ? inst.reduce_result() : NULL); | |
3255 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3256 else fprintf(_cpp, " 0"); | |
3257 } | |
3258 void map(char *reduce) { | |
3259 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3260 else fprintf(_cpp, " 0"); | |
3261 } | |
3262 }; | |
3263 | |
3264 // Information needed to generate the LeftOp mapping for the DFA | |
3265 class OutputLeftOp : public OutputMap { | |
3266 public: | |
3267 OutputLeftOp(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD) | |
6850 | 3268 : OutputMap(hpp, cpp, globals, AD, "leftOp") {}; |
0 | 3269 |
3270 void declaration() { fprintf(_hpp, "extern const int leftOp[];\n"); } | |
3271 void definition() { fprintf(_cpp, "const int leftOp[] = {\n"); } | |
3272 void closing() { fprintf(_cpp, " 0 // no trailing comma\n"); | |
3273 OutputMap::closing(); | |
3274 } | |
3275 void map(OpClassForm &opc) { fprintf(_cpp, " 0"); } | |
3276 void map(OperandForm &oper) { | |
3277 const char *reduce = oper.reduce_left(_globals); | |
3278 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3279 else fprintf(_cpp, " 0"); | |
3280 } | |
3281 void map(char *name) { | |
3282 const char *reduce = _AD.reduceLeft(name); | |
3283 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3284 else fprintf(_cpp, " 0"); | |
3285 } | |
3286 void map(InstructForm &inst) { | |
3287 const char *reduce = inst.reduce_left(_globals); | |
3288 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3289 else fprintf(_cpp, " 0"); | |
3290 } | |
3291 }; | |
3292 | |
3293 | |
3294 // Information needed to generate the RightOp mapping for the DFA | |
3295 class OutputRightOp : public OutputMap { | |
3296 public: | |
3297 OutputRightOp(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD) | |
6850 | 3298 : OutputMap(hpp, cpp, globals, AD, "rightOp") {}; |
0 | 3299 |
3300 void declaration() { fprintf(_hpp, "extern const int rightOp[];\n"); } | |
3301 void definition() { fprintf(_cpp, "const int rightOp[] = {\n"); } | |
3302 void closing() { fprintf(_cpp, " 0 // no trailing comma\n"); | |
3303 OutputMap::closing(); | |
3304 } | |
3305 void map(OpClassForm &opc) { fprintf(_cpp, " 0"); } | |
3306 void map(OperandForm &oper) { | |
3307 const char *reduce = oper.reduce_right(_globals); | |
3308 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3309 else fprintf(_cpp, " 0"); | |
3310 } | |
3311 void map(char *name) { | |
3312 const char *reduce = _AD.reduceRight(name); | |
3313 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3314 else fprintf(_cpp, " 0"); | |
3315 } | |
3316 void map(InstructForm &inst) { | |
3317 const char *reduce = inst.reduce_right(_globals); | |
3318 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3319 else fprintf(_cpp, " 0"); | |
3320 } | |
3321 }; | |
3322 | |
3323 | |
3324 // Information needed to generate the Rule names for the DFA | |
3325 class OutputRuleName : public OutputMap { | |
3326 public: | |
3327 OutputRuleName(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD) | |
6850 | 3328 : OutputMap(hpp, cpp, globals, AD, "ruleName") {}; |
0 | 3329 |
3330 void declaration() { fprintf(_hpp, "extern const char *ruleName[];\n"); } | |
3331 void definition() { fprintf(_cpp, "const char *ruleName[] = {\n"); } | |
6850 | 3332 void closing() { fprintf(_cpp, " \"invalid rule name\" // no trailing comma\n"); |
0 | 3333 OutputMap::closing(); |
3334 } | |
3335 void map(OpClassForm &opc) { fprintf(_cpp, " \"%s\"", _AD.machOperEnum(opc._ident) ); } | |
3336 void map(OperandForm &oper) { fprintf(_cpp, " \"%s\"", _AD.machOperEnum(oper._ident) ); } | |
3337 void map(char *name) { fprintf(_cpp, " \"%s\"", name ? name : "0"); } | |
3338 void map(InstructForm &inst){ fprintf(_cpp, " \"%s\"", inst._ident ? inst._ident : "0"); } | |
3339 }; | |
3340 | |
3341 | |
3342 // Information needed to generate the swallowed mapping for the DFA | |
3343 class OutputSwallowed : public OutputMap { | |
3344 public: | |
3345 OutputSwallowed(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD) | |
6850 | 3346 : OutputMap(hpp, cpp, globals, AD, "swallowed") {}; |
0 | 3347 |
3348 void declaration() { fprintf(_hpp, "extern const bool swallowed[];\n"); } | |
3349 void definition() { fprintf(_cpp, "const bool swallowed[] = {\n"); } | |
3350 void closing() { fprintf(_cpp, " false // no trailing comma\n"); | |
3351 OutputMap::closing(); | |
3352 } | |
3353 void map(OperandForm &oper) { // Generate the entry for this opcode | |
3354 const char *swallowed = oper.swallowed(_globals) ? "true" : "false"; | |
3355 fprintf(_cpp, " %s", swallowed); | |
3356 } | |
3357 void map(OpClassForm &opc) { fprintf(_cpp, " false"); } | |
3358 void map(char *name) { fprintf(_cpp, " false"); } | |
3359 void map(InstructForm &inst){ fprintf(_cpp, " false"); } | |
3360 }; | |
3361 | |
3362 | |
3363 // Information needed to generate the decision array for instruction chain rule | |
3364 class OutputInstChainRule : public OutputMap { | |
3365 public: | |
3366 OutputInstChainRule(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD) | |
6850 | 3367 : OutputMap(hpp, cpp, globals, AD, "instruction_chain_rule") {}; |
0 | 3368 |
3369 void declaration() { fprintf(_hpp, "extern const bool instruction_chain_rule[];\n"); } | |
3370 void definition() { fprintf(_cpp, "const bool instruction_chain_rule[] = {\n"); } | |
3371 void closing() { fprintf(_cpp, " false // no trailing comma\n"); | |
3372 OutputMap::closing(); | |
3373 } | |
3374 void map(OpClassForm &opc) { fprintf(_cpp, " false"); } | |
3375 void map(OperandForm &oper) { fprintf(_cpp, " false"); } | |
3376 void map(char *name) { fprintf(_cpp, " false"); } | |
3377 void map(InstructForm &inst) { // Check for simple chain rule | |
3378 const char *chain = inst.is_simple_chain_rule(_globals) ? "true" : "false"; | |
3379 fprintf(_cpp, " %s", chain); | |
3380 } | |
3381 }; | |
3382 | |
3383 | |
3384 //---------------------------build_map------------------------------------ | |
3385 // Build mapping from enumeration for densely packed operands | |
3386 // TO result and child types. | |
3387 void ArchDesc::build_map(OutputMap &map) { | |
3388 FILE *fp_hpp = map.decl_file(); | |
3389 FILE *fp_cpp = map.def_file(); | |
3390 int idx = 0; | |
3391 OperandForm *op; | |
3392 OpClassForm *opc; | |
3393 InstructForm *inst; | |
3394 | |
3395 // Construct this mapping | |
3396 map.declaration(); | |
3397 fprintf(fp_cpp,"\n"); | |
3398 map.definition(); | |
3399 | |
3400 // Output the mapping for operands | |
3401 map.record_position(OutputMap::BEGIN_OPERANDS, idx ); | |
3402 _operands.reset(); | |
3403 for(; (op = (OperandForm*)_operands.iter()) != NULL; ) { | |
3404 // Ensure this is a machine-world instruction | |
3405 if ( op->ideal_only() ) continue; | |
3406 | |
3407 // Generate the entry for this opcode | |
6850 | 3408 fprintf(fp_cpp, " /* %4d */", idx); map.map(*op); fprintf(fp_cpp, ",\n"); |
0 | 3409 ++idx; |
3410 }; | |
3411 fprintf(fp_cpp, " // last operand\n"); | |
3412 | |
3413 // Place all user-defined operand classes into the mapping | |
3414 map.record_position(OutputMap::BEGIN_OPCLASSES, idx ); | |
3415 _opclass.reset(); | |
3416 for(; (opc = (OpClassForm*)_opclass.iter()) != NULL; ) { | |
6850 | 3417 fprintf(fp_cpp, " /* %4d */", idx); map.map(*opc); fprintf(fp_cpp, ",\n"); |
0 | 3418 ++idx; |
3419 }; | |
3420 fprintf(fp_cpp, " // last operand class\n"); | |
3421 | |
3422 // Place all internally defined operands into the mapping | |
3423 map.record_position(OutputMap::BEGIN_INTERNALS, idx ); | |
3424 _internalOpNames.reset(); | |
3425 char *name = NULL; | |
3426 for(; (name = (char *)_internalOpNames.iter()) != NULL; ) { | |
6850 | 3427 fprintf(fp_cpp, " /* %4d */", idx); map.map(name); fprintf(fp_cpp, ",\n"); |
0 | 3428 ++idx; |
3429 }; | |
3430 fprintf(fp_cpp, " // last internally defined operand\n"); | |
3431 | |
3432 // Place all user-defined instructions into the mapping | |
3433 if( map.do_instructions() ) { | |
3434 map.record_position(OutputMap::BEGIN_INSTRUCTIONS, idx ); | |
3435 // Output all simple instruction chain rules first | |
3436 map.record_position(OutputMap::BEGIN_INST_CHAIN_RULES, idx ); | |
3437 { | |
3438 _instructions.reset(); | |
3439 for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3440 // Ensure this is a machine-world instruction | |
3441 if ( inst->ideal_only() ) continue; | |
3442 if ( ! inst->is_simple_chain_rule(_globalNames) ) continue; | |
3443 if ( inst->rematerialize(_globalNames, get_registers()) ) continue; | |
3444 | |
6850 | 3445 fprintf(fp_cpp, " /* %4d */", idx); map.map(*inst); fprintf(fp_cpp, ",\n"); |
0 | 3446 ++idx; |
3447 }; | |
3448 map.record_position(OutputMap::BEGIN_REMATERIALIZE, idx ); | |
3449 _instructions.reset(); | |
3450 for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3451 // Ensure this is a machine-world instruction | |
3452 if ( inst->ideal_only() ) continue; | |
3453 if ( ! inst->is_simple_chain_rule(_globalNames) ) continue; | |
3454 if ( ! inst->rematerialize(_globalNames, get_registers()) ) continue; | |
3455 | |
6850 | 3456 fprintf(fp_cpp, " /* %4d */", idx); map.map(*inst); fprintf(fp_cpp, ",\n"); |
0 | 3457 ++idx; |
3458 }; | |
3459 map.record_position(OutputMap::END_INST_CHAIN_RULES, idx ); | |
3460 } | |
3461 // Output all instructions that are NOT simple chain rules | |
3462 { | |
3463 _instructions.reset(); | |
3464 for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3465 // Ensure this is a machine-world instruction | |
3466 if ( inst->ideal_only() ) continue; | |
3467 if ( inst->is_simple_chain_rule(_globalNames) ) continue; | |
3468 if ( ! inst->rematerialize(_globalNames, get_registers()) ) continue; | |
3469 | |
6850 | 3470 fprintf(fp_cpp, " /* %4d */", idx); map.map(*inst); fprintf(fp_cpp, ",\n"); |
0 | 3471 ++idx; |
3472 }; | |
3473 map.record_position(OutputMap::END_REMATERIALIZE, idx ); | |
3474 _instructions.reset(); | |
3475 for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3476 // Ensure this is a machine-world instruction | |
3477 if ( inst->ideal_only() ) continue; | |
3478 if ( inst->is_simple_chain_rule(_globalNames) ) continue; | |
3479 if ( inst->rematerialize(_globalNames, get_registers()) ) continue; | |
3480 | |
6850 | 3481 fprintf(fp_cpp, " /* %4d */", idx); map.map(*inst); fprintf(fp_cpp, ",\n"); |
0 | 3482 ++idx; |
3483 }; | |
3484 } | |
3485 fprintf(fp_cpp, " // last instruction\n"); | |
3486 map.record_position(OutputMap::END_INSTRUCTIONS, idx ); | |
3487 } | |
3488 // Finish defining table | |
3489 map.closing(); | |
3490 }; | |
3491 | |
3492 | |
3493 // Helper function for buildReduceMaps | |
3494 char reg_save_policy(const char *calling_convention) { | |
3495 char callconv; | |
3496 | |
3497 if (!strcmp(calling_convention, "NS")) callconv = 'N'; | |
3498 else if (!strcmp(calling_convention, "SOE")) callconv = 'E'; | |
3499 else if (!strcmp(calling_convention, "SOC")) callconv = 'C'; | |
3500 else if (!strcmp(calling_convention, "AS")) callconv = 'A'; | |
3501 else callconv = 'Z'; | |
3502 | |
3503 return callconv; | |
3504 } | |
3505 | |
3506 //---------------------------generate_assertion_checks------------------- | |
3507 void ArchDesc::generate_adlc_verification(FILE *fp_cpp) { | |
3508 fprintf(fp_cpp, "\n"); | |
3509 | |
3510 fprintf(fp_cpp, "#ifndef PRODUCT\n"); | |
3511 fprintf(fp_cpp, "void Compile::adlc_verification() {\n"); | |
3512 globalDefs().print_asserts(fp_cpp); | |
3513 fprintf(fp_cpp, "}\n"); | |
3514 fprintf(fp_cpp, "#endif\n"); | |
3515 fprintf(fp_cpp, "\n"); | |
3516 } | |
3517 | |
3518 //---------------------------addSourceBlocks----------------------------- | |
3519 void ArchDesc::addSourceBlocks(FILE *fp_cpp) { | |
3520 if (_source.count() > 0) | |
3521 _source.output(fp_cpp); | |
3522 | |
3523 generate_adlc_verification(fp_cpp); | |
3524 } | |
3525 //---------------------------addHeaderBlocks----------------------------- | |
3526 void ArchDesc::addHeaderBlocks(FILE *fp_hpp) { | |
3527 if (_header.count() > 0) | |
3528 _header.output(fp_hpp); | |
3529 } | |
3530 //-------------------------addPreHeaderBlocks---------------------------- | |
3531 void ArchDesc::addPreHeaderBlocks(FILE *fp_hpp) { | |
3532 // Output #defines from definition block | |
3533 globalDefs().print_defines(fp_hpp); | |
3534 | |
3535 if (_pre_header.count() > 0) | |
3536 _pre_header.output(fp_hpp); | |
3537 } | |
3538 | |
3539 //---------------------------buildReduceMaps----------------------------- | |
3540 // Build mapping from enumeration for densely packed operands | |
3541 // TO result and child types. | |
3542 void ArchDesc::buildReduceMaps(FILE *fp_hpp, FILE *fp_cpp) { | |
3543 RegDef *rdef; | |
3544 RegDef *next; | |
3545 | |
3546 // The emit bodies currently require functions defined in the source block. | |
3547 | |
3548 // Build external declarations for mappings | |
3549 fprintf(fp_hpp, "\n"); | |
3550 fprintf(fp_hpp, "extern const char register_save_policy[];\n"); | |
3551 fprintf(fp_hpp, "extern const char c_reg_save_policy[];\n"); | |
3552 fprintf(fp_hpp, "extern const int register_save_type[];\n"); | |
3553 fprintf(fp_hpp, "\n"); | |
3554 | |
3555 // Construct Save-Policy array | |
3556 fprintf(fp_cpp, "// Map from machine-independent register number to register_save_policy\n"); | |
3557 fprintf(fp_cpp, "const char register_save_policy[] = {\n"); | |
3558 _register->reset_RegDefs(); | |
3559 for( rdef = _register->iter_RegDefs(); rdef != NULL; rdef = next ) { | |
3560 next = _register->iter_RegDefs(); | |
3561 char policy = reg_save_policy(rdef->_callconv); | |
3562 const char *comma = (next != NULL) ? "," : " // no trailing comma"; | |
6850 | 3563 fprintf(fp_cpp, " '%c'%s // %s\n", policy, comma, rdef->_regname); |
0 | 3564 } |
3565 fprintf(fp_cpp, "};\n\n"); | |
3566 | |
3567 // Construct Native Save-Policy array | |
3568 fprintf(fp_cpp, "// Map from machine-independent register number to c_reg_save_policy\n"); | |
3569 fprintf(fp_cpp, "const char c_reg_save_policy[] = {\n"); | |
3570 _register->reset_RegDefs(); | |
3571 for( rdef = _register->iter_RegDefs(); rdef != NULL; rdef = next ) { | |
3572 next = _register->iter_RegDefs(); | |
3573 char policy = reg_save_policy(rdef->_c_conv); | |
3574 const char *comma = (next != NULL) ? "," : " // no trailing comma"; | |
6850 | 3575 fprintf(fp_cpp, " '%c'%s // %s\n", policy, comma, rdef->_regname); |
0 | 3576 } |
3577 fprintf(fp_cpp, "};\n\n"); | |
3578 | |
3579 // Construct Register Save Type array | |
3580 fprintf(fp_cpp, "// Map from machine-independent register number to register_save_type\n"); | |
3581 fprintf(fp_cpp, "const int register_save_type[] = {\n"); | |
3582 _register->reset_RegDefs(); | |
3583 for( rdef = _register->iter_RegDefs(); rdef != NULL; rdef = next ) { | |
3584 next = _register->iter_RegDefs(); | |
3585 const char *comma = (next != NULL) ? "," : " // no trailing comma"; | |
3586 fprintf(fp_cpp, " %s%s\n", rdef->_idealtype, comma); | |
3587 } | |
3588 fprintf(fp_cpp, "};\n\n"); | |
3589 | |
3590 // Construct the table for reduceOp | |
3591 OutputReduceOp output_reduce_op(fp_hpp, fp_cpp, _globalNames, *this); | |
3592 build_map(output_reduce_op); | |
3593 // Construct the table for leftOp | |
3594 OutputLeftOp output_left_op(fp_hpp, fp_cpp, _globalNames, *this); | |
3595 build_map(output_left_op); | |
3596 // Construct the table for rightOp | |
3597 OutputRightOp output_right_op(fp_hpp, fp_cpp, _globalNames, *this); | |
3598 build_map(output_right_op); | |
3599 // Construct the table of rule names | |
3600 OutputRuleName output_rule_name(fp_hpp, fp_cpp, _globalNames, *this); | |
3601 build_map(output_rule_name); | |
3602 // Construct the boolean table for subsumed operands | |
3603 OutputSwallowed output_swallowed(fp_hpp, fp_cpp, _globalNames, *this); | |
3604 build_map(output_swallowed); | |
3605 // // // Preserve in case we decide to use this table instead of another | |
3606 //// Construct the boolean table for instruction chain rules | |
3607 //OutputInstChainRule output_inst_chain(fp_hpp, fp_cpp, _globalNames, *this); | |
3608 //build_map(output_inst_chain); | |
3609 | |
3610 } | |
3611 | |
3612 | |
3613 //---------------------------buildMachOperGenerator--------------------------- | |
3614 | |
3615 // Recurse through match tree, building path through corresponding state tree, | |
3616 // Until we reach the constant we are looking for. | |
3617 static void path_to_constant(FILE *fp, FormDict &globals, | |
3618 MatchNode *mnode, uint idx) { | |
3619 if ( ! mnode) return; | |
3620 | |
3621 unsigned position = 0; | |
3622 const char *result = NULL; | |
3623 const char *name = NULL; | |
3624 const char *optype = NULL; | |
3625 | |
3626 // Base Case: access constant in ideal node linked to current state node | |
3627 // Each type of constant has its own access function | |
3628 if ( (mnode->_lChild == NULL) && (mnode->_rChild == NULL) | |
3629 && mnode->base_operand(position, globals, result, name, optype) ) { | |
3630 if ( strcmp(optype,"ConI") == 0 ) { | |
3631 fprintf(fp, "_leaf->get_int()"); | |
3632 } else if ( (strcmp(optype,"ConP") == 0) ) { | |
3633 fprintf(fp, "_leaf->bottom_type()->is_ptr()"); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
3634 } else if ( (strcmp(optype,"ConN") == 0) ) { |
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
3635 fprintf(fp, "_leaf->bottom_type()->is_narrowoop()"); |
6848
8e47bac5643a
7054512: Compress class pointers after perm gen removal
roland
parents:
6804
diff
changeset
|
3636 } else if ( (strcmp(optype,"ConNKlass") == 0) ) { |
8e47bac5643a
7054512: Compress class pointers after perm gen removal
roland
parents:
6804
diff
changeset
|
3637 fprintf(fp, "_leaf->bottom_type()->is_narrowklass()"); |
0 | 3638 } else if ( (strcmp(optype,"ConF") == 0) ) { |
3639 fprintf(fp, "_leaf->getf()"); | |
3640 } else if ( (strcmp(optype,"ConD") == 0) ) { | |
3641 fprintf(fp, "_leaf->getd()"); | |
3642 } else if ( (strcmp(optype,"ConL") == 0) ) { | |
3643 fprintf(fp, "_leaf->get_long()"); | |
3644 } else if ( (strcmp(optype,"Con")==0) ) { | |
3645 // !!!!! - Update if adding a machine-independent constant type | |
3646 fprintf(fp, "_leaf->get_int()"); | |
3647 assert( false, "Unsupported constant type, pointer or indefinite"); | |
3648 } else if ( (strcmp(optype,"Bool") == 0) ) { | |
3649 fprintf(fp, "_leaf->as_Bool()->_test._test"); | |
3650 } else { | |
3651 assert( false, "Unsupported constant type"); | |
3652 } | |
3653 return; | |
3654 } | |
3655 | |
3656 // If constant is in left child, build path and recurse | |
3657 uint lConsts = (mnode->_lChild) ? (mnode->_lChild->num_consts(globals) ) : 0; | |
3658 uint rConsts = (mnode->_rChild) ? (mnode->_rChild->num_consts(globals) ) : 0; | |
3659 if ( (mnode->_lChild) && (lConsts > idx) ) { | |
3660 fprintf(fp, "_kids[0]->"); | |
3661 path_to_constant(fp, globals, mnode->_lChild, idx); | |
3662 return; | |
3663 } | |
3664 // If constant is in right child, build path and recurse | |
3665 if ( (mnode->_rChild) && (rConsts > (idx - lConsts) ) ) { | |
3666 idx = idx - lConsts; | |
3667 fprintf(fp, "_kids[1]->"); | |
3668 path_to_constant(fp, globals, mnode->_rChild, idx); | |
3669 return; | |
3670 } | |
3671 assert( false, "ShouldNotReachHere()"); | |
3672 } | |
3673 | |
3674 // Generate code that is executed when generating a specific Machine Operand | |
3675 static void genMachOperCase(FILE *fp, FormDict &globalNames, ArchDesc &AD, | |
3676 OperandForm &op) { | |
3677 const char *opName = op._ident; | |
3678 const char *opEnumName = AD.machOperEnum(opName); | |
3679 uint num_consts = op.num_consts(globalNames); | |
3680 | |
3681 // Generate the case statement for this opcode | |
3682 fprintf(fp, " case %s:", opEnumName); | |
3683 fprintf(fp, "\n return new (C) %sOper(", opName); | |
3684 // Access parameters for constructor from the stat object | |
3685 // | |
3686 // Build access to condition code value | |
3687 if ( (num_consts > 0) ) { | |
3688 uint i = 0; | |
3689 path_to_constant(fp, globalNames, op._matrule, i); | |
3690 for ( i = 1; i < num_consts; ++i ) { | |
3691 fprintf(fp, ", "); | |
3692 path_to_constant(fp, globalNames, op._matrule, i); | |
3693 } | |
3694 } | |
3695 fprintf(fp, " );\n"); | |
3696 } | |
3697 | |
3698 | |
3699 // Build switch to invoke "new" MachNode or MachOper | |
3700 void ArchDesc::buildMachOperGenerator(FILE *fp_cpp) { | |
3701 int idx = 0; | |
3702 | |
3703 // Build switch to invoke 'new' for a specific MachOper | |
3704 fprintf(fp_cpp, "\n"); | |
3705 fprintf(fp_cpp, "\n"); | |
3706 fprintf(fp_cpp, | |
3707 "//------------------------- MachOper Generator ---------------\n"); | |
3708 fprintf(fp_cpp, | |
3709 "// A switch statement on the dense-packed user-defined type system\n" | |
3710 "// that invokes 'new' on the corresponding class constructor.\n"); | |
3711 fprintf(fp_cpp, "\n"); | |
3712 fprintf(fp_cpp, "MachOper *State::MachOperGenerator"); | |
3713 fprintf(fp_cpp, "(int opcode, Compile* C)"); | |
3714 fprintf(fp_cpp, "{\n"); | |
3715 fprintf(fp_cpp, "\n"); | |
3716 fprintf(fp_cpp, " switch(opcode) {\n"); | |
3717 | |
3718 // Place all user-defined operands into the mapping | |
3719 _operands.reset(); | |
3720 int opIndex = 0; | |
3721 OperandForm *op; | |
3722 for( ; (op = (OperandForm*)_operands.iter()) != NULL; ) { | |
3723 // Ensure this is a machine-world instruction | |
3724 if ( op->ideal_only() ) continue; | |
3725 | |
3726 genMachOperCase(fp_cpp, _globalNames, *this, *op); | |
3727 }; | |
3728 | |
3729 // Do not iterate over operand classes for the operand generator!!! | |
3730 | |
3731 // Place all internal operands into the mapping | |
3732 _internalOpNames.reset(); | |
3733 const char *iopn; | |
3734 for( ; (iopn = _internalOpNames.iter()) != NULL; ) { | |
3735 const char *opEnumName = machOperEnum(iopn); | |
3736 // Generate the case statement for this opcode | |
3737 fprintf(fp_cpp, " case %s:", opEnumName); | |
3738 fprintf(fp_cpp, " return NULL;\n"); | |
3739 }; | |
3740 | |
3741 // Generate the default case for switch(opcode) | |
3742 fprintf(fp_cpp, " \n"); | |
3743 fprintf(fp_cpp, " default:\n"); | |
3744 fprintf(fp_cpp, " fprintf(stderr, \"Default MachOper Generator invoked for: \\n\");\n"); | |
3745 fprintf(fp_cpp, " fprintf(stderr, \" opcode = %cd\\n\", opcode);\n", '%'); | |
3746 fprintf(fp_cpp, " break;\n"); | |
3747 fprintf(fp_cpp, " }\n"); | |
3748 | |
3749 // Generate the closing for method Matcher::MachOperGenerator | |
3750 fprintf(fp_cpp, " return NULL;\n"); | |
3751 fprintf(fp_cpp, "};\n"); | |
3752 } | |
3753 | |
3754 | |
3755 //---------------------------buildMachNode------------------------------------- | |
3756 // Build a new MachNode, for MachNodeGenerator or cisc-spilling | |
3757 void ArchDesc::buildMachNode(FILE *fp_cpp, InstructForm *inst, const char *indent) { | |
3758 const char *opType = NULL; | |
3759 const char *opClass = inst->_ident; | |
3760 | |
3761 // Create the MachNode object | |
3762 fprintf(fp_cpp, "%s %sNode *node = new (C) %sNode();\n",indent, opClass,opClass); | |
3763 | |
3764 if ( (inst->num_post_match_opnds() != 0) ) { | |
3765 // Instruction that contains operands which are not in match rule. | |
3766 // | |
3767 // Check if the first post-match component may be an interesting def | |
3768 bool dont_care = false; | |
3769 ComponentList &comp_list = inst->_components; | |
3770 Component *comp = NULL; | |
3771 comp_list.reset(); | |
3772 if ( comp_list.match_iter() != NULL ) dont_care = true; | |
3773 | |
3774 // Insert operands that are not in match-rule. | |
3775 // Only insert a DEF if the do_care flag is set | |
3776 comp_list.reset(); | |
3777 while ( comp = comp_list.post_match_iter() ) { | |
3778 // Check if we don't care about DEFs or KILLs that are not USEs | |
3779 if ( dont_care && (! comp->isa(Component::USE)) ) { | |
3780 continue; | |
3781 } | |
3782 dont_care = true; | |
3783 // For each operand not in the match rule, call MachOperGenerator | |
2254
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
3784 // with the enum for the opcode that needs to be built. |
0 | 3785 ComponentList clist = inst->_components; |
6850 | 3786 int index = clist.operand_position(comp->_name, comp->_usedef, inst); |
0 | 3787 const char *opcode = machOperEnum(comp->_type); |
3788 fprintf(fp_cpp, "%s node->set_opnd_array(%d, ", indent, index); | |
3789 fprintf(fp_cpp, "MachOperGenerator(%s, C));\n", opcode); | |
3790 } | |
3791 } | |
3792 else if ( inst->is_chain_of_constant(_globalNames, opType) ) { | |
3793 // An instruction that chains from a constant! | |
3794 // In this case, we need to subsume the constant into the node | |
3795 // at operand position, oper_input_base(). | |
3796 // | |
3797 // Fill in the constant | |
3798 fprintf(fp_cpp, "%s node->_opnd_array[%d] = ", indent, | |
3799 inst->oper_input_base(_globalNames)); | |
3800 // ##### | |
3801 // Check for multiple constants and then fill them in. | |
3802 // Just like MachOperGenerator | |
3803 const char *opName = inst->_matrule->_rChild->_opType; | |
3804 fprintf(fp_cpp, "new (C) %sOper(", opName); | |
3805 // Grab operand form | |
3806 OperandForm *op = (_globalNames[opName])->is_operand(); | |
3807 // Look up the number of constants | |
3808 uint num_consts = op->num_consts(_globalNames); | |
3809 if ( (num_consts > 0) ) { | |
3810 uint i = 0; | |
3811 path_to_constant(fp_cpp, _globalNames, op->_matrule, i); | |
3812 for ( i = 1; i < num_consts; ++i ) { | |
3813 fprintf(fp_cpp, ", "); | |
3814 path_to_constant(fp_cpp, _globalNames, op->_matrule, i); | |
3815 } | |
3816 } | |
3817 fprintf(fp_cpp, " );\n"); | |
3818 // ##### | |
3819 } | |
3820 | |
3821 // Fill in the bottom_type where requested | |
1541
b5fdf39b9749
6953576: bottom_type for matched AddPNodes doesn't always agree with ideal
never
parents:
1489
diff
changeset
|
3822 if ( inst->captures_bottom_type(_globalNames) ) { |
0 | 3823 fprintf(fp_cpp, "%s node->_bottom_type = _leaf->bottom_type();\n", indent); |
3824 } | |
3825 if( inst->is_ideal_if() ) { | |
3826 fprintf(fp_cpp, "%s node->_prob = _leaf->as_If()->_prob;\n", indent); | |
3827 fprintf(fp_cpp, "%s node->_fcnt = _leaf->as_If()->_fcnt;\n", indent); | |
3828 } | |
3829 if( inst->is_ideal_fastlock() ) { | |
3830 fprintf(fp_cpp, "%s node->_counters = _leaf->as_FastLock()->counters();\n", indent); | |
3831 } | |
3832 | |
3833 } | |
3834 | |
3835 //---------------------------declare_cisc_version------------------------------ | |
3836 // Build CISC version of this instruction | |
3837 void InstructForm::declare_cisc_version(ArchDesc &AD, FILE *fp_hpp) { | |
3838 if( AD.can_cisc_spill() ) { | |
3839 InstructForm *inst_cisc = cisc_spill_alternate(); | |
3840 if (inst_cisc != NULL) { | |
3841 fprintf(fp_hpp, " virtual int cisc_operand() const { return %d; }\n", cisc_spill_operand()); | |
3842 fprintf(fp_hpp, " virtual MachNode *cisc_version(int offset, Compile* C);\n"); | |
3843 fprintf(fp_hpp, " virtual void use_cisc_RegMask();\n"); | |
3844 fprintf(fp_hpp, " virtual const RegMask *cisc_RegMask() const { return _cisc_RegMask; }\n"); | |
3845 } | |
3846 } | |
3847 } | |
3848 | |
3849 //---------------------------define_cisc_version------------------------------- | |
3850 // Build CISC version of this instruction | |
3851 bool InstructForm::define_cisc_version(ArchDesc &AD, FILE *fp_cpp) { | |
3852 InstructForm *inst_cisc = this->cisc_spill_alternate(); | |
3853 if( AD.can_cisc_spill() && (inst_cisc != NULL) ) { | |
3854 const char *name = inst_cisc->_ident; | |
3855 assert( inst_cisc->num_opnds() == this->num_opnds(), "Must have same number of operands"); | |
3856 OperandForm *cisc_oper = AD.cisc_spill_operand(); | |
3857 assert( cisc_oper != NULL, "insanity check"); | |
3858 const char *cisc_oper_name = cisc_oper->_ident; | |
3859 assert( cisc_oper_name != NULL, "insanity check"); | |
3860 // | |
3861 // Set the correct reg_mask_or_stack for the cisc operand | |
3862 fprintf(fp_cpp, "\n"); | |
3863 fprintf(fp_cpp, "void %sNode::use_cisc_RegMask() {\n", this->_ident); | |
3864 // Lookup the correct reg_mask_or_stack | |
3865 const char *reg_mask_name = cisc_reg_mask_name(); | |
3866 fprintf(fp_cpp, " _cisc_RegMask = &STACK_OR_%s;\n", reg_mask_name); | |
3867 fprintf(fp_cpp, "}\n"); | |
3868 // | |
3869 // Construct CISC version of this instruction | |
3870 fprintf(fp_cpp, "\n"); | |
3871 fprintf(fp_cpp, "// Build CISC version of this instruction\n"); | |
3872 fprintf(fp_cpp, "MachNode *%sNode::cisc_version( int offset, Compile* C ) {\n", this->_ident); | |
3873 // Create the MachNode object | |
3874 fprintf(fp_cpp, " %sNode *node = new (C) %sNode();\n", name, name); | |
3875 // Fill in the bottom_type where requested | |
1541
b5fdf39b9749
6953576: bottom_type for matched AddPNodes doesn't always agree with ideal
never
parents:
1489
diff
changeset
|
3876 if ( this->captures_bottom_type(AD.globalNames()) ) { |
0 | 3877 fprintf(fp_cpp, " node->_bottom_type = bottom_type();\n"); |
3878 } | |
785 | 3879 |
3880 uint cur_num_opnds = num_opnds(); | |
3881 if (cur_num_opnds > 1 && cur_num_opnds != num_unique_opnds()) { | |
3882 fprintf(fp_cpp," node->_num_opnds = %d;\n", num_unique_opnds()); | |
3883 } | |
3884 | |
0 | 3885 fprintf(fp_cpp, "\n"); |
3886 fprintf(fp_cpp, " // Copy _idx, inputs and operands to new node\n"); | |
3887 fprintf(fp_cpp, " fill_new_machnode(node, C);\n"); | |
3888 // Construct operand to access [stack_pointer + offset] | |
3889 fprintf(fp_cpp, " // Construct operand to access [stack_pointer + offset]\n"); | |
3890 fprintf(fp_cpp, " node->set_opnd_array(cisc_operand(), new (C) %sOper(offset));\n", cisc_oper_name); | |
3891 fprintf(fp_cpp, "\n"); | |
3892 | |
3893 // Return result and exit scope | |
3894 fprintf(fp_cpp, " return node;\n"); | |
3895 fprintf(fp_cpp, "}\n"); | |
3896 fprintf(fp_cpp, "\n"); | |
3897 return true; | |
3898 } | |
3899 return false; | |
3900 } | |
3901 | |
3902 //---------------------------declare_short_branch_methods---------------------- | |
3903 // Build prototypes for short branch methods | |
3904 void InstructForm::declare_short_branch_methods(FILE *fp_hpp) { | |
3905 if (has_short_branch_form()) { | |
3906 fprintf(fp_hpp, " virtual MachNode *short_branch_version(Compile* C);\n"); | |
3907 } | |
3908 } | |
3909 | |
3910 //---------------------------define_short_branch_methods----------------------- | |
3911 // Build definitions for short branch methods | |
1541
b5fdf39b9749
6953576: bottom_type for matched AddPNodes doesn't always agree with ideal
never
parents:
1489
diff
changeset
|
3912 bool InstructForm::define_short_branch_methods(ArchDesc &AD, FILE *fp_cpp) { |
0 | 3913 if (has_short_branch_form()) { |
3914 InstructForm *short_branch = short_branch_form(); | |
3915 const char *name = short_branch->_ident; | |
3916 | |
3917 // Construct short_branch_version() method. | |
3918 fprintf(fp_cpp, "// Build short branch version of this instruction\n"); | |
3919 fprintf(fp_cpp, "MachNode *%sNode::short_branch_version(Compile* C) {\n", this->_ident); | |
3920 // Create the MachNode object | |
3921 fprintf(fp_cpp, " %sNode *node = new (C) %sNode();\n", name, name); | |
3922 if( is_ideal_if() ) { | |
3923 fprintf(fp_cpp, " node->_prob = _prob;\n"); | |
3924 fprintf(fp_cpp, " node->_fcnt = _fcnt;\n"); | |
3925 } | |
3926 // Fill in the bottom_type where requested | |
1541
b5fdf39b9749
6953576: bottom_type for matched AddPNodes doesn't always agree with ideal
never
parents:
1489
diff
changeset
|
3927 if ( this->captures_bottom_type(AD.globalNames()) ) { |
0 | 3928 fprintf(fp_cpp, " node->_bottom_type = bottom_type();\n"); |
3929 } | |
3930 | |
3931 fprintf(fp_cpp, "\n"); | |
3932 // Short branch version must use same node index for access | |
3933 // through allocator's tables | |
3934 fprintf(fp_cpp, " // Copy _idx, inputs and operands to new node\n"); | |
3935 fprintf(fp_cpp, " fill_new_machnode(node, C);\n"); | |
3936 | |
3937 // Return result and exit scope | |
3938 fprintf(fp_cpp, " return node;\n"); | |
3939 fprintf(fp_cpp, "}\n"); | |
3940 fprintf(fp_cpp,"\n"); | |
3941 return true; | |
3942 } | |
3943 return false; | |
3944 } | |
3945 | |
3946 | |
3947 //---------------------------buildMachNodeGenerator---------------------------- | |
3948 // Build switch to invoke appropriate "new" MachNode for an opcode | |
3949 void ArchDesc::buildMachNodeGenerator(FILE *fp_cpp) { | |
3950 | |
3951 // Build switch to invoke 'new' for a specific MachNode | |
3952 fprintf(fp_cpp, "\n"); | |
3953 fprintf(fp_cpp, "\n"); | |
3954 fprintf(fp_cpp, | |
3955 "//------------------------- MachNode Generator ---------------\n"); | |
3956 fprintf(fp_cpp, | |
3957 "// A switch statement on the dense-packed user-defined type system\n" | |
3958 "// that invokes 'new' on the corresponding class constructor.\n"); | |
3959 fprintf(fp_cpp, "\n"); | |
3960 fprintf(fp_cpp, "MachNode *State::MachNodeGenerator"); | |
3961 fprintf(fp_cpp, "(int opcode, Compile* C)"); | |
3962 fprintf(fp_cpp, "{\n"); | |
3963 fprintf(fp_cpp, " switch(opcode) {\n"); | |
3964 | |
3965 // Provide constructor for all user-defined instructions | |
3966 _instructions.reset(); | |
3967 int opIndex = operandFormCount(); | |
3968 InstructForm *inst; | |
3969 for( ; (inst = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3970 // Ensure that matrule is defined. | |
3971 if ( inst->_matrule == NULL ) continue; | |
3972 | |
3973 int opcode = opIndex++; | |
3974 const char *opClass = inst->_ident; | |
3975 char *opType = NULL; | |
3976 | |
3977 // Generate the case statement for this instruction | |
3978 fprintf(fp_cpp, " case %s_rule:", opClass); | |
3979 | |
3980 // Start local scope | |
6850 | 3981 fprintf(fp_cpp, " {\n"); |
0 | 3982 // Generate code to construct the new MachNode |
3983 buildMachNode(fp_cpp, inst, " "); | |
3984 // Return result and exit scope | |
3985 fprintf(fp_cpp, " return node;\n"); | |
3986 fprintf(fp_cpp, " }\n"); | |
3987 } | |
3988 | |
3989 // Generate the default case for switch(opcode) | |
3990 fprintf(fp_cpp, " \n"); | |
3991 fprintf(fp_cpp, " default:\n"); | |
3992 fprintf(fp_cpp, " fprintf(stderr, \"Default MachNode Generator invoked for: \\n\");\n"); | |
3993 fprintf(fp_cpp, " fprintf(stderr, \" opcode = %cd\\n\", opcode);\n", '%'); | |
3994 fprintf(fp_cpp, " break;\n"); | |
3995 fprintf(fp_cpp, " };\n"); | |
3996 | |
3997 // Generate the closing for method Matcher::MachNodeGenerator | |
3998 fprintf(fp_cpp, " return NULL;\n"); | |
3999 fprintf(fp_cpp, "}\n"); | |
4000 } | |
4001 | |
4002 | |
4003 //---------------------------buildInstructMatchCheck-------------------------- | |
4004 // Output the method to Matcher which checks whether or not a specific | |
4005 // instruction has a matching rule for the host architecture. | |
4006 void ArchDesc::buildInstructMatchCheck(FILE *fp_cpp) const { | |
4007 fprintf(fp_cpp, "\n\n"); | |
4008 fprintf(fp_cpp, "const bool Matcher::has_match_rule(int opcode) {\n"); | |
4009 fprintf(fp_cpp, " assert(_last_machine_leaf < opcode && opcode < _last_opcode, \"opcode in range\");\n"); | |
4010 fprintf(fp_cpp, " return _hasMatchRule[opcode];\n"); | |
4011 fprintf(fp_cpp, "}\n\n"); | |
4012 | |
4013 fprintf(fp_cpp, "const bool Matcher::_hasMatchRule[_last_opcode] = {\n"); | |
4014 int i; | |
4015 for (i = 0; i < _last_opcode - 1; i++) { | |
4016 fprintf(fp_cpp, " %-5s, // %s\n", | |
4017 _has_match_rule[i] ? "true" : "false", | |
4018 NodeClassNames[i]); | |
4019 } | |
4020 fprintf(fp_cpp, " %-5s // %s\n", | |
4021 _has_match_rule[i] ? "true" : "false", | |
4022 NodeClassNames[i]); | |
4023 fprintf(fp_cpp, "};\n"); | |
4024 } | |
4025 | |
4026 //---------------------------buildFrameMethods--------------------------------- | |
4027 // Output the methods to Matcher which specify frame behavior | |
4028 void ArchDesc::buildFrameMethods(FILE *fp_cpp) { | |
4029 fprintf(fp_cpp,"\n\n"); | |
4030 // Stack Direction | |
4031 fprintf(fp_cpp,"bool Matcher::stack_direction() const { return %s; }\n\n", | |
4032 _frame->_direction ? "true" : "false"); | |
4033 // Sync Stack Slots | |
4034 fprintf(fp_cpp,"int Compile::sync_stack_slots() const { return %s; }\n\n", | |
4035 _frame->_sync_stack_slots); | |
4036 // Java Stack Alignment | |
4037 fprintf(fp_cpp,"uint Matcher::stack_alignment_in_bytes() { return %s; }\n\n", | |
4038 _frame->_alignment); | |
4039 // Java Return Address Location | |
4040 fprintf(fp_cpp,"OptoReg::Name Matcher::return_addr() const {"); | |
4041 if (_frame->_return_addr_loc) { | |
4042 fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n", | |
4043 _frame->_return_addr); | |
4044 } | |
4045 else { | |
4046 fprintf(fp_cpp," return OptoReg::stack2reg(%s); }\n\n", | |
4047 _frame->_return_addr); | |
4048 } | |
4049 // Java Stack Slot Preservation | |
4050 fprintf(fp_cpp,"uint Compile::in_preserve_stack_slots() "); | |
4051 fprintf(fp_cpp,"{ return %s; }\n\n", _frame->_in_preserve_slots); | |
4052 // Top Of Stack Slot Preservation, for both Java and C | |
4053 fprintf(fp_cpp,"uint Compile::out_preserve_stack_slots() "); | |
4054 fprintf(fp_cpp,"{ return SharedRuntime::out_preserve_stack_slots(); }\n\n"); | |
4055 // varargs C out slots killed | |
4056 fprintf(fp_cpp,"uint Compile::varargs_C_out_slots_killed() const "); | |
4057 fprintf(fp_cpp,"{ return %s; }\n\n", _frame->_varargs_C_out_slots_killed); | |
4058 // Java Argument Position | |
4059 fprintf(fp_cpp,"void Matcher::calling_convention(BasicType *sig_bt, VMRegPair *regs, uint length, bool is_outgoing) {\n"); | |
4060 fprintf(fp_cpp,"%s\n", _frame->_calling_convention); | |
4061 fprintf(fp_cpp,"}\n\n"); | |
4062 // Native Argument Position | |
4063 fprintf(fp_cpp,"void Matcher::c_calling_convention(BasicType *sig_bt, VMRegPair *regs, uint length) {\n"); | |
4064 fprintf(fp_cpp,"%s\n", _frame->_c_calling_convention); | |
4065 fprintf(fp_cpp,"}\n\n"); | |
4066 // Java Return Value Location | |
4067 fprintf(fp_cpp,"OptoRegPair Matcher::return_value(int ideal_reg, bool is_outgoing) {\n"); | |
4068 fprintf(fp_cpp,"%s\n", _frame->_return_value); | |
4069 fprintf(fp_cpp,"}\n\n"); | |
4070 // Native Return Value Location | |
4071 fprintf(fp_cpp,"OptoRegPair Matcher::c_return_value(int ideal_reg, bool is_outgoing) {\n"); | |
4072 fprintf(fp_cpp,"%s\n", _frame->_c_return_value); | |
4073 fprintf(fp_cpp,"}\n\n"); | |
4074 | |
4075 // Inline Cache Register, mask definition, and encoding | |
4076 fprintf(fp_cpp,"OptoReg::Name Matcher::inline_cache_reg() {"); | |
4077 fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n", | |
4078 _frame->_inline_cache_reg); | |
4079 fprintf(fp_cpp,"int Matcher::inline_cache_reg_encode() {"); | |
4080 fprintf(fp_cpp," return _regEncode[inline_cache_reg()]; }\n\n"); | |
4081 | |
4082 // Interpreter's Method Oop Register, mask definition, and encoding | |
4083 fprintf(fp_cpp,"OptoReg::Name Matcher::interpreter_method_oop_reg() {"); | |
4084 fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n", | |
4085 _frame->_interpreter_method_oop_reg); | |
4086 fprintf(fp_cpp,"int Matcher::interpreter_method_oop_reg_encode() {"); | |
4087 fprintf(fp_cpp," return _regEncode[interpreter_method_oop_reg()]; }\n\n"); | |
4088 | |
4089 // Interpreter's Frame Pointer Register, mask definition, and encoding | |
4090 fprintf(fp_cpp,"OptoReg::Name Matcher::interpreter_frame_pointer_reg() {"); | |
4091 if (_frame->_interpreter_frame_pointer_reg == NULL) | |
4092 fprintf(fp_cpp," return OptoReg::Bad; }\n\n"); | |
4093 else | |
4094 fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n", | |
4095 _frame->_interpreter_frame_pointer_reg); | |
4096 | |
4097 // Frame Pointer definition | |
4098 /* CNC - I can not contemplate having a different frame pointer between | |
4099 Java and native code; makes my head hurt to think about it. | |
4100 fprintf(fp_cpp,"OptoReg::Name Matcher::frame_pointer() const {"); | |
4101 fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n", | |
4102 _frame->_frame_pointer); | |
4103 */ | |
4104 // (Native) Frame Pointer definition | |
4105 fprintf(fp_cpp,"OptoReg::Name Matcher::c_frame_pointer() const {"); | |
4106 fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n", | |
4107 _frame->_frame_pointer); | |
4108 | |
4109 // Number of callee-save + always-save registers for calling convention | |
4110 fprintf(fp_cpp, "// Number of callee-save + always-save registers\n"); | |
4111 fprintf(fp_cpp, "int Matcher::number_of_saved_registers() {\n"); | |
4112 RegDef *rdef; | |
4113 int nof_saved_registers = 0; | |
4114 _register->reset_RegDefs(); | |
4115 while( (rdef = _register->iter_RegDefs()) != NULL ) { | |
4116 if( !strcmp(rdef->_callconv, "SOE") || !strcmp(rdef->_callconv, "AS") ) | |
4117 ++nof_saved_registers; | |
4118 } | |
4119 fprintf(fp_cpp, " return %d;\n", nof_saved_registers); | |
4120 fprintf(fp_cpp, "};\n\n"); | |
4121 } | |
4122 | |
4123 | |
4124 | |
4125 | |
4126 static int PrintAdlcCisc = 0; | |
4127 //---------------------------identify_cisc_spilling---------------------------- | |
4128 // Get info for the CISC_oracle and MachNode::cisc_version() | |
4129 void ArchDesc::identify_cisc_spill_instructions() { | |
4130 | |
6850 | 4131 if (_frame == NULL) |
4132 return; | |
4133 | |
0 | 4134 // Find the user-defined operand for cisc-spilling |
4135 if( _frame->_cisc_spilling_operand_name != NULL ) { | |
4136 const Form *form = _globalNames[_frame->_cisc_spilling_operand_name]; | |
4137 OperandForm *oper = form ? form->is_operand() : NULL; | |
4138 // Verify the user's suggestion | |
4139 if( oper != NULL ) { | |
4140 // Ensure that match field is defined. | |
4141 if ( oper->_matrule != NULL ) { | |
4142 MatchRule &mrule = *oper->_matrule; | |
4143 if( strcmp(mrule._opType,"AddP") == 0 ) { | |
4144 MatchNode *left = mrule._lChild; | |
4145 MatchNode *right= mrule._rChild; | |
4146 if( left != NULL && right != NULL ) { | |
4147 const Form *left_op = _globalNames[left->_opType]->is_operand(); | |
4148 const Form *right_op = _globalNames[right->_opType]->is_operand(); | |
4149 if( (left_op != NULL && right_op != NULL) | |
4150 && (left_op->interface_type(_globalNames) == Form::register_interface) | |
4151 && (right_op->interface_type(_globalNames) == Form::constant_interface) ) { | |
4152 // Successfully verified operand | |
4153 set_cisc_spill_operand( oper ); | |
4154 if( _cisc_spill_debug ) { | |
4155 fprintf(stderr, "\n\nVerified CISC-spill operand %s\n\n", oper->_ident); | |
4156 } | |
4157 } | |
4158 } | |
4159 } | |
4160 } | |
4161 } | |
4162 } | |
4163 | |
4164 if( cisc_spill_operand() != NULL ) { | |
4165 // N^2 comparison of instructions looking for a cisc-spilling version | |
4166 _instructions.reset(); | |
4167 InstructForm *instr; | |
4168 for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { | |
4169 // Ensure that match field is defined. | |
4170 if ( instr->_matrule == NULL ) continue; | |
4171 | |
4172 MatchRule &mrule = *instr->_matrule; | |
4173 Predicate *pred = instr->build_predicate(); | |
4174 | |
4175 // Grab the machine type of the operand | |
4176 const char *rootOp = instr->_ident; | |
4177 mrule._machType = rootOp; | |
4178 | |
4179 // Find result type for match | |
4180 const char *result = instr->reduce_result(); | |
4181 | |
4182 if( PrintAdlcCisc ) fprintf(stderr, " new instruction %s \n", instr->_ident ? instr->_ident : " "); | |
4183 bool found_cisc_alternate = false; | |
4184 _instructions.reset2(); | |
4185 InstructForm *instr2; | |
4186 for( ; !found_cisc_alternate && (instr2 = (InstructForm*)_instructions.iter2()) != NULL; ) { | |
4187 // Ensure that match field is defined. | |
4188 if( PrintAdlcCisc ) fprintf(stderr, " instr2 == %s \n", instr2->_ident ? instr2->_ident : " "); | |
4189 if ( instr2->_matrule != NULL | |
4190 && (instr != instr2 ) // Skip self | |
4191 && (instr2->reduce_result() != NULL) // want same result | |
4192 && (strcmp(result, instr2->reduce_result()) == 0)) { | |
4193 MatchRule &mrule2 = *instr2->_matrule; | |
4194 Predicate *pred2 = instr2->build_predicate(); | |
4195 found_cisc_alternate = instr->cisc_spills_to(*this, instr2); | |
4196 } | |
4197 } | |
4198 } | |
4199 } | |
4200 } | |
4201 | |
4202 //---------------------------build_cisc_spilling------------------------------- | |
4203 // Get info for the CISC_oracle and MachNode::cisc_version() | |
4204 void ArchDesc::build_cisc_spill_instructions(FILE *fp_hpp, FILE *fp_cpp) { | |
4205 // Output the table for cisc spilling | |
4206 fprintf(fp_cpp, "// The following instructions can cisc-spill\n"); | |
4207 _instructions.reset(); | |
4208 InstructForm *inst = NULL; | |
4209 for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) { | |
4210 // Ensure this is a machine-world instruction | |
4211 if ( inst->ideal_only() ) continue; | |
4212 const char *inst_name = inst->_ident; | |
4213 int operand = inst->cisc_spill_operand(); | |
4214 if( operand != AdlcVMDeps::Not_cisc_spillable ) { | |
4215 InstructForm *inst2 = inst->cisc_spill_alternate(); | |
4216 fprintf(fp_cpp, "// %s can cisc-spill operand %d to %s\n", inst->_ident, operand, inst2->_ident); | |
4217 } | |
4218 } | |
4219 fprintf(fp_cpp, "\n\n"); | |
4220 } | |
4221 | |
4222 //---------------------------identify_short_branches---------------------------- | |
4223 // Get info for our short branch replacement oracle. | |
4224 void ArchDesc::identify_short_branches() { | |
4225 // Walk over all instructions, checking to see if they match a short | |
4226 // branching alternate. | |
4227 _instructions.reset(); | |
4228 InstructForm *instr; | |
4229 while( (instr = (InstructForm*)_instructions.iter()) != NULL ) { | |
4230 // The instruction must have a match rule. | |
4231 if (instr->_matrule != NULL && | |
4232 instr->is_short_branch()) { | |
4233 | |
4234 _instructions.reset2(); | |
4235 InstructForm *instr2; | |
4236 while( (instr2 = (InstructForm*)_instructions.iter2()) != NULL ) { | |
4237 instr2->check_branch_variant(*this, instr); | |
4238 } | |
4239 } | |
4240 } | |
4241 } | |
4242 | |
4243 | |
4244 //---------------------------identify_unique_operands--------------------------- | |
4245 // Identify unique operands. | |
4246 void ArchDesc::identify_unique_operands() { | |
4247 // Walk over all instructions. | |
4248 _instructions.reset(); | |
4249 InstructForm *instr; | |
4250 while( (instr = (InstructForm*)_instructions.iter()) != NULL ) { | |
4251 // Ensure this is a machine-world instruction | |
4252 if (!instr->ideal_only()) { | |
4253 instr->set_unique_opnds(); | |
4254 } | |
4255 } | |
4256 } |