Mercurial > hg > truffle

comparison src/cpu/x86/vm/assembler_x86.cpp @ 7477:038dd2875b94

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
8005419: Improve intrinsics code performance on x86 by using AVX2 Summary: use 256bit vpxor,vptest instructions in String.compareTo() and equals() intrinsics. Reviewed-by: twisti
author kvn
date Tue, 08 Jan 2013 11:30:51 -0800
parents ffa87474d7a4
children 989155e2d07a b30b3c2a0cf2 db9981fd3124
comparison
equal deleted inserted replaced
7476:ffa87474d7a4 7477:038dd2875b94
2466 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_38); 2466 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_38);
2467 emit_int8(0x17); 2467 emit_int8(0x17);
2468 emit_int8((unsigned char)(0xC0 | encode)); 2468 emit_int8((unsigned char)(0xC0 | encode));
2469 } 2469 }
2470 2470
2471 void Assembler::vptest(XMMRegister dst, Address src) {
2472 assert(VM_Version::supports_avx(), "");
2473 InstructionMark im(this);
2474 bool vector256 = true;
2475 assert(dst != xnoreg, "sanity");
2476 int dst_enc = dst->encoding();
2477 // swap src<->dst for encoding
2478 vex_prefix(src, dst_enc, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_38, false, vector256);
2479 emit_int8(0x17);
2480 emit_operand(dst, src);
2481 }
2482
2483 void Assembler::vptest(XMMRegister dst, XMMRegister src) {
2484 assert(VM_Version::supports_avx(), "");
2485 bool vector256 = true;
2486 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38);
2487 emit_int8(0x17);
2488 emit_int8((unsigned char)(0xC0 | encode));
2489 }
2490
2471 void Assembler::punpcklbw(XMMRegister dst, Address src) { 2491 void Assembler::punpcklbw(XMMRegister dst, Address src) {
2472 NOT_LP64(assert(VM_Version::supports_sse2(), "")); 2492 NOT_LP64(assert(VM_Version::supports_sse2(), ""));
2473 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); 2493 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes");
2474 emit_simd_arith(0x60, dst, src, VEX_SIMD_66); 2494 emit_simd_arith(0x60, dst, src, VEX_SIMD_66);
2475 } 2495 }