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8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation Summary: added ability in C2 to expand mach nodes to several mach nodes after register allocation Reviewed-by: kvn
author goetz
date Thu, 14 Nov 2013 19:24:59 -0800
parents 2b8e28fdf503
children da862781b584
comparison
equal deleted inserted replaced
14427:eb178e97560c 14428:044b28168e20
1032 } 1032 }
1033 return offset; 1033 return offset;
1034 } 1034 }
1035 } 1035 }
1036 1036
1037 bool MachConstantBaseNode::requires_postalloc_expand() const { return false; }
1038 void MachConstantBaseNode::postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_) {
1039 ShouldNotReachHere();
1040 }
1041
1037 void MachConstantBaseNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const { 1042 void MachConstantBaseNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
1038 Compile* C = ra_->C; 1043 Compile* C = ra_->C;
1039 Compile::ConstantTable& constant_table = C->constant_table(); 1044 Compile::ConstantTable& constant_table = C->constant_table();
1040 MacroAssembler _masm(&cbuf); 1045 MacroAssembler _masm(&cbuf);
1041 1046
1881 1886
1882 // CMOVF/CMOVD are expensive on T4 and on SPARC64. 1887 // CMOVF/CMOVD are expensive on T4 and on SPARC64.
1883 const int Matcher::float_cmove_cost() { 1888 const int Matcher::float_cmove_cost() {
1884 return (VM_Version::is_T4() || VM_Version::is_sparc64()) ? ConditionalMoveLimit : 0; 1889 return (VM_Version::is_T4() || VM_Version::is_sparc64()) ? ConditionalMoveLimit : 0;
1885 } 1890 }
1891
1892 // Does the CPU require late expand (see block.cpp for description of late expand)?
1893 const bool Matcher::require_postalloc_expand = false;
1886 1894
1887 // Should the Matcher clone shifts on addressing modes, expecting them to 1895 // Should the Matcher clone shifts on addressing modes, expecting them to
1888 // be subsumed into complex addressing expressions or compute them into 1896 // be subsumed into complex addressing expressions or compute them into
1889 // registers? True for Intel but false for most RISCs 1897 // registers? True for Intel but false for most RISCs
1890 const bool Matcher::clone_shift_expressions = false; 1898 const bool Matcher::clone_shift_expressions = false;