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comparison src/cpu/x86/vm/vm_version_x86.cpp @ 20438:166d744df0de

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8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method Summary: Add new C2 intrinsic for BigInteger::multiplyToLen() on x86 in 64-bit VM. Reviewed-by: roland
author kvn
date Tue, 02 Sep 2014 12:48:45 -0700
parents 999824269b71
children e48395e6a91b
comparison
equal deleted inserted replaced
20437:bddcb33dadf4 20438:166d744df0de
491 // HT processor could be installed on a system which doesn't support HT. 491 // HT processor could be installed on a system which doesn't support HT.
492 _cpuFeatures &= ~CPU_HT; 492 _cpuFeatures &= ~CPU_HT;
493 } 493 }
494 494
495 char buf[256]; 495 char buf[256];
496 jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", 496 jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
497 cores_per_cpu(), threads_per_core(), 497 cores_per_cpu(), threads_per_core(),
498 cpu_family(), _model, _stepping, 498 cpu_family(), _model, _stepping,
499 (supports_cmov() ? ", cmov" : ""), 499 (supports_cmov() ? ", cmov" : ""),
500 (supports_cmpxchg8() ? ", cx8" : ""), 500 (supports_cmpxchg8() ? ", cx8" : ""),
501 (supports_fxsr() ? ", fxsr" : ""), 501 (supports_fxsr() ? ", fxsr" : ""),
520 (supports_ht() ? ", ht": ""), 520 (supports_ht() ? ", ht": ""),
521 (supports_tsc() ? ", tsc": ""), 521 (supports_tsc() ? ", tsc": ""),
522 (supports_tscinv_bit() ? ", tscinvbit": ""), 522 (supports_tscinv_bit() ? ", tscinvbit": ""),
523 (supports_tscinv() ? ", tscinv": ""), 523 (supports_tscinv() ? ", tscinv": ""),
524 (supports_bmi1() ? ", bmi1" : ""), 524 (supports_bmi1() ? ", bmi1" : ""),
525 (supports_bmi2() ? ", bmi2" : "")); 525 (supports_bmi2() ? ", bmi2" : ""),
526 (supports_adx() ? ", adx" : ""));
526 _features_str = strdup(buf); 527 _features_str = strdup(buf);
527 528
528 // UseSSE is set to the smaller of what hardware supports and what 529 // UseSSE is set to the smaller of what hardware supports and what
529 // the command line requires. I.e., you cannot set UseSSE to 2 on 530 // the command line requires. I.e., you cannot set UseSSE to 2 on
530 // older Pentiums which do not support it. 531 // older Pentiums which do not support it.
572 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) { 573 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
573 UseCRC32Intrinsics = true; 574 UseCRC32Intrinsics = true;
574 } 575 }
575 } else if (UseCRC32Intrinsics) { 576 } else if (UseCRC32Intrinsics) {
576 if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics)) 577 if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics))
577 warning("CRC32 Intrinsics requires AVX and CLMUL instructions (not available on this CPU)"); 578 warning("CRC32 Intrinsics requires CLMUL instructions (not available on this CPU)");
578 FLAG_SET_DEFAULT(UseCRC32Intrinsics, false); 579 FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
579 } 580 }
580 581
581 // The AES intrinsic stubs require AES instruction support (of course) 582 // The AES intrinsic stubs require AES instruction support (of course)
582 // but also require sse3 mode for instructions it use. 583 // but also require sse3 mode for instructions it use.
695 tty->cr(); 696 tty->cr();
696 } 697 }
697 } 698 }
698 #endif 699 #endif
699 } 700 }
700 #endif 701
702 #ifdef _LP64
703 if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
704 UseMultiplyToLenIntrinsic = true;
705 }
706 #else
707 if (UseMultiplyToLenIntrinsic) {
708 if (!FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
709 warning("multiplyToLen intrinsic is not available in 32-bit VM");
710 }
711 FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, false);
712 }
713 #endif
714 #endif // COMPILER2
701 715
702 // On new cpus instructions which update whole XMM register should be used 716 // On new cpus instructions which update whole XMM register should be used
703 // to prevent partial register stall due to dependencies on high half. 717 // to prevent partial register stall due to dependencies on high half.
704 // 718 //
705 // UseXmmLoadAndClearUpper == true --> movsd(xmm, mem) 719 // UseXmmLoadAndClearUpper == true --> movsd(xmm, mem)
838 if (FLAG_IS_DEFAULT(UseUnalignedLoadStores)) { 852 if (FLAG_IS_DEFAULT(UseUnalignedLoadStores)) {
839 UseUnalignedLoadStores = true; // use movdqu on newest Intel cpus 853 UseUnalignedLoadStores = true; // use movdqu on newest Intel cpus
840 } 854 }
841 } 855 }
842 } 856 }
857 if(FLAG_IS_DEFAULT(AllocatePrefetchInstr) && supports_3dnow_prefetch()) {
858 AllocatePrefetchInstr = 3;
859 }
843 } 860 }
844 861
845 // Use count leading zeros count instruction if available. 862 // Use count leading zeros count instruction if available.
846 if (supports_lzcnt()) { 863 if (supports_lzcnt()) {
847 if (FLAG_IS_DEFAULT(UseCountLeadingZerosInstruction)) { 864 if (FLAG_IS_DEFAULT(UseCountLeadingZerosInstruction)) {
850 } else if (UseCountLeadingZerosInstruction) { 867 } else if (UseCountLeadingZerosInstruction) {
851 warning("lzcnt instruction is not available on this CPU"); 868 warning("lzcnt instruction is not available on this CPU");
852 FLAG_SET_DEFAULT(UseCountLeadingZerosInstruction, false); 869 FLAG_SET_DEFAULT(UseCountLeadingZerosInstruction, false);
853 } 870 }
854 871
855 if (supports_bmi1()) {
856 if (FLAG_IS_DEFAULT(UseBMI1Instructions)) {
857 UseBMI1Instructions = true;
858 }
859 } else if (UseBMI1Instructions) {
860 warning("BMI1 instructions are not available on this CPU");
861 FLAG_SET_DEFAULT(UseBMI1Instructions, false);
862 }
863
864 // Use count trailing zeros instruction if available 872 // Use count trailing zeros instruction if available
865 if (supports_bmi1()) { 873 if (supports_bmi1()) {
874 // tzcnt does not require VEX prefix
866 if (FLAG_IS_DEFAULT(UseCountTrailingZerosInstruction)) { 875 if (FLAG_IS_DEFAULT(UseCountTrailingZerosInstruction)) {
867 UseCountTrailingZerosInstruction = UseBMI1Instructions; 876 UseCountTrailingZerosInstruction = true;
868 } 877 }
869 } else if (UseCountTrailingZerosInstruction) { 878 } else if (UseCountTrailingZerosInstruction) {
870 warning("tzcnt instruction is not available on this CPU"); 879 warning("tzcnt instruction is not available on this CPU");
871 FLAG_SET_DEFAULT(UseCountTrailingZerosInstruction, false); 880 FLAG_SET_DEFAULT(UseCountTrailingZerosInstruction, false);
881 }
882
883 // BMI instructions use an encoding with VEX prefix.
884 // VEX prefix is generated only when AVX > 0.
885 if (supports_bmi1() && supports_avx()) {
886 if (FLAG_IS_DEFAULT(UseBMI1Instructions)) {
887 UseBMI1Instructions = true;
888 }
889 } else if (UseBMI1Instructions) {
890 warning("BMI1 instructions are not available on this CPU (AVX is also required)");
891 FLAG_SET_DEFAULT(UseBMI1Instructions, false);
892 }
893
894 if (supports_bmi2() && supports_avx()) {
895 if (FLAG_IS_DEFAULT(UseBMI2Instructions)) {
896 UseBMI2Instructions = true;
897 }
898 } else if (UseBMI2Instructions) {
899 warning("BMI2 instructions are not available on this CPU (AVX is also required)");
900 FLAG_SET_DEFAULT(UseBMI2Instructions, false);
872 } 901 }
873 902
874 // Use population count instruction if available. 903 // Use population count instruction if available.
875 if (supports_popcnt()) { 904 if (supports_popcnt()) {
876 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) { 905 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {