Mercurial > hg > truffle
comparison src/cpu/x86/vm/x86_64.ad @ 824:18a08a7e16b5
5057225: Remove useless I2L conversions
Summary: The optimizer should be told to normalize (AndL (ConvI2L x) 0xFF) to (ConvI2L (AndI x 0xFF)), and then the existing matcher rule will work for free.
Reviewed-by: kvn
author | twisti |
---|---|
date | Fri, 26 Jun 2009 07:26:10 -0700 |
parents | 2056494941db |
children | 62001a362ce9 |
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823:14367225a853 | 824:18a08a7e16b5 |
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6442 %} | 6442 %} |
6443 | 6443 |
6444 ins_pipe(ialu_reg_mem); | 6444 ins_pipe(ialu_reg_mem); |
6445 %} | 6445 %} |
6446 | 6446 |
6447 // Load Unsigned Byte (8 bit UNsigned) with a 8-bit mask into Long Register | |
6448 instruct loadUB2L_immI8(rRegL dst, memory mem, immI8 mask, rFlagsReg cr) %{ | |
6449 match(Set dst (ConvI2L (AndI (LoadUB mem) mask))); | |
6450 effect(KILL cr); | |
6451 | |
6452 format %{ "movzbq $dst, $mem\t# ubyte & 8-bit mask -> long\n\t" | |
6453 "andl $dst, $mask" %} | |
6454 ins_encode %{ | |
6455 Register Rdst = $dst$$Register; | |
6456 __ movzbq(Rdst, $mem$$Address); | |
6457 __ andl(Rdst, $mask$$constant); | |
6458 %} | |
6459 ins_pipe(ialu_reg_mem); | |
6460 %} | |
6461 | |
6447 // Load Short (16 bit signed) | 6462 // Load Short (16 bit signed) |
6448 instruct loadS(rRegI dst, memory mem) | 6463 instruct loadS(rRegI dst, memory mem) |
6449 %{ | 6464 %{ |
6450 match(Set dst (LoadS mem)); | 6465 match(Set dst (LoadS mem)); |
6451 | 6466 |
6526 %} | 6541 %} |
6527 | 6542 |
6528 ins_pipe(ialu_reg_mem); | 6543 ins_pipe(ialu_reg_mem); |
6529 %} | 6544 %} |
6530 | 6545 |
6546 // Load Unsigned Short/Char (16 bit UNsigned) with mask 0xFF into Long Register | |
6547 instruct loadUS2L_immI_255(rRegL dst, memory mem, immI_255 mask) %{ | |
6548 match(Set dst (ConvI2L (AndI (LoadUS mem) mask))); | |
6549 | |
6550 format %{ "movzbq $dst, $mem\t# ushort/char & 0xFF -> long" %} | |
6551 ins_encode %{ | |
6552 __ movzbq($dst$$Register, $mem$$Address); | |
6553 %} | |
6554 ins_pipe(ialu_reg_mem); | |
6555 %} | |
6556 | |
6557 // Load Unsigned Short/Char (16 bit UNsigned) with mask into Long Register | |
6558 instruct loadUS2L_immI16(rRegL dst, memory mem, immI16 mask, rFlagsReg cr) %{ | |
6559 match(Set dst (ConvI2L (AndI (LoadUS mem) mask))); | |
6560 effect(KILL cr); | |
6561 | |
6562 format %{ "movzwq $dst, $mem\t# ushort/char & 16-bit mask -> long\n\t" | |
6563 "andl $dst, $mask" %} | |
6564 ins_encode %{ | |
6565 Register Rdst = $dst$$Register; | |
6566 __ movzwq(Rdst, $mem$$Address); | |
6567 __ andl(Rdst, $mask$$constant); | |
6568 %} | |
6569 ins_pipe(ialu_reg_mem); | |
6570 %} | |
6571 | |
6531 // Load Integer | 6572 // Load Integer |
6532 instruct loadI(rRegI dst, memory mem) | 6573 instruct loadI(rRegI dst, memory mem) |
6533 %{ | 6574 %{ |
6534 match(Set dst (LoadI mem)); | 6575 match(Set dst (LoadI mem)); |
6535 | 6576 |
6601 | 6642 |
6602 ins_encode %{ | 6643 ins_encode %{ |
6603 __ movslq($dst$$Register, $mem$$Address); | 6644 __ movslq($dst$$Register, $mem$$Address); |
6604 %} | 6645 %} |
6605 | 6646 |
6647 ins_pipe(ialu_reg_mem); | |
6648 %} | |
6649 | |
6650 // Load Integer with mask 0xFF into Long Register | |
6651 instruct loadI2L_immI_255(rRegL dst, memory mem, immI_255 mask) %{ | |
6652 match(Set dst (ConvI2L (AndI (LoadI mem) mask))); | |
6653 | |
6654 format %{ "movzbq $dst, $mem\t# int & 0xFF -> long" %} | |
6655 ins_encode %{ | |
6656 __ movzbq($dst$$Register, $mem$$Address); | |
6657 %} | |
6658 ins_pipe(ialu_reg_mem); | |
6659 %} | |
6660 | |
6661 // Load Integer with mask 0xFFFF into Long Register | |
6662 instruct loadI2L_immI_65535(rRegL dst, memory mem, immI_65535 mask) %{ | |
6663 match(Set dst (ConvI2L (AndI (LoadI mem) mask))); | |
6664 | |
6665 format %{ "movzwq $dst, $mem\t# int & 0xFFFF -> long" %} | |
6666 ins_encode %{ | |
6667 __ movzwq($dst$$Register, $mem$$Address); | |
6668 %} | |
6669 ins_pipe(ialu_reg_mem); | |
6670 %} | |
6671 | |
6672 // Load Integer with a 32-bit mask into Long Register | |
6673 instruct loadI2L_immI(rRegL dst, memory mem, immI mask, rFlagsReg cr) %{ | |
6674 match(Set dst (ConvI2L (AndI (LoadI mem) mask))); | |
6675 effect(KILL cr); | |
6676 | |
6677 format %{ "movl $dst, $mem\t# int & 32-bit mask -> long\n\t" | |
6678 "andl $dst, $mask" %} | |
6679 ins_encode %{ | |
6680 Register Rdst = $dst$$Register; | |
6681 __ movl(Rdst, $mem$$Address); | |
6682 __ andl(Rdst, $mask$$constant); | |
6683 %} | |
6606 ins_pipe(ialu_reg_mem); | 6684 ins_pipe(ialu_reg_mem); |
6607 %} | 6685 %} |
6608 | 6686 |
6609 // Load Unsigned Integer into Long Register | 6687 // Load Unsigned Integer into Long Register |
6610 instruct loadUI2L(rRegL dst, memory mem) | 6688 instruct loadUI2L(rRegL dst, memory mem) |
11671 %{ | 11749 %{ |
11672 match(Set dst (ConvI2L src)); | 11750 match(Set dst (ConvI2L src)); |
11673 | 11751 |
11674 ins_cost(125); | 11752 ins_cost(125); |
11675 format %{ "movslq $dst, $src\t# i2l" %} | 11753 format %{ "movslq $dst, $src\t# i2l" %} |
11676 opcode(0x63); // needs REX.W | 11754 ins_encode %{ |
11677 ins_encode(REX_reg_reg_wide(dst, src), OpcP, reg_reg(dst,src)); | 11755 __ movslq($dst$$Register, $src$$Register); |
11756 %} | |
11678 ins_pipe(ialu_reg_reg); | 11757 ins_pipe(ialu_reg_reg); |
11679 %} | 11758 %} |
11680 | 11759 |
11681 // instruct convI2L_reg_reg_foo(rRegL dst, rRegI src) | 11760 // instruct convI2L_reg_reg_foo(rRegL dst, rRegI src) |
11682 // %{ | 11761 // %{ |