Mercurial > hg > truffle
comparison graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64BitManipulationOp.java @ 13227:1a66453f73db
renamed TargetMethodAssembler to CompilationResultBuilder
author | Doug Simon <doug.simon@oracle.com> |
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date | Tue, 03 Dec 2013 10:51:16 +0100 |
parents | fbeda9df497d |
children | 8db6e76cb658 |
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13226:0b4d38339708 | 13227:1a66453f73db |
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43 this.result = result; | 43 this.result = result; |
44 this.input = input; | 44 this.input = input; |
45 } | 45 } |
46 | 46 |
47 @Override | 47 @Override |
48 public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { | 48 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) { |
49 Register dst = ValueUtil.asIntReg(result); | 49 Register dst = ValueUtil.asIntReg(result); |
50 if (ValueUtil.isRegister(input)) { | 50 if (ValueUtil.isRegister(input)) { |
51 Register src = ValueUtil.asRegister(input); | 51 Register src = ValueUtil.asRegister(input); |
52 switch (opcode) { | 52 switch (opcode) { |
53 case IPOPCNT: | 53 case IPOPCNT: |
65 case LBSR: | 65 case LBSR: |
66 masm.bsrq(dst, src); | 66 masm.bsrq(dst, src); |
67 break; | 67 break; |
68 } | 68 } |
69 } else { | 69 } else { |
70 AMD64Address src = (AMD64Address) tasm.asAddress(input); | 70 AMD64Address src = (AMD64Address) crb.asAddress(input); |
71 switch (opcode) { | 71 switch (opcode) { |
72 case IPOPCNT: | 72 case IPOPCNT: |
73 masm.popcntl(dst, src); | 73 masm.popcntl(dst, src); |
74 break; | 74 break; |
75 case LPOPCNT: | 75 case LPOPCNT: |