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comparison src/cpu/x86/vm/assembler_x86.cpp @ 17913:1eba0601f0dd

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8041957: -XX:UseAVX=0 cause assert(UseAVX) failed Summary: temporary set UseAVX=1 and UseSSE=2 in generate_get_cpu_info() Reviewed-by: twisti
author kvn
date Tue, 29 Apr 2014 12:20:53 -0700
parents eb6b3ac64f0e
children 78bbf4d43a14
comparison
equal deleted inserted replaced
17912:653e11c86c5a 17913:1eba0601f0dd
1764 emit_operand(src, dst); 1764 emit_operand(src, dst);
1765 } 1765 }
1766 1766
1767 // Move Unaligned 256bit Vector 1767 // Move Unaligned 256bit Vector
1768 void Assembler::vmovdqu(XMMRegister dst, XMMRegister src) { 1768 void Assembler::vmovdqu(XMMRegister dst, XMMRegister src) {
1769 assert(UseAVX, ""); 1769 assert(UseAVX > 0, "");
1770 bool vector256 = true; 1770 bool vector256 = true;
1771 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_F3, vector256); 1771 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_F3, vector256);
1772 emit_int8(0x6F); 1772 emit_int8(0x6F);
1773 emit_int8((unsigned char)(0xC0 | encode)); 1773 emit_int8((unsigned char)(0xC0 | encode));
1774 } 1774 }
1775 1775
1776 void Assembler::vmovdqu(XMMRegister dst, Address src) { 1776 void Assembler::vmovdqu(XMMRegister dst, Address src) {
1777 assert(UseAVX, ""); 1777 assert(UseAVX > 0, "");
1778 InstructionMark im(this); 1778 InstructionMark im(this);
1779 bool vector256 = true; 1779 bool vector256 = true;
1780 vex_prefix(dst, xnoreg, src, VEX_SIMD_F3, vector256); 1780 vex_prefix(dst, xnoreg, src, VEX_SIMD_F3, vector256);
1781 emit_int8(0x6F); 1781 emit_int8(0x6F);
1782 emit_operand(dst, src); 1782 emit_operand(dst, src);
1783 } 1783 }
1784 1784
1785 void Assembler::vmovdqu(Address dst, XMMRegister src) { 1785 void Assembler::vmovdqu(Address dst, XMMRegister src) {
1786 assert(UseAVX, ""); 1786 assert(UseAVX > 0, "");
1787 InstructionMark im(this); 1787 InstructionMark im(this);
1788 bool vector256 = true; 1788 bool vector256 = true;
1789 // swap src<->dst for encoding 1789 // swap src<->dst for encoding
1790 assert(src != xnoreg, "sanity"); 1790 assert(src != xnoreg, "sanity");
1791 vex_prefix(src, xnoreg, dst, VEX_SIMD_F3, vector256); 1791 vex_prefix(src, xnoreg, dst, VEX_SIMD_F3, vector256);