Mercurial > hg > truffle
comparison src/cpu/sparc/vm/sparc.ad @ 785:2056494941db
6814842: Load shortening optimizations
Summary: 6797305 handles load widening but no shortening which should be covered here.
Reviewed-by: never, kvn
author | twisti |
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date | Wed, 13 May 2009 00:45:22 -0700 |
parents | 93c14e5562c4 |
children | 18a08a7e16b5 |
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784:b2934faac289 | 785:2056494941db |
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1889 | 1889 |
1890 | 1890 |
1891 // The intptr_t operand types, defined by textual substitution. | 1891 // The intptr_t operand types, defined by textual substitution. |
1892 // (Cf. opto/type.hpp. This lets us avoid many, many other ifdefs.) | 1892 // (Cf. opto/type.hpp. This lets us avoid many, many other ifdefs.) |
1893 #ifdef _LP64 | 1893 #ifdef _LP64 |
1894 #define immX immL | 1894 #define immX immL |
1895 #define immX13 immL13 | 1895 #define immX13 immL13 |
1896 #define iRegX iRegL | 1896 #define immX13m7 immL13m7 |
1897 #define g1RegX g1RegL | 1897 #define iRegX iRegL |
1898 #define g1RegX g1RegL | |
1898 #else | 1899 #else |
1899 #define immX immI | 1900 #define immX immI |
1900 #define immX13 immI13 | 1901 #define immX13 immI13 |
1901 #define iRegX iRegI | 1902 #define immX13m7 immI13m7 |
1902 #define g1RegX g1RegI | 1903 #define iRegX iRegI |
1904 #define g1RegX g1RegI | |
1903 #endif | 1905 #endif |
1904 | 1906 |
1905 //----------ENCODING BLOCK----------------------------------------------------- | 1907 //----------ENCODING BLOCK----------------------------------------------------- |
1906 // This block specifies the encoding classes used by the compiler to output | 1908 // This block specifies the encoding classes used by the compiler to output |
1907 // byte streams. Encoding classes are parameterized macros used by | 1909 // byte streams. Encoding classes are parameterized macros used by |
3452 | 3454 |
3453 format %{ %} | 3455 format %{ %} |
3454 interface(CONST_INTER); | 3456 interface(CONST_INTER); |
3455 %} | 3457 %} |
3456 | 3458 |
3459 // Integer Immediate: 13-bit minus 7 | |
3460 operand immI13m7() %{ | |
3461 predicate((-4096 < n->get_int()) && ((n->get_int() + 7) <= 4095)); | |
3462 match(ConI); | |
3463 op_cost(0); | |
3464 | |
3465 format %{ %} | |
3466 interface(CONST_INTER); | |
3467 %} | |
3468 | |
3457 // Unsigned (positive) Integer Immediate: 13-bit | 3469 // Unsigned (positive) Integer Immediate: 13-bit |
3458 operand immU13() %{ | 3470 operand immU13() %{ |
3459 predicate((0 <= n->get_int()) && Assembler::is_simm13(n->get_int())); | 3471 predicate((0 <= n->get_int()) && Assembler::is_simm13(n->get_int())); |
3460 match(ConI); | 3472 match(ConI); |
3461 op_cost(0); | 3473 op_cost(0); |
3530 | 3542 |
3531 format %{ %} | 3543 format %{ %} |
3532 interface(CONST_INTER); | 3544 interface(CONST_INTER); |
3533 %} | 3545 %} |
3534 | 3546 |
3547 // Immediates for special shifts (sign extend) | |
3548 | |
3549 // Integer Immediate: the value 16 | |
3550 operand immI_16() %{ | |
3551 predicate(n->get_int() == 16); | |
3552 match(ConI); | |
3553 op_cost(0); | |
3554 | |
3555 format %{ %} | |
3556 interface(CONST_INTER); | |
3557 %} | |
3558 | |
3559 // Integer Immediate: the value 24 | |
3560 operand immI_24() %{ | |
3561 predicate(n->get_int() == 24); | |
3562 match(ConI); | |
3563 op_cost(0); | |
3564 | |
3565 format %{ %} | |
3566 interface(CONST_INTER); | |
3567 %} | |
3568 | |
3535 // Integer Immediate: the value 255 | 3569 // Integer Immediate: the value 255 |
3536 operand immI_255() %{ | 3570 operand immI_255() %{ |
3537 predicate( n->get_int() == 255 ); | 3571 predicate( n->get_int() == 255 ); |
3572 match(ConI); | |
3573 op_cost(0); | |
3574 | |
3575 format %{ %} | |
3576 interface(CONST_INTER); | |
3577 %} | |
3578 | |
3579 // Integer Immediate: the value 65535 | |
3580 operand immI_65535() %{ | |
3581 predicate(n->get_int() == 65535); | |
3538 match(ConI); | 3582 match(ConI); |
3539 op_cost(0); | 3583 op_cost(0); |
3540 | 3584 |
3541 format %{ %} | 3585 format %{ %} |
3542 interface(CONST_INTER); | 3586 interface(CONST_INTER); |
3638 %} | 3682 %} |
3639 | 3683 |
3640 // Long Immediate: 13-bit | 3684 // Long Immediate: 13-bit |
3641 operand immL13() %{ | 3685 operand immL13() %{ |
3642 predicate((-4096L < n->get_long()) && (n->get_long() <= 4095L)); | 3686 predicate((-4096L < n->get_long()) && (n->get_long() <= 4095L)); |
3687 match(ConL); | |
3688 op_cost(0); | |
3689 | |
3690 format %{ %} | |
3691 interface(CONST_INTER); | |
3692 %} | |
3693 | |
3694 // Long Immediate: 13-bit minus 7 | |
3695 operand immL13m7() %{ | |
3696 predicate((-4096L < n->get_long()) && ((n->get_long() + 7L) <= 4095L)); | |
3643 match(ConL); | 3697 match(ConL); |
3644 op_cost(0); | 3698 op_cost(0); |
3645 | 3699 |
3646 format %{ %} | 3700 format %{ %} |
3647 interface(CONST_INTER); | 3701 interface(CONST_INTER); |
4082 scale(0x0); | 4136 scale(0x0); |
4083 disp(0x0); | 4137 disp(0x0); |
4084 %} | 4138 %} |
4085 %} | 4139 %} |
4086 | 4140 |
4087 // Indirect with Offset | 4141 // Indirect with simm13 Offset |
4088 operand indOffset13(sp_ptr_RegP reg, immX13 offset) %{ | 4142 operand indOffset13(sp_ptr_RegP reg, immX13 offset) %{ |
4143 constraint(ALLOC_IN_RC(sp_ptr_reg)); | |
4144 match(AddP reg offset); | |
4145 | |
4146 op_cost(100); | |
4147 format %{ "[$reg + $offset]" %} | |
4148 interface(MEMORY_INTER) %{ | |
4149 base($reg); | |
4150 index(0x0); | |
4151 scale(0x0); | |
4152 disp($offset); | |
4153 %} | |
4154 %} | |
4155 | |
4156 // Indirect with simm13 Offset minus 7 | |
4157 operand indOffset13m7(sp_ptr_RegP reg, immX13m7 offset) %{ | |
4089 constraint(ALLOC_IN_RC(sp_ptr_reg)); | 4158 constraint(ALLOC_IN_RC(sp_ptr_reg)); |
4090 match(AddP reg offset); | 4159 match(AddP reg offset); |
4091 | 4160 |
4092 op_cost(100); | 4161 op_cost(100); |
4093 format %{ "[$reg + $offset]" %} | 4162 format %{ "[$reg + $offset]" %} |
5502 __ ldsh($mem$$Address, $dst$$Register); | 5571 __ ldsh($mem$$Address, $dst$$Register); |
5503 %} | 5572 %} |
5504 ins_pipe(iload_mask_mem); | 5573 ins_pipe(iload_mask_mem); |
5505 %} | 5574 %} |
5506 | 5575 |
5576 // Load Short (16 bit signed) to Byte (8 bit signed) | |
5577 instruct loadS2B(iRegI dst, indOffset13m7 mem, immI_24 twentyfour) %{ | |
5578 match(Set dst (RShiftI (LShiftI (LoadS mem) twentyfour) twentyfour)); | |
5579 ins_cost(MEMORY_REF_COST); | |
5580 | |
5581 size(4); | |
5582 | |
5583 format %{ "LDSB $mem+1,$dst\t! short -> byte" %} | |
5584 ins_encode %{ | |
5585 __ ldsb($mem$$Address, $dst$$Register, 1); | |
5586 %} | |
5587 ins_pipe(iload_mask_mem); | |
5588 %} | |
5589 | |
5507 // Load Short (16bit signed) into a Long Register | 5590 // Load Short (16bit signed) into a Long Register |
5508 instruct loadS2L(iRegL dst, memory mem) %{ | 5591 instruct loadS2L(iRegL dst, memory mem) %{ |
5509 match(Set dst (ConvI2L (LoadS mem))); | 5592 match(Set dst (ConvI2L (LoadS mem))); |
5510 ins_cost(MEMORY_REF_COST); | 5593 ins_cost(MEMORY_REF_COST); |
5511 | 5594 |
5528 __ lduh($mem$$Address, $dst$$Register); | 5611 __ lduh($mem$$Address, $dst$$Register); |
5529 %} | 5612 %} |
5530 ins_pipe(iload_mask_mem); | 5613 ins_pipe(iload_mask_mem); |
5531 %} | 5614 %} |
5532 | 5615 |
5616 // Load Unsigned Short/Char (16 bit UNsigned) to Byte (8 bit signed) | |
5617 instruct loadUS2B(iRegI dst, indOffset13m7 mem, immI_24 twentyfour) %{ | |
5618 match(Set dst (RShiftI (LShiftI (LoadUS mem) twentyfour) twentyfour)); | |
5619 ins_cost(MEMORY_REF_COST); | |
5620 | |
5621 size(4); | |
5622 format %{ "LDSB $mem+1,$dst\t! ushort -> byte" %} | |
5623 ins_encode %{ | |
5624 __ ldsb($mem$$Address, $dst$$Register, 1); | |
5625 %} | |
5626 ins_pipe(iload_mask_mem); | |
5627 %} | |
5628 | |
5533 // Load Unsigned Short/Char (16bit UNsigned) into a Long Register | 5629 // Load Unsigned Short/Char (16bit UNsigned) into a Long Register |
5534 instruct loadUS2L(iRegL dst, memory mem) %{ | 5630 instruct loadUS2L(iRegL dst, memory mem) %{ |
5535 match(Set dst (ConvI2L (LoadUS mem))); | 5631 match(Set dst (ConvI2L (LoadUS mem))); |
5536 ins_cost(MEMORY_REF_COST); | 5632 ins_cost(MEMORY_REF_COST); |
5537 | 5633 |
5552 format %{ "LDUW $mem,$dst\t! int" %} | 5648 format %{ "LDUW $mem,$dst\t! int" %} |
5553 ins_encode %{ | 5649 ins_encode %{ |
5554 __ lduw($mem$$Address, $dst$$Register); | 5650 __ lduw($mem$$Address, $dst$$Register); |
5555 %} | 5651 %} |
5556 ins_pipe(iload_mem); | 5652 ins_pipe(iload_mem); |
5653 %} | |
5654 | |
5655 // Load Integer to Byte (8 bit signed) | |
5656 instruct loadI2B(iRegI dst, indOffset13m7 mem, immI_24 twentyfour) %{ | |
5657 match(Set dst (RShiftI (LShiftI (LoadI mem) twentyfour) twentyfour)); | |
5658 ins_cost(MEMORY_REF_COST); | |
5659 | |
5660 size(4); | |
5661 | |
5662 format %{ "LDSB $mem+3,$dst\t! int -> byte" %} | |
5663 ins_encode %{ | |
5664 __ ldsb($mem$$Address, $dst$$Register, 3); | |
5665 %} | |
5666 ins_pipe(iload_mask_mem); | |
5667 %} | |
5668 | |
5669 // Load Integer to Unsigned Byte (8 bit UNsigned) | |
5670 instruct loadI2UB(iRegI dst, indOffset13m7 mem, immI_255 mask) %{ | |
5671 match(Set dst (AndI (LoadI mem) mask)); | |
5672 ins_cost(MEMORY_REF_COST); | |
5673 | |
5674 size(4); | |
5675 | |
5676 format %{ "LDUB $mem+3,$dst\t! int -> ubyte" %} | |
5677 ins_encode %{ | |
5678 __ ldub($mem$$Address, $dst$$Register, 3); | |
5679 %} | |
5680 ins_pipe(iload_mask_mem); | |
5681 %} | |
5682 | |
5683 // Load Integer to Short (16 bit signed) | |
5684 instruct loadI2S(iRegI dst, indOffset13m7 mem, immI_16 sixteen) %{ | |
5685 match(Set dst (RShiftI (LShiftI (LoadI mem) sixteen) sixteen)); | |
5686 ins_cost(MEMORY_REF_COST); | |
5687 | |
5688 size(4); | |
5689 | |
5690 format %{ "LDSH $mem+2,$dst\t! int -> short" %} | |
5691 ins_encode %{ | |
5692 __ ldsh($mem$$Address, $dst$$Register, 2); | |
5693 %} | |
5694 ins_pipe(iload_mask_mem); | |
5695 %} | |
5696 | |
5697 // Load Integer to Unsigned Short (16 bit UNsigned) | |
5698 instruct loadI2US(iRegI dst, indOffset13m7 mem, immI_65535 mask) %{ | |
5699 match(Set dst (AndI (LoadI mem) mask)); | |
5700 ins_cost(MEMORY_REF_COST); | |
5701 | |
5702 size(4); | |
5703 | |
5704 format %{ "LDUH $mem+2,$dst\t! int -> ushort/char" %} | |
5705 ins_encode %{ | |
5706 __ lduh($mem$$Address, $dst$$Register, 2); | |
5707 %} | |
5708 ins_pipe(iload_mask_mem); | |
5557 %} | 5709 %} |
5558 | 5710 |
5559 // Load Integer into a Long Register | 5711 // Load Integer into a Long Register |
5560 instruct loadI2L(iRegL dst, memory mem) %{ | 5712 instruct loadI2L(iRegL dst, memory mem) %{ |
5561 match(Set dst (ConvI2L (LoadI mem))); | 5713 match(Set dst (ConvI2L (LoadI mem))); |