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comparison src/cpu/x86/vm/assembler_x86.cpp @ 405:2649e5276dd7

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6532536: Optimize arraycopy stubs for Intel cpus Summary: Use SSE2 movdqu in arraycopy stubs on newest Intel's cpus Reviewed-by: rasbold
author kvn
date Tue, 14 Oct 2008 15:10:26 -0700
parents f8199438385b
children a1980da045cc
comparison
equal deleted inserted replaced
404:78c058bc5cdc 405:2649e5276dd7
1573 emit_byte(0x0F); 1573 emit_byte(0x0F);
1574 emit_byte(0x7F); 1574 emit_byte(0x7F);
1575 emit_operand(src, dst); 1575 emit_operand(src, dst);
1576 } 1576 }
1577 1577
1578 void Assembler::movdqu(XMMRegister dst, Address src) {
1579 NOT_LP64(assert(VM_Version::supports_sse2(), ""));
1580 InstructionMark im(this);
1581 emit_byte(0xF3);
1582 prefix(src, dst);
1583 emit_byte(0x0F);
1584 emit_byte(0x6F);
1585 emit_operand(dst, src);
1586 }
1587
1588 void Assembler::movdqu(XMMRegister dst, XMMRegister src) {
1589 NOT_LP64(assert(VM_Version::supports_sse2(), ""));
1590 emit_byte(0xF3);
1591 int encode = prefixq_and_encode(dst->encoding(), src->encoding());
1592 emit_byte(0x0F);
1593 emit_byte(0x6F);
1594 emit_byte(0xC0 | encode);
1595 }
1596
1597 void Assembler::movdqu(Address dst, XMMRegister src) {
1598 NOT_LP64(assert(VM_Version::supports_sse2(), ""));
1599 InstructionMark im(this);
1600 emit_byte(0xF3);
1601 prefix(dst, src);
1602 emit_byte(0x0F);
1603 emit_byte(0x7F);
1604 emit_operand(src, dst);
1605 }
1606
1578 // Uses zero extension on 64bit 1607 // Uses zero extension on 64bit
1579 1608
1580 void Assembler::movl(Register dst, int32_t imm32) { 1609 void Assembler::movl(Register dst, int32_t imm32) {
1581 int encode = prefix_and_encode(dst->encoding()); 1610 int encode = prefix_and_encode(dst->encoding());
1582 emit_byte(0xB8 | encode); 1611 emit_byte(0xB8 | encode);