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comparison src/cpu/x86/vm/vm_version_x86.cpp @ 3276:2a34a4fbc52c

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7037812: few more defaults changes for new AMD processors Summary: use PREFETCHW as default prefetch instruction, set UseXMMForArrayCopy and UseUnalignedLoadStores to true by default. Reviewed-by: kvn Contributed-by: tom.deneau@amd.com
author kvn
date Tue, 19 Apr 2011 09:30:17 -0700
parents 15c9a0e16269
children fe189d4a44e9 6ae7a1561b53
comparison
equal deleted inserted replaced
3275:bbe95b4337f1 3276:2a34a4fbc52c
439 if (FLAG_IS_DEFAULT(UseCountLeadingZerosInstruction)) { 439 if (FLAG_IS_DEFAULT(UseCountLeadingZerosInstruction)) {
440 UseCountLeadingZerosInstruction = true; 440 UseCountLeadingZerosInstruction = true;
441 } 441 }
442 } 442 }
443 443
444 // On family 21 processors default is no sw prefetch 444 // some defaults for AMD family 15h
445 if ( cpu_family() == 21 ) { 445 if ( cpu_family() == 0x15 ) {
446 // On family 15h processors default is no sw prefetch
446 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { 447 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) {
447 AllocatePrefetchStyle = 0; 448 AllocatePrefetchStyle = 0;
448 } 449 }
449 } 450 // Also, if some other prefetch style is specified, default instruction type is PREFETCHW
451 if (FLAG_IS_DEFAULT(AllocatePrefetchInstr)) {
452 AllocatePrefetchInstr = 3;
453 }
454 // On family 15h processors use XMM and UnalignedLoadStores for Array Copy
455 if( FLAG_IS_DEFAULT(UseXMMForArrayCopy) ) {
456 UseXMMForArrayCopy = true;
457 }
458 if( FLAG_IS_DEFAULT(UseUnalignedLoadStores) && UseXMMForArrayCopy ) {
459 UseUnalignedLoadStores = true;
460 }
461 }
462
450 } 463 }
451 464
452 if( is_intel() ) { // Intel cpus specific settings 465 if( is_intel() ) { // Intel cpus specific settings
453 if( FLAG_IS_DEFAULT(UseStoreImmI16) ) { 466 if( FLAG_IS_DEFAULT(UseStoreImmI16) ) {
454 UseStoreImmI16 = false; // don't use it on Intel cpus 467 UseStoreImmI16 = false; // don't use it on Intel cpus