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comparison src/cpu/x86/vm/x86_32.ad @ 10116:2a9d97b57920

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Merge
author bharadwaj
date Fri, 19 Apr 2013 03:13:04 -0400
parents 886d1fd67dc3
children e10e43e58e92
comparison
equal deleted inserted replaced
10108:9500809ceead 10116:2a9d97b57920
1 // 1 //
2 // Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. 2 // Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 // 4 //
5 // This code is free software; you can redistribute it and/or modify it 5 // This code is free software; you can redistribute it and/or modify it
6 // under the terms of the GNU General Public License version 2 only, as 6 // under the terms of the GNU General Public License version 2 only, as
7 // published by the Free Software Foundation. 7 // published by the Free Software Foundation.
2315 // ADD $p,$tmp 2315 // ADD $p,$tmp
2316 emit_opcode(cbuf,0x03); 2316 emit_opcode(cbuf,0x03);
2317 emit_rm(cbuf, 0x3, $p$$reg, tmpReg); 2317 emit_rm(cbuf, 0x3, $p$$reg, tmpReg);
2318 %} 2318 %}
2319 2319
2320 enc_class enc_cmpLTP_mem(rRegI p, rRegI q, memory mem, eCXRegI tmp) %{ // cadd_cmpLT
2321 int tmpReg = $tmp$$reg;
2322
2323 // SUB $p,$q
2324 emit_opcode(cbuf,0x2B);
2325 emit_rm(cbuf, 0x3, $p$$reg, $q$$reg);
2326 // SBB $tmp,$tmp
2327 emit_opcode(cbuf,0x1B);
2328 emit_rm(cbuf, 0x3, tmpReg, tmpReg);
2329 // AND $tmp,$y
2330 cbuf.set_insts_mark(); // Mark start of opcode for reloc info in mem operand
2331 emit_opcode(cbuf,0x23);
2332 int reg_encoding = tmpReg;
2333 int base = $mem$$base;
2334 int index = $mem$$index;
2335 int scale = $mem$$scale;
2336 int displace = $mem$$disp;
2337 relocInfo::relocType disp_reloc = $mem->disp_reloc();
2338 encode_RegMem(cbuf, reg_encoding, base, index, scale, displace, disp_reloc);
2339 // ADD $p,$tmp
2340 emit_opcode(cbuf,0x03);
2341 emit_rm(cbuf, 0x3, $p$$reg, tmpReg);
2342 %}
2343
2344 enc_class shift_left_long( eRegL dst, eCXRegI shift ) %{ 2320 enc_class shift_left_long( eRegL dst, eCXRegI shift ) %{
2345 // TEST shift,32 2321 // TEST shift,32
2346 emit_opcode(cbuf,0xF7); 2322 emit_opcode(cbuf,0xF7);
2347 emit_rm(cbuf, 0x3, 0, ECX_enc); 2323 emit_rm(cbuf, 0x3, 0, ECX_enc);
2348 emit_d32(cbuf,0x20); 2324 emit_d32(cbuf,0x20);
8920 movP_nocopy(dst,src); 8896 movP_nocopy(dst,src);
8921 cp2b(dst,src,cr); 8897 cp2b(dst,src,cr);
8922 %} 8898 %}
8923 %} 8899 %}
8924 8900
8925 instruct cmpLTMask( eCXRegI dst, ncxRegI p, ncxRegI q, eFlagsReg cr ) %{ 8901 instruct cmpLTMask(eCXRegI dst, ncxRegI p, ncxRegI q, eFlagsReg cr) %{
8926 match(Set dst (CmpLTMask p q)); 8902 match(Set dst (CmpLTMask p q));
8927 effect( KILL cr ); 8903 effect(KILL cr);
8928 ins_cost(400); 8904 ins_cost(400);
8929 8905
8930 // SETlt can only use low byte of EAX,EBX, ECX, or EDX as destination 8906 // SETlt can only use low byte of EAX,EBX, ECX, or EDX as destination
8931 format %{ "XOR $dst,$dst\n\t" 8907 format %{ "XOR $dst,$dst\n\t"
8932 "CMP $p,$q\n\t" 8908 "CMP $p,$q\n\t"
8933 "SETlt $dst\n\t" 8909 "SETlt $dst\n\t"
8934 "NEG $dst" %} 8910 "NEG $dst" %}
8935 ins_encode( OpcRegReg(0x33,dst,dst), 8911 ins_encode %{
8936 OpcRegReg(0x3B,p,q), 8912 Register Rp = $p$$Register;
8937 setLT_reg(dst), neg_reg(dst) ); 8913 Register Rq = $q$$Register;
8938 ins_pipe( pipe_slow ); 8914 Register Rd = $dst$$Register;
8939 %} 8915 Label done;
8940 8916 __ xorl(Rd, Rd);
8941 instruct cmpLTMask0( rRegI dst, immI0 zero, eFlagsReg cr ) %{ 8917 __ cmpl(Rp, Rq);
8918 __ setb(Assembler::less, Rd);
8919 __ negl(Rd);
8920 %}
8921
8922 ins_pipe(pipe_slow);
8923 %}
8924
8925 instruct cmpLTMask0(rRegI dst, immI0 zero, eFlagsReg cr) %{
8942 match(Set dst (CmpLTMask dst zero)); 8926 match(Set dst (CmpLTMask dst zero));
8943 effect( DEF dst, KILL cr ); 8927 effect(DEF dst, KILL cr);
8944 ins_cost(100); 8928 ins_cost(100);
8945 8929
8946 format %{ "SAR $dst,31" %} 8930 format %{ "SAR $dst,31\t# cmpLTMask0" %}
8947 opcode(0xC1, 0x7); /* C1 /7 ib */ 8931 ins_encode %{
8948 ins_encode( RegOpcImm( dst, 0x1F ) ); 8932 __ sarl($dst$$Register, 31);
8949 ins_pipe( ialu_reg ); 8933 %}
8950 %} 8934 ins_pipe(ialu_reg);
8951 8935 %}
8952 8936
8953 instruct cadd_cmpLTMask( ncxRegI p, ncxRegI q, ncxRegI y, eCXRegI tmp, eFlagsReg cr ) %{ 8937 /* better to save a register than avoid a branch */
8938 instruct cadd_cmpLTMask(rRegI p, rRegI q, rRegI y, eFlagsReg cr) %{
8954 match(Set p (AddI (AndI (CmpLTMask p q) y) (SubI p q))); 8939 match(Set p (AddI (AndI (CmpLTMask p q) y) (SubI p q)));
8955 effect( KILL tmp, KILL cr ); 8940 effect(KILL cr);
8956 ins_cost(400); 8941 ins_cost(400);
8957 // annoyingly, $tmp has no edges so you cant ask for it in 8942 format %{ "SUB $p,$q\t# cadd_cmpLTMask\n\t"
8958 // any format or encoding 8943 "JGE done\n\t"
8959 format %{ "SUB $p,$q\n\t" 8944 "ADD $p,$y\n"
8960 "SBB ECX,ECX\n\t" 8945 "done: " %}
8961 "AND ECX,$y\n\t" 8946 ins_encode %{
8962 "ADD $p,ECX" %} 8947 Register Rp = $p$$Register;
8963 ins_encode( enc_cmpLTP(p,q,y,tmp) ); 8948 Register Rq = $q$$Register;
8964 ins_pipe( pipe_cmplt ); 8949 Register Ry = $y$$Register;
8950 Label done;
8951 __ subl(Rp, Rq);
8952 __ jccb(Assembler::greaterEqual, done);
8953 __ addl(Rp, Ry);
8954 __ bind(done);
8955 %}
8956
8957 ins_pipe(pipe_cmplt);
8958 %}
8959
8960 /* better to save a register than avoid a branch */
8961 instruct and_cmpLTMask(rRegI p, rRegI q, rRegI y, eFlagsReg cr) %{
8962 match(Set y (AndI (CmpLTMask p q) y));
8963 effect(KILL cr);
8964
8965 ins_cost(300);
8966
8967 format %{ "CMPL $p, $q\t# and_cmpLTMask\n\t"
8968 "JLT done\n\t"
8969 "XORL $y, $y\n"
8970 "done: " %}
8971 ins_encode %{
8972 Register Rp = $p$$Register;
8973 Register Rq = $q$$Register;
8974 Register Ry = $y$$Register;
8975 Label done;
8976 __ cmpl(Rp, Rq);
8977 __ jccb(Assembler::less, done);
8978 __ xorl(Ry, Ry);
8979 __ bind(done);
8980 %}
8981
8982 ins_pipe(pipe_cmplt);
8965 %} 8983 %}
8966 8984
8967 /* If I enable this, I encourage spilling in the inner loop of compress. 8985 /* If I enable this, I encourage spilling in the inner loop of compress.
8968 instruct cadd_cmpLTMask_mem( ncxRegI p, ncxRegI q, memory y, eCXRegI tmp, eFlagsReg cr ) %{ 8986 instruct cadd_cmpLTMask_mem(ncxRegI p, ncxRegI q, memory y, eCXRegI tmp, eFlagsReg cr) %{
8969 match(Set p (AddI (AndI (CmpLTMask p q) (LoadI y)) (SubI p q))); 8987 match(Set p (AddI (AndI (CmpLTMask p q) (LoadI y)) (SubI p q)));
8970 effect( USE_KILL tmp, KILL cr );
8971 ins_cost(400);
8972
8973 format %{ "SUB $p,$q\n\t"
8974 "SBB ECX,ECX\n\t"
8975 "AND ECX,$y\n\t"
8976 "ADD $p,ECX" %}
8977 ins_encode( enc_cmpLTP_mem(p,q,y,tmp) );
8978 %}
8979 */ 8988 */
8980 8989
8981 //----------Long Instructions------------------------------------------------ 8990 //----------Long Instructions------------------------------------------------
8982 // Add Long Register with Register 8991 // Add Long Register with Register
8983 instruct addL_eReg(eRegL dst, eRegL src, eFlagsReg cr) %{ 8992 instruct addL_eReg(eRegL dst, eRegL src, eFlagsReg cr) %{