truffle: src/share/vm/opto/output.cpp comparison

comparison src/share/vm/opto/output.cpp @ 14422:2b8e28fdf503

Merge

author	kvn
date	Tue, 05 Nov 2013 17:38:04 -0800
parents	e2722a66aba7 650868c062a9
children	318d0622a6d7

comparison

equal deleted inserted replaced

-:3068270ba476
+:2b8e28fdf503
 extern int emit_deopt_handler(CodeBuffer &cbuf);
 // Convert Nodes to instruction bits and pass off to the VM
 void Compile::Output() {
 // RootNode goes
-assert( _cfg->get_root_block()->_nodes.size() == 0, "" );
+assert( _cfg->get_root_block()->number_of_nodes() == 0, "" );
 // The number of new nodes (mostly MachNop) is proportional to
 // the number of java calls and inner loops which are aligned.
 if ( C->check_node_count((NodeLimitFudgeFactor + C->java_calls()*3 +
 C->inner_loops()*(OptoLoopAlignment-1)),
 }
 // Make sure I can find the Start Node
 Block *entry = _cfg->get_block(1);
 Block *broot = _cfg->get_root_block();
-const StartNode *start = entry->_nodes[0]->as_Start();
+const StartNode *start = entry->head()->as_Start();
 // Replace StartNode with prolog
 MachPrologNode *prolog = new (this) MachPrologNode();
-entry->_nodes.map( 0, prolog );
+entry->map_node(prolog, 0);
 _cfg->map_node_to_block(prolog, entry);
 _cfg->unmap_node_from_block(start); // start is no longer in any block
 // Virtual methods need an unverified entry point
 if (trace_opto_output()) {
 tty->print("\n---- After ScheduleAndBundle ----\n");
 for (uint i = 0; i < _cfg->number_of_blocks(); i++) {
 tty->print("\nBB#%03d:\n", i);
 Block* block = _cfg->get_block(i);
-for (uint j = 0; j < block->_nodes.size(); j++) {
+for (uint j = 0; j < block->number_of_nodes(); j++) {
-Node* n = block->_nodes[j];
+Node* n = block->get_node(j);
 OptoReg::Name reg = _regalloc->get_reg_first(n);
 tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : "");
 n->dump();
 }
 }
 return; // no safepoints/oopmaps emitted for calls in stubs,so we don't care
 // Insert call to zap runtime stub before every node with an oop map
 for( uint i=0; i<_cfg->number_of_blocks(); i++ ) {
 Block *b = _cfg->get_block(i);
-for ( uint j = 0;  j < b->_nodes.size();  ++j ) {
+for ( uint j = 0;  j < b->number_of_nodes();  ++j ) {
-Node *n = b->_nodes[j];
+Node *n = b->get_node(j);
 // Determining if we should insert a zap-a-lot node in output.
 // We do that for all nodes that has oopmap info, except for calls
 // to allocation.  Calls to allocation passes in the old top-of-eden pointer
 // and expect the C code to reset it.  Hence, there can be no safepoints between
 insert = false;
 }
 }
 if (insert) {
 Node *zap = call_zap_node(n->as_MachSafePoint(), i);
-b->_nodes.insert( j, zap );
+b->insert_node(zap, j);
 _cfg->map_node_to_block(zap, b);
 ++j;
 }
 }
 }
 jmp_nidx[i]   = -1;
 DEBUG_ONLY( jmp_target[i] = 0; )
 DEBUG_ONLY( jmp_rule[i]   = 0; )
 // Sum all instruction sizes to compute block size
-uint last_inst = block->_nodes.size();
+uint last_inst = block->number_of_nodes();
 uint blk_size = 0;
 for (uint j = 0; j < last_inst; j++) {
-Node* nj = block->_nodes[j];
+Node* nj = block->get_node(j);
 // Handle machine instruction nodes
 if (nj->is_Mach()) {
 MachNode *mach = nj->as_Mach();
 blk_size += (mach->alignment_required() - 1) * relocInfo::addr_unit(); // assume worst case padding
 reloc_size += mach->reloc();
 has_short_branch_candidate = false;
 int adjust_block_start = 0;
 for (uint i = 0; i < nblocks; i++) {
 Block* block = _cfg->get_block(i);
 int idx = jmp_nidx[i];
-MachNode* mach = (idx == -1) ? NULL: block->_nodes[idx]->as_Mach();
+MachNode* mach = (idx == -1) ? NULL: block->get_node(idx)->as_Mach();
 if (mach != NULL && mach->may_be_short_branch()) {
 #ifdef ASSERT
 assert(jmp_size[i] > 0 && mach->is_MachBranch(), "sanity");
 int j;
 // Find the branch; ignore trailing NOPs.
-for (j = block->_nodes.size()-1; j>=0; j--) {
+for (j = block->number_of_nodes()-1; j>=0; j--) {
-Node* n = block->_nodes[j];
+Node* n = block->get_node(j);
 if (!n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con)
 break;
 }
-assert(j >= 0 && j == idx && block->_nodes[j] == (Node*)mach, "sanity");
+assert(j >= 0 && j == idx && block->get_node(j) == (Node*)mach, "sanity");
 #endif
 int br_size = jmp_size[i];
 int br_offs = blk_starts[i] + jmp_offset[i];
 // This requires the TRUE branch target be in succs[0]
 if (needs_padding && replacement->avoid_back_to_back()) {
 jmp_offset[i] += nop_size;
 diff -= nop_size;
 }
 adjust_block_start += diff;
-block->_nodes.map(idx, replacement);
+block->map_node(replacement, idx);
 mach->subsume_by(replacement, C);
 mach = replacement;
 progress = true;
 jmp_size[i] = new_size;
 cik->is_array_klass(), "Not supported allocation.");
 sv = new ObjectValue(spobj->_idx,
 new ConstantOopWriteValue(cik->java_mirror()->constant_encoding()));
 Compile::set_sv_for_object_node(objs, sv);
-uint first_ind = spobj->first_index();
+uint first_ind = spobj->first_index(sfpt->jvms());
 for (uint i = 0; i < spobj->n_fields(); i++) {
 Node* fld_node = sfpt->in(first_ind+i);
 (void)FillLocArray(sv->field_values()->length(), sfpt, fld_node, sv->field_values(), objs);
 }
 }
 // Build the growable array of ScopeValues for exp stack
 GrowableArray<MonitorValue*> *monarray = new GrowableArray<MonitorValue*>(num_mon);
 // Loop over monitors and insert into array
-for(idx = 0; idx < num_mon; idx++) {
+for (idx = 0; idx < num_mon; idx++) {
 // Grab the node that defines this monitor
 Node* box_node = sfn->monitor_box(jvms, idx);
 Node* obj_node = sfn->monitor_obj(jvms, idx);
 // Create ScopeValue for object
 ScopeValue *scval = NULL;
-if( obj_node->is_SafePointScalarObject() ) {
+if (obj_node->is_SafePointScalarObject()) {
 SafePointScalarObjectNode* spobj = obj_node->as_SafePointScalarObject();
 scval = Compile::sv_for_node_id(objs, spobj->_idx);
 if (scval == NULL) {
-const Type *t = obj_node->bottom_type();
+const Type *t = spobj->bottom_type();
 ciKlass* cik = t->is_oopptr()->klass();
 assert(cik->is_instance_klass() ||
 cik->is_array_klass(), "Not supported allocation.");
 ObjectValue* sv = new ObjectValue(spobj->_idx,
 new ConstantOopWriteValue(cik->java_mirror()->constant_encoding()));
 Compile::set_sv_for_object_node(objs, sv);
-uint first_ind = spobj->first_index();
+uint first_ind = spobj->first_index(youngest_jvms);
 for (uint i = 0; i < spobj->n_fields(); i++) {
 Node* fld_node = sfn->in(first_ind+i);
 (void)FillLocArray(sv->field_values()->length(), sfn, fld_node, sv->field_values(), objs);
 }
 scval = sv;
 }
-} else if( !obj_node->is_Con() ) {
+} else if (!obj_node->is_Con()) {
 OptoReg::Name obj_reg = _regalloc->get_reg_first(obj_node);
 if( obj_node->bottom_type()->base() == Type::NarrowOop ) {
 scval = new_loc_value( _regalloc, obj_reg, Location::narrowoop );
 } else {
 scval = new_loc_value( _regalloc, obj_reg, Location::oop );
 // Fill the constant table.
 // Note:  This must happen before shorten_branches.
 for (uint i = 0; i < _cfg->number_of_blocks(); i++) {
 Block* b = _cfg->get_block(i);
-for (uint j = 0; j < b->_nodes.size(); j++) {
+for (uint j = 0; j < b->number_of_nodes(); j++) {
-Node* n = b->_nodes[j];
+Node* n = b->get_node(j);
 // If the node is a MachConstantNode evaluate the constant
 // value section.
 if (n->is_MachConstant()) {
 MachConstantNode* machcon = n->as_MachConstant();
 int blk_offset = current_offset;
 // Define the label at the beginning of the basic block
 MacroAssembler(cb).bind(blk_labels[block->_pre_order]);
-uint last_inst = block->_nodes.size();
+uint last_inst = block->number_of_nodes();
 // Emit block normally, except for last instruction.
 // Emit means "dump code bits into code buffer".
 for (uint j = 0; j<last_inst; j++) {
 // Get the node
-Node* n = block->_nodes[j];
+Node* n = block->get_node(j);
 // See if delay slots are supported
 if (valid_bundle_info(n) &&
 node_bundling(n)->used_in_unconditional_delay()) {
 assert(delay_slot == NULL, "no use of delay slot node");
 if(padding > 0) {
 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
 int nops_cnt = padding / nop_size;
 MachNode *nop = new (this) MachNopNode(nops_cnt);
-block->_nodes.insert(j++, nop);
+block->insert_node(nop, j++);
 last_inst++;
 _cfg->map_node_to_block(nop, block);
 nop->emit(*cb, _regalloc);
 cb->flush_bundle(true);
 current_offset = cb->insts_size();
 int new_size = replacement->size(_regalloc);
 assert((br_size - new_size) >= (int)nop_size, "short_branch size should be smaller");
 // Insert padding between avoid_back_to_back branches.
 if (needs_padding && replacement->avoid_back_to_back()) {
 MachNode *nop = new (this) MachNopNode();
-block->_nodes.insert(j++, nop);
+block->insert_node(nop, j++);
 _cfg->map_node_to_block(nop, block);
 last_inst++;
 nop->emit(*cb, _regalloc);
 cb->flush_bundle(true);
 current_offset = cb->insts_size();
 jmp_target[i] = block_num;
 jmp_offset[i] = current_offset - blk_offset;
 jmp_size[i]   = new_size;
 jmp_rule[i]   = mach->rule();
 #endif
-block->_nodes.map(j, replacement);
+block->map_node(replacement, j);
 mach->subsume_by(replacement, C);
 n    = replacement;
 mach = replacement;
 }
 }
 Node *oop_store = mach->in(prec);  // Precedence edge
 if (oop_store == NULL) continue;
 count++;
 uint i4;
 for (i4 = 0; i4 < last_inst; ++i4) {
-if (block->_nodes[i4] == oop_store) {
+if (block->get_node(i4) == oop_store) {
 break;
 }
 }
 // Note: This test can provide a false failure if other precedence
 // edges have been added to the storeCMNode.
 if (i < nblocks-1) {
 Block *nb = _cfg->get_block(i + 1);
 int padding = nb->alignment_padding(current_offset);
 if( padding > 0 ) {
 MachNode *nop = new (this) MachNopNode(padding / nop_size);
-block->_nodes.insert(block->_nodes.size(), nop);
+block->insert_node(nop, block->number_of_nodes());
 _cfg->map_node_to_block(nop, block);
 nop->emit(*cb, _regalloc);
 current_offset = cb->insts_size();
 }
 }
 Block* block = _cfg->get_block(i);
 Node *n = NULL;
 int j;
 // Find the branch; ignore trailing NOPs.
-for (j = block->_nodes.size() - 1; j >= 0; j--) {
+for (j = block->number_of_nodes() - 1; j >= 0; j--) {
-n = block->_nodes[j];
+n = block->get_node(j);
 if (!n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con) {
 break;
 }
 }
 // Get the offset of the return from the call
 uint call_return = call_returns[block->_pre_order];
 #ifdef ASSERT
 assert( call_return > 0, "no call seen for this basic block" );
-while (block->_nodes[--j]->is_MachProj()) ;
+while (block->get_node(--j)->is_MachProj()) ;
-assert(block->_nodes[j]->is_MachCall(), "CatchProj must follow call");
+assert(block->get_node(j)->is_MachCall(), "CatchProj must follow call");
 #endif
 // last instruction is a CatchNode, find it's CatchProjNodes
 int nof_succs = block->_num_succs;
 // allocate space
 GrowableArray<intptr_t> handler_bcis(nof_succs);
 memcpy(_bundle_use_elements, Pipeline_Use::elaborated_elements, sizeof(Pipeline_Use::elaborated_elements));
 // Get the last node
 Block* block = _cfg->get_block(_cfg->number_of_blocks() - 1);
-_next_node = block->_nodes[block->_nodes.size() - 1];
+_next_node = block->get_node(block->number_of_nodes() - 1);
 }
 #ifndef PRODUCT
 // Scheduling destructor
 Scheduling::~Scheduling() {
 // This is a kludge, forcing all latency calculations to start at 1.
 // Used to allow latency 0 to force an instruction to the beginning
 // of the bb
 uint latency = 1;
-Node *use = bb->_nodes[j];
+Node *use = bb->get_node(j);
 uint nlen = use->len();
 // Walk over all the inputs
 for ( uint k=0; k < nlen; k++ ) {
 Node *def = use->in(k);
 (op != Op_Node &&         // Not an unused antidepedence node and
 // not an unallocated boxlock
 (OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Op_BoxLock)) ) {
 // Push any trailing projections
-if( bb->_nodes[bb->_nodes.size()-1] != n ) {
+if( bb->get_node(bb->number_of_nodes()-1) != n ) {
 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
 Node *foi = n->fast_out(i);
 if( foi->is_Proj() )
 _scheduled.push(foi);
 }
 // No delay slot specified
 _unconditional_delay_slot = NULL;
 #ifdef ASSERT
-for( uint i=0; i < bb->_nodes.size(); i++ )
+for( uint i=0; i < bb->number_of_nodes(); i++ )
-assert( _uses[bb->_nodes[i]->_idx] == 0, "_use array not clean" );
+assert( _uses[bb->get_node(i)->_idx] == 0, "_use array not clean" );
 #endif
 // Force the _uses count to never go to zero for unscheduable pieces
 // of the block
 for( uint k = 0; k < _bb_start; k++ )
-_uses[bb->_nodes[k]->_idx] = 1;
+_uses[bb->get_node(k)->_idx] = 1;
-for( uint l = _bb_end; l < bb->_nodes.size(); l++ )
+for( uint l = _bb_end; l < bb->number_of_nodes(); l++ )
-_uses[bb->_nodes[l]->_idx] = 1;
+_uses[bb->get_node(l)->_idx] = 1;
 // Iterate backwards over the instructions in the block.  Don't count the
 // branch projections at end or the block header instructions.
 for( uint j = _bb_end-1; j >= _bb_start; j-- ) {
-Node *n = bb->_nodes[j];
+Node *n = bb->get_node(j);
 if( n->is_Proj() ) continue; // Projections handled another way
 // Account for all uses
 for ( uint k = 0; k < n->len(); k++ ) {
 Node *inp = n->in(k);
 bb = _cfg->get_block(i);
 #ifndef PRODUCT
 if (_cfg->C->trace_opto_output()) {
 tty->print("#  Schedule BB#%03d (initial)\n", i);
-for (uint j = 0; j < bb->_nodes.size(); j++) {
+for (uint j = 0; j < bb->number_of_nodes(); j++) {
-bb->_nodes[j]->dump();
+bb->get_node(j)->dump();
 }
 }
 #endif
 // On the head node, skip processing
 #endif
 step_and_clear();
 }
 // Leave untouched the starting instruction, any Phis, a CreateEx node
-// or Top.  bb->_nodes[_bb_start] is the first schedulable instruction.
+// or Top.  bb->get_node(_bb_start) is the first schedulable instruction.
-_bb_end = bb->_nodes.size()-1;
+_bb_end = bb->number_of_nodes()-1;
 for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) {
-Node *n = bb->_nodes[_bb_start];
+Node *n = bb->get_node(_bb_start);
 // Things not matched, like Phinodes and ProjNodes don't get scheduled.
 // Also, MachIdealNodes do not get scheduled
 if( !n->is_Mach() ) continue;     // Skip non-machine nodes
 MachNode *mach = n->as_Mach();
 int iop = mach->ideal_Opcode();
 // might schedule.  _bb_end points just after last schedulable inst.  We
 // normally schedule conditional branches (despite them being forced last
 // in the block), because they have delay slots we can fill.  Calls all
 // have their delay slots filled in the template expansions, so we don't
 // bother scheduling them.
-Node *last = bb->_nodes[_bb_end];
+Node *last = bb->get_node(_bb_end);
 // Ignore trailing NOPs.
 while (_bb_end > 0 && last->is_Mach() &&
 last->as_Mach()->ideal_Opcode() == Op_Con) {
-last = bb->_nodes[--_bb_end];
+last = bb->get_node(--_bb_end);
 }
 assert(!last->is_Mach() || last->as_Mach()->ideal_Opcode() != Op_Con, "");
 if( last->is_Catch() ||
 // Exclude unreachable path case when Halt node is in a separate block.
 (_bb_end > 1 && last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) {
 // There must be a prior call.  Skip it.
-while( !bb->_nodes[--_bb_end]->is_MachCall() ) {
+while( !bb->get_node(--_bb_end)->is_MachCall() ) {
-assert( bb->_nodes[_bb_end]->is_MachProj(), "skipping projections after expected call" );
+assert( bb->get_node(_bb_end)->is_MachProj(), "skipping projections after expected call" );
 }
 } else if( last->is_MachNullCheck() ) {
 // Backup so the last null-checked memory instruction is
 // outside the schedulable range. Skip over the nullcheck,
 // projection, and the memory nodes.
 Node *mem = last->in(1);
 do {
 _bb_end--;
-} while (mem != bb->_nodes[_bb_end]);
+} while (mem != bb->get_node(_bb_end));
 } else {
 // Set _bb_end to point after last schedulable inst.
 _bb_end++;
 }
 }
 assert( _scheduled.size() == _bb_end - _bb_start, "wrong number of instructions" );
 #ifdef ASSERT
 for( uint l = _bb_start; l < _bb_end; l++ ) {
-Node *n = bb->_nodes[l];
+Node *n = bb->get_node(l);
 uint m;
 for( m = 0; m < _bb_end-_bb_start; m++ )
 if( _scheduled[m] == n )
 break;
 assert( m < _bb_end-_bb_start, "instruction missing in schedule" );
 }
 #endif
 // Now copy the instructions (in reverse order) back to the block
 for ( uint k = _bb_start; k < _bb_end; k++ )
-bb->_nodes.map(k, _scheduled[_bb_end-k-1]);
+bb->map_node(_scheduled[_bb_end-k-1], k);
 #ifndef PRODUCT
 if (_cfg->C->trace_opto_output()) {
 tty->print("#  Schedule BB#%03d (final)\n", i);
 uint current = 0;
-for (uint j = 0; j < bb->_nodes.size(); j++) {
+for (uint j = 0; j < bb->number_of_nodes(); j++) {
-Node *n = bb->_nodes[j];
+Node *n = bb->get_node(j);
 if( valid_bundle_info(n) ) {
 Bundle *bundle = node_bundling(n);
 if (bundle->instr_count() > 0 || bundle->flags() > 0) {
 tty->print("*** Bundle: ");
 bundle->dump();
 _reg_node.clear();
 // Walk over the block backwards.  Check to make sure each DEF doesn't
 // kill a live value (other than the one it's supposed to).  Add each
 // USE to the live set.
-for( uint i = b->_nodes.size()-1; i >= _bb_start; i-- ) {
+for( uint i = b->number_of_nodes()-1; i >= _bb_start; i-- ) {
-Node *n = b->_nodes[i];
+Node *n = b->get_node(i);
 int n_op = n->Opcode();
 if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
 // Fat-proj kills a slew of registers
 RegMask rm = n->out_RegMask();// Make local copy
 while( rm.is_NotEmpty() ) {
 _cfg->get_block_for_node(use) == b) {
 if( pinch->Opcode() == Op_Node && // Real pinch-point (not optimistic?)
 pinch->req() == 1 ) {   // pinch not yet in block?
 pinch->del_req(0);        // yank pointer to later-def, also set flag
 // Insert the pinch-point in the block just after the last use
-b->_nodes.insert(b->find_node(use)+1,pinch);
+b->insert_node(pinch, b->find_node(use) + 1);
 _bb_end++;                // Increase size scheduled region in block
 }
 add_prec_edge_from_to(pinch,use);
 }
 // block.  Leftover node from some prior block is treated like a NULL (no
 // prior def, so no anti-dependence needed).  Valid def is distinguished by
 // it being in the current block.
 bool fat_proj_seen = false;
 uint last_safept = _bb_end-1;
-Node* end_node         = (_bb_end-1 >= _bb_start) ? b->_nodes[last_safept] : NULL;
+Node* end_node         = (_bb_end-1 >= _bb_start) ? b->get_node(last_safept) : NULL;
 Node* last_safept_node = end_node;
 for( uint i = _bb_end-1; i >= _bb_start; i-- ) {
-Node *n = b->_nodes[i];
+Node *n = b->get_node(i);
 int is_def = n->outcnt();   // def if some uses prior to adding precedence edges
 if( n->is_MachProj() && n->ideal_reg() == MachProjNode::fat_proj ) {
 // Fat-proj kills a slew of registers
 // This can add edges to 'n' and obscure whether or not it was a def,
 // hence the is_def flag.
 }
 }
 // Do not allow defs of new derived values to float above GC
 // points unless the base is definitely available at the GC point.
-Node *m = b->_nodes[i];
+Node *m = b->get_node(i);
 // Add precedence edge from following safepoint to use of derived pointer
 if( last_safept_node != end_node &&
 m != last_safept_node) {
 for (uint k = 1; k < m->req(); k++) {
 }
 }
 if( n->jvms() ) {           // Precedence edge from derived to safept
 // Check if last_safept_node was moved by pinch-point insertion in anti_do_use()
-if( b->_nodes[last_safept] != last_safept_node ) {
+if( b->get_node(last_safept) != last_safept_node ) {
 last_safept = b->find_node(last_safept_node);
 }
 for( uint j=last_safept; j > i; j-- ) {
-Node *mach = b->_nodes[j];
+Node *mach = b->get_node(j);
 if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Op_AddP )
 mach->add_prec( n );
 }
 last_safept = i;
 last_safept_node = m;

Mercurial > hg > truffle

comparison src/share/vm/opto/output.cpp @ 14422:2b8e28fdf503