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comparison src/cpu/x86/vm/assembler_x86.cpp @ 6225:2c368ea3e844

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7181494: cleanup avx and vectors code Summary: renamed mach nodes which use scalar AVX instructions, added integer vectors shuffling instructions Reviewed-by: twisti
author kvn
date Mon, 16 Jul 2012 17:10:22 -0700
parents 8c92982cbbc4
children 1d7922586cf6
comparison
equal deleted inserted replaced
6224:56c4f88474b3 6225:2c368ea3e844
2571 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66); 2571 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66);
2572 emit_byte(0x62); 2572 emit_byte(0x62);
2573 emit_byte(0xC0 | encode); 2573 emit_byte(0xC0 | encode);
2574 } 2574 }
2575 2575
2576 void Assembler::punpcklqdq(XMMRegister dst, XMMRegister src) {
2577 NOT_LP64(assert(VM_Version::supports_sse2(), ""));
2578 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66);
2579 emit_byte(0x6C);
2580 emit_byte(0xC0 | encode);
2581 }
2582
2576 void Assembler::push(int32_t imm32) { 2583 void Assembler::push(int32_t imm32) {
2577 // in 64bits we push 64bits onto the stack but only 2584 // in 64bits we push 64bits onto the stack but only
2578 // take a 32bit immediate 2585 // take a 32bit immediate
2579 emit_byte(0x68); 2586 emit_byte(0x68);
2580 emit_long(imm32); 2587 emit_long(imm32);
3176 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_NONE, vector256); 3183 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_NONE, vector256);
3177 emit_byte(0x57); 3184 emit_byte(0x57);
3178 emit_byte(0xC0 | encode); 3185 emit_byte(0xC0 | encode);
3179 } 3186 }
3180 3187
3188 void Assembler::vpxor(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3189 assert(VM_Version::supports_avx2() || (!vector256) && VM_Version::supports_avx(), "");
3190 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256);
3191 emit_byte(0xEF);
3192 emit_byte(0xC0 | encode);
3193 }
3194
3181 void Assembler::vinsertf128h(XMMRegister dst, XMMRegister nds, XMMRegister src) { 3195 void Assembler::vinsertf128h(XMMRegister dst, XMMRegister nds, XMMRegister src) {
3182 assert(VM_Version::supports_avx(), ""); 3196 assert(VM_Version::supports_avx(), "");
3183 bool vector256 = true; 3197 bool vector256 = true;
3184 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); 3198 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A);
3185 emit_byte(0x18); 3199 emit_byte(0x18);
3200 emit_byte(0xC0 | encode);
3201 // 0x00 - insert into lower 128 bits
3202 // 0x01 - insert into upper 128 bits
3203 emit_byte(0x01);
3204 }
3205
3206 void Assembler::vinserti128h(XMMRegister dst, XMMRegister nds, XMMRegister src) {
3207 assert(VM_Version::supports_avx2(), "");
3208 bool vector256 = true;
3209 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A);
3210 emit_byte(0x38);
3186 emit_byte(0xC0 | encode); 3211 emit_byte(0xC0 | encode);
3187 // 0x00 - insert into lower 128 bits 3212 // 0x00 - insert into lower 128 bits
3188 // 0x01 - insert into upper 128 bits 3213 // 0x01 - insert into upper 128 bits
3189 emit_byte(0x01); 3214 emit_byte(0x01);
3190 } 3215 }
7478 7503
7479 void MacroAssembler::movbyte(ArrayAddress dst, int src) { 7504 void MacroAssembler::movbyte(ArrayAddress dst, int src) {
7480 movb(as_Address(dst), src); 7505 movb(as_Address(dst), src);
7481 } 7506 }
7482 7507
7508 void MacroAssembler::movdl(XMMRegister dst, AddressLiteral src) {
7509 if (reachable(src)) {
7510 movdl(dst, as_Address(src));
7511 } else {
7512 lea(rscratch1, src);
7513 movdl(dst, Address(rscratch1, 0));
7514 }
7515 }
7516
7517 void MacroAssembler::movq(XMMRegister dst, AddressLiteral src) {
7518 if (reachable(src)) {
7519 movq(dst, as_Address(src));
7520 } else {
7521 lea(rscratch1, src);
7522 movq(dst, Address(rscratch1, 0));
7523 }
7524 }
7525
7483 void MacroAssembler::movdbl(XMMRegister dst, AddressLiteral src) { 7526 void MacroAssembler::movdbl(XMMRegister dst, AddressLiteral src) {
7484 if (reachable(src)) { 7527 if (reachable(src)) {
7485 if (UseXmmLoadAndClearUpper) { 7528 if (UseXmmLoadAndClearUpper) {
7486 movsd (dst, as_Address(src)); 7529 movsd (dst, as_Address(src));
7487 } else { 7530 } else {