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comparison src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp @ 1060:323bd24c6520

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6769124: various 64-bit fixes for c1 Reviewed-by: never
author roland
date Mon, 02 Nov 2009 11:17:55 +0100
parents 148e5441d916
children ba263cfb7611 6deeaebad47a
comparison
equal deleted inserted replaced
1059:389049f3f393 1060:323bd24c6520
187 // copied into place by code emitted in the IR. 187 // copied into place by code emitted in the IR.
188 188
189 Register OSR_buf = osrBufferPointer()->as_register(); 189 Register OSR_buf = osrBufferPointer()->as_register();
190 { assert(frame::interpreter_frame_monitor_size() == BasicObjectLock::size(), "adjust code below"); 190 { assert(frame::interpreter_frame_monitor_size() == BasicObjectLock::size(), "adjust code below");
191 int monitor_offset = BytesPerWord * method()->max_locals() + 191 int monitor_offset = BytesPerWord * method()->max_locals() +
192 (BasicObjectLock::size() * BytesPerWord) * (number_of_locks - 1); 192 (2 * BytesPerWord) * (number_of_locks - 1);
193 // SharedRuntime::OSR_migration_begin() packs BasicObjectLocks in
194 // the OSR buffer using 2 word entries: first the lock and then
195 // the oop.
193 for (int i = 0; i < number_of_locks; i++) { 196 for (int i = 0; i < number_of_locks; i++) {
194 int slot_offset = monitor_offset - ((i * BasicObjectLock::size()) * BytesPerWord); 197 int slot_offset = monitor_offset - ((i * 2) * BytesPerWord);
195 #ifdef ASSERT 198 #ifdef ASSERT
196 // verify the interpreter's monitor has a non-null object 199 // verify the interpreter's monitor has a non-null object
197 { 200 {
198 Label L; 201 Label L;
199 __ ld_ptr(OSR_buf, slot_offset + BasicObjectLock::obj_offset_in_bytes(), O7); 202 __ ld_ptr(OSR_buf, slot_offset + 1*BytesPerWord, O7);
200 __ cmp(G0, O7); 203 __ cmp(G0, O7);
201 __ br(Assembler::notEqual, false, Assembler::pt, L); 204 __ br(Assembler::notEqual, false, Assembler::pt, L);
202 __ delayed()->nop(); 205 __ delayed()->nop();
203 __ stop("locked object is NULL"); 206 __ stop("locked object is NULL");
204 __ bind(L); 207 __ bind(L);
205 } 208 }
206 #endif // ASSERT 209 #endif // ASSERT
207 // Copy the lock field into the compiled activation. 210 // Copy the lock field into the compiled activation.
208 __ ld_ptr(OSR_buf, slot_offset + BasicObjectLock::lock_offset_in_bytes(), O7); 211 __ ld_ptr(OSR_buf, slot_offset + 0, O7);
209 __ st_ptr(O7, frame_map()->address_for_monitor_lock(i)); 212 __ st_ptr(O7, frame_map()->address_for_monitor_lock(i));
210 __ ld_ptr(OSR_buf, slot_offset + BasicObjectLock::obj_offset_in_bytes(), O7); 213 __ ld_ptr(OSR_buf, slot_offset + 1*BytesPerWord, O7);
211 __ st_ptr(O7, frame_map()->address_for_monitor_object(i)); 214 __ st_ptr(O7, frame_map()->address_for_monitor_object(i));
212 } 215 }
213 } 216 }
214 } 217 }
215 218
951 __ ldd(base, offset, to_reg->as_register_hi()); 954 __ ldd(base, offset, to_reg->as_register_hi());
952 #endif 955 #endif
953 } else { 956 } else {
954 #ifdef _LP64 957 #ifdef _LP64
955 assert(base != to_reg->as_register_lo(), "can't handle this"); 958 assert(base != to_reg->as_register_lo(), "can't handle this");
959 assert(O7 != to_reg->as_register_lo(), "can't handle this");
956 __ ld(base, offset + hi_word_offset_in_bytes, to_reg->as_register_lo()); 960 __ ld(base, offset + hi_word_offset_in_bytes, to_reg->as_register_lo());
961 __ lduw(base, offset + lo_word_offset_in_bytes, O7); // in case O7 is base or offset, use it last
957 __ sllx(to_reg->as_register_lo(), 32, to_reg->as_register_lo()); 962 __ sllx(to_reg->as_register_lo(), 32, to_reg->as_register_lo());
958 __ ld(base, offset + lo_word_offset_in_bytes, to_reg->as_register_lo()); 963 __ or3(to_reg->as_register_lo(), O7, to_reg->as_register_lo());
959 #else 964 #else
960 if (base == to_reg->as_register_lo()) { 965 if (base == to_reg->as_register_lo()) {
961 __ ld(base, offset + hi_word_offset_in_bytes, to_reg->as_register_hi()); 966 __ ld(base, offset + hi_word_offset_in_bytes, to_reg->as_register_hi());
962 __ ld(base, offset + lo_word_offset_in_bytes, to_reg->as_register_lo()); 967 __ ld(base, offset + lo_word_offset_in_bytes, to_reg->as_register_lo());
963 } else { 968 } else {
974 case T_DOUBLE: 979 case T_DOUBLE:
975 { 980 {
976 FloatRegister reg = to_reg->as_double_reg(); 981 FloatRegister reg = to_reg->as_double_reg();
977 // split unaligned loads 982 // split unaligned loads
978 if (unaligned || PatchALot) { 983 if (unaligned || PatchALot) {
979 __ ldf(FloatRegisterImpl::S, base, offset + BytesPerWord, reg->successor()); 984 __ ldf(FloatRegisterImpl::S, base, offset + 4, reg->successor());
980 __ ldf(FloatRegisterImpl::S, base, offset, reg); 985 __ ldf(FloatRegisterImpl::S, base, offset, reg);
981 } else { 986 } else {
982 __ ldf(FloatRegisterImpl::D, base, offset, to_reg->as_double_reg()); 987 __ ldf(FloatRegisterImpl::D, base, offset, to_reg->as_double_reg());
983 } 988 }
984 break; 989 break;
985 } 990 }
2198 Register src_ptr = O0; 2203 Register src_ptr = O0;
2199 Register dst_ptr = O1; 2204 Register dst_ptr = O1;
2200 Register len = O2; 2205 Register len = O2;
2201 2206
2202 __ add(src, arrayOopDesc::base_offset_in_bytes(basic_type), src_ptr); 2207 __ add(src, arrayOopDesc::base_offset_in_bytes(basic_type), src_ptr);
2208 LP64_ONLY(__ sra(src_pos, 0, src_pos);) //higher 32bits must be null
2203 if (shift == 0) { 2209 if (shift == 0) {
2204 __ add(src_ptr, src_pos, src_ptr); 2210 __ add(src_ptr, src_pos, src_ptr);
2205 } else { 2211 } else {
2206 __ sll(src_pos, shift, tmp); 2212 __ sll(src_pos, shift, tmp);
2207 __ add(src_ptr, tmp, src_ptr); 2213 __ add(src_ptr, tmp, src_ptr);
2208 } 2214 }
2209 2215
2210 __ add(dst, arrayOopDesc::base_offset_in_bytes(basic_type), dst_ptr); 2216 __ add(dst, arrayOopDesc::base_offset_in_bytes(basic_type), dst_ptr);
2217 LP64_ONLY(__ sra(dst_pos, 0, dst_pos);) //higher 32bits must be null
2211 if (shift == 0) { 2218 if (shift == 0) {
2212 __ add(dst_ptr, dst_pos, dst_ptr); 2219 __ add(dst_ptr, dst_pos, dst_ptr);
2213 } else { 2220 } else {
2214 __ sll(dst_pos, shift, tmp); 2221 __ sll(dst_pos, shift, tmp);
2215 __ add(dst_ptr, tmp, dst_ptr); 2222 __ add(dst_ptr, tmp, dst_ptr);