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comparison src/share/vm/c1/c1_LIRGenerator.cpp @ 1060:323bd24c6520

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6769124: various 64-bit fixes for c1 Reviewed-by: never
author roland
date Mon, 02 Nov 2009 11:17:55 +0100
parents 148e5441d916
children 6deeaebad47a
comparison
equal deleted inserted replaced
1059:389049f3f393 1060:323bd24c6520
1853 if (index_op->is_constant()) { 1853 if (index_op->is_constant()) {
1854 assert(log2_scale == 0, "must not have a scale"); 1854 assert(log2_scale == 0, "must not have a scale");
1855 addr = new LIR_Address(base_op, index_op->as_jint(), dst_type); 1855 addr = new LIR_Address(base_op, index_op->as_jint(), dst_type);
1856 } else { 1856 } else {
1857 #ifdef X86 1857 #ifdef X86
1858 #ifdef _LP64
1859 if (!index_op->is_illegal() && index_op->type() == T_INT) {
1860 LIR_Opr tmp = new_pointer_register();
1861 __ convert(Bytecodes::_i2l, index_op, tmp);
1862 index_op = tmp;
1863 }
1864 #endif
1858 addr = new LIR_Address(base_op, index_op, LIR_Address::Scale(log2_scale), 0, dst_type); 1865 addr = new LIR_Address(base_op, index_op, LIR_Address::Scale(log2_scale), 0, dst_type);
1859 #else 1866 #else
1860 if (index_op->is_illegal() || log2_scale == 0) { 1867 if (index_op->is_illegal() || log2_scale == 0) {
1868 #ifdef _LP64
1869 if (!index_op->is_illegal() && index_op->type() == T_INT) {
1870 LIR_Opr tmp = new_pointer_register();
1871 __ convert(Bytecodes::_i2l, index_op, tmp);
1872 index_op = tmp;
1873 }
1874 #endif
1861 addr = new LIR_Address(base_op, index_op, dst_type); 1875 addr = new LIR_Address(base_op, index_op, dst_type);
1862 } else { 1876 } else {
1863 LIR_Opr tmp = new_register(T_INT); 1877 LIR_Opr tmp = new_pointer_register();
1864 __ shift_left(index_op, log2_scale, tmp); 1878 __ shift_left(index_op, log2_scale, tmp);
1865 addr = new LIR_Address(base_op, tmp, dst_type); 1879 addr = new LIR_Address(base_op, tmp, dst_type);
1866 } 1880 }
1867 #endif 1881 #endif
1868 } 1882 }
1913 #endif 1927 #endif
1914 1928
1915 LIR_Opr index_op = idx.result(); 1929 LIR_Opr index_op = idx.result();
1916 if (log2_scale != 0) { 1930 if (log2_scale != 0) {
1917 // temporary fix (platform dependent code without shift on Intel would be better) 1931 // temporary fix (platform dependent code without shift on Intel would be better)
1918 index_op = new_register(T_INT); 1932 index_op = new_pointer_register();
1919 __ move(idx.result(), index_op); 1933 #ifdef _LP64
1934 if(idx.result()->type() == T_INT) {
1935 __ convert(Bytecodes::_i2l, idx.result(), index_op);
1936 } else {
1937 #endif
1938 __ move(idx.result(), index_op);
1939 #ifdef _LP64
1940 }
1941 #endif
1920 __ shift_left(index_op, log2_scale, index_op); 1942 __ shift_left(index_op, log2_scale, index_op);
1921 } 1943 }
1944 #ifdef _LP64
1945 else if(!index_op->is_illegal() && index_op->type() == T_INT) {
1946 LIR_Opr tmp = new_pointer_register();
1947 __ convert(Bytecodes::_i2l, index_op, tmp);
1948 index_op = tmp;
1949 }
1950 #endif
1922 1951
1923 LIR_Address* addr = new LIR_Address(base_op, index_op, x->basic_type()); 1952 LIR_Address* addr = new LIR_Address(base_op, index_op, x->basic_type());
1924 __ move(value.result(), addr); 1953 __ move(value.result(), addr);
1925 } 1954 }
1926 1955