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comparison src/cpu/x86/vm/assembler_x86.hpp @ 4970:33df1aeaebbf

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Merge with http://hg.openjdk.java.net/hsx/hsx24/hotspot/
author Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
date Mon, 27 Feb 2012 13:10:13 +0100
parents fd8114661503
children 6759698e3140
comparison
equal deleted inserted replaced
4703:2cfb7fb2dce7 4970:33df1aeaebbf
501 REX_WX = 0x4A, 501 REX_WX = 0x4A,
502 REX_WXB = 0x4B, 502 REX_WXB = 0x4B,
503 REX_WR = 0x4C, 503 REX_WR = 0x4C,
504 REX_WRB = 0x4D, 504 REX_WRB = 0x4D,
505 REX_WRX = 0x4E, 505 REX_WRX = 0x4E,
506 REX_WRXB = 0x4F 506 REX_WRXB = 0x4F,
507
508 VEX_3bytes = 0xC4,
509 VEX_2bytes = 0xC5
510 };
511
512 enum VexPrefix {
513 VEX_B = 0x20,
514 VEX_X = 0x40,
515 VEX_R = 0x80,
516 VEX_W = 0x80
517 };
518
519 enum VexSimdPrefix {
520 VEX_SIMD_NONE = 0x0,
521 VEX_SIMD_66 = 0x1,
522 VEX_SIMD_F3 = 0x2,
523 VEX_SIMD_F2 = 0x3
524 };
525
526 enum VexOpcode {
527 VEX_OPCODE_NONE = 0x0,
528 VEX_OPCODE_0F = 0x1,
529 VEX_OPCODE_0F_38 = 0x2,
530 VEX_OPCODE_0F_3A = 0x3
507 }; 531 };
508 532
509 enum WhichOperand { 533 enum WhichOperand {
510 // input to locate_operand, and format code for relocations 534 // input to locate_operand, and format code for relocations
511 imm_operand = 0, // embedded 32-bit|64-bit immediate operand 535 imm_operand = 0, // embedded 32-bit|64-bit immediate operand
544 void prefix(Register reg); 568 void prefix(Register reg);
545 void prefix(Address adr); 569 void prefix(Address adr);
546 void prefixq(Address adr); 570 void prefixq(Address adr);
547 571
548 void prefix(Address adr, Register reg, bool byteinst = false); 572 void prefix(Address adr, Register reg, bool byteinst = false);
573 void prefix(Address adr, XMMRegister reg);
549 void prefixq(Address adr, Register reg); 574 void prefixq(Address adr, Register reg);
550 575 void prefixq(Address adr, XMMRegister reg);
551 void prefix(Address adr, XMMRegister reg);
552 576
553 void prefetch_prefix(Address src); 577 void prefetch_prefix(Address src);
578
579 void rex_prefix(Address adr, XMMRegister xreg,
580 VexSimdPrefix pre, VexOpcode opc, bool rex_w);
581 int rex_prefix_and_encode(int dst_enc, int src_enc,
582 VexSimdPrefix pre, VexOpcode opc, bool rex_w);
583
584 void vex_prefix(bool vex_r, bool vex_b, bool vex_x, bool vex_w,
585 int nds_enc, VexSimdPrefix pre, VexOpcode opc,
586 bool vector256);
587
588 void vex_prefix(Address adr, int nds_enc, int xreg_enc,
589 VexSimdPrefix pre, VexOpcode opc,
590 bool vex_w, bool vector256);
591
592 void vex_prefix(XMMRegister dst, XMMRegister nds, Address src,
593 VexSimdPrefix pre, bool vector256 = false) {
594 vex_prefix(src, nds->encoding(), dst->encoding(),
595 pre, VEX_OPCODE_0F, false, vector256);
596 }
597
598 int vex_prefix_and_encode(int dst_enc, int nds_enc, int src_enc,
599 VexSimdPrefix pre, VexOpcode opc,
600 bool vex_w, bool vector256);
601
602 int vex_prefix_and_encode(XMMRegister dst, XMMRegister nds, XMMRegister src,
603 VexSimdPrefix pre, bool vector256 = false) {
604 return vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(),
605 pre, VEX_OPCODE_0F, false, vector256);
606 }
607
608 void simd_prefix(XMMRegister xreg, XMMRegister nds, Address adr,
609 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F,
610 bool rex_w = false, bool vector256 = false);
611
612 void simd_prefix(XMMRegister dst, Address src,
613 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F) {
614 simd_prefix(dst, xnoreg, src, pre, opc);
615 }
616 void simd_prefix(Address dst, XMMRegister src, VexSimdPrefix pre) {
617 simd_prefix(src, dst, pre);
618 }
619 void simd_prefix_q(XMMRegister dst, XMMRegister nds, Address src,
620 VexSimdPrefix pre) {
621 bool rex_w = true;
622 simd_prefix(dst, nds, src, pre, VEX_OPCODE_0F, rex_w);
623 }
624
625
626 int simd_prefix_and_encode(XMMRegister dst, XMMRegister nds, XMMRegister src,
627 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F,
628 bool rex_w = false, bool vector256 = false);
629
630 int simd_prefix_and_encode(XMMRegister dst, XMMRegister src,
631 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F) {
632 return simd_prefix_and_encode(dst, xnoreg, src, pre, opc);
633 }
634
635 // Move/convert 32-bit integer value.
636 int simd_prefix_and_encode(XMMRegister dst, XMMRegister nds, Register src,
637 VexSimdPrefix pre) {
638 // It is OK to cast from Register to XMMRegister to pass argument here
639 // since only encoding is used in simd_prefix_and_encode() and number of
640 // Gen and Xmm registers are the same.
641 return simd_prefix_and_encode(dst, nds, as_XMMRegister(src->encoding()), pre);
642 }
643 int simd_prefix_and_encode(XMMRegister dst, Register src, VexSimdPrefix pre) {
644 return simd_prefix_and_encode(dst, xnoreg, src, pre);
645 }
646 int simd_prefix_and_encode(Register dst, XMMRegister src,
647 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F) {
648 return simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, pre, opc);
649 }
650
651 // Move/convert 64-bit integer value.
652 int simd_prefix_and_encode_q(XMMRegister dst, XMMRegister nds, Register src,
653 VexSimdPrefix pre) {
654 bool rex_w = true;
655 return simd_prefix_and_encode(dst, nds, as_XMMRegister(src->encoding()), pre, VEX_OPCODE_0F, rex_w);
656 }
657 int simd_prefix_and_encode_q(XMMRegister dst, Register src, VexSimdPrefix pre) {
658 return simd_prefix_and_encode_q(dst, xnoreg, src, pre);
659 }
660 int simd_prefix_and_encode_q(Register dst, XMMRegister src,
661 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F) {
662 bool rex_w = true;
663 return simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, pre, opc, rex_w);
664 }
554 665
555 // Helper functions for groups of instructions 666 // Helper functions for groups of instructions
556 void emit_arith_b(int op1, int op2, Register dst, int imm8); 667 void emit_arith_b(int op1, int op2, Register dst, int imm8);
557 668
558 void emit_arith(int op1, int op2, Register dst, int32_t imm32); 669 void emit_arith(int op1, int op2, Register dst, int32_t imm32);
670 // Force generation of a 4 byte immediate value even if it fits into 8bit
671 void emit_arith_imm32(int op1, int op2, Register dst, int32_t imm32);
559 // only 32bit?? 672 // only 32bit??
560 void emit_arith(int op1, int op2, Register dst, jobject obj); 673 void emit_arith(int op1, int op2, Register dst, jobject obj);
561 void emit_arith(int op1, int op2, Register dst, Register src); 674 void emit_arith(int op1, int op2, Register dst, Register src);
562 675
563 void emit_operand(Register reg, 676 void emit_operand(Register reg,
762 875
763 // Add Scalar Single-Precision Floating-Point Values 876 // Add Scalar Single-Precision Floating-Point Values
764 void addss(XMMRegister dst, Address src); 877 void addss(XMMRegister dst, Address src);
765 void addss(XMMRegister dst, XMMRegister src); 878 void addss(XMMRegister dst, XMMRegister src);
766 879
880 void andl(Address dst, int32_t imm32);
767 void andl(Register dst, int32_t imm32); 881 void andl(Register dst, int32_t imm32);
768 void andl(Register dst, Address src); 882 void andl(Register dst, Address src);
769 void andl(Register dst, Register src); 883 void andl(Register dst, Register src);
770 884
771 void andq(Address dst, int32_t imm32); 885 void andq(Address dst, int32_t imm32);
772 void andq(Register dst, int32_t imm32); 886 void andq(Register dst, int32_t imm32);
773 void andq(Register dst, Address src); 887 void andq(Register dst, Address src);
774 void andq(Register dst, Register src); 888 void andq(Register dst, Register src);
775 889
776 // Bitwise Logical AND of Packed Double-Precision Floating-Point Values 890 // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
777 void andpd(XMMRegister dst, Address src);
778 void andpd(XMMRegister dst, XMMRegister src); 891 void andpd(XMMRegister dst, XMMRegister src);
892
893 // Bitwise Logical AND of Packed Single-Precision Floating-Point Values
894 void andps(XMMRegister dst, XMMRegister src);
779 895
780 void bsfl(Register dst, Register src); 896 void bsfl(Register dst, Register src);
781 void bsrl(Register dst, Register src); 897 void bsrl(Register dst, Register src);
782 898
783 #ifdef _LP64 899 #ifdef _LP64
835 951
836 void cmpxchgq(Register reg, Address adr); 952 void cmpxchgq(Register reg, Address adr);
837 953
838 // Ordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS 954 // Ordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS
839 void comisd(XMMRegister dst, Address src); 955 void comisd(XMMRegister dst, Address src);
956 void comisd(XMMRegister dst, XMMRegister src);
840 957
841 // Ordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS 958 // Ordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS
842 void comiss(XMMRegister dst, Address src); 959 void comiss(XMMRegister dst, Address src);
960 void comiss(XMMRegister dst, XMMRegister src);
843 961
844 // Identify processor type and features 962 // Identify processor type and features
845 void cpuid() { 963 void cpuid() {
846 emit_byte(0x0F); 964 emit_byte(0x0F);
847 emit_byte(0xA2); 965 emit_byte(0xA2);
848 } 966 }
849 967
850 // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value 968 // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
851 void cvtsd2ss(XMMRegister dst, XMMRegister src); 969 void cvtsd2ss(XMMRegister dst, XMMRegister src);
970 void cvtsd2ss(XMMRegister dst, Address src);
852 971
853 // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value 972 // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
854 void cvtsi2sdl(XMMRegister dst, Register src); 973 void cvtsi2sdl(XMMRegister dst, Register src);
974 void cvtsi2sdl(XMMRegister dst, Address src);
855 void cvtsi2sdq(XMMRegister dst, Register src); 975 void cvtsi2sdq(XMMRegister dst, Register src);
976 void cvtsi2sdq(XMMRegister dst, Address src);
856 977
857 // Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value 978 // Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value
858 void cvtsi2ssl(XMMRegister dst, Register src); 979 void cvtsi2ssl(XMMRegister dst, Register src);
980 void cvtsi2ssl(XMMRegister dst, Address src);
859 void cvtsi2ssq(XMMRegister dst, Register src); 981 void cvtsi2ssq(XMMRegister dst, Register src);
982 void cvtsi2ssq(XMMRegister dst, Address src);
860 983
861 // Convert Packed Signed Doubleword Integers to Packed Double-Precision Floating-Point Value 984 // Convert Packed Signed Doubleword Integers to Packed Double-Precision Floating-Point Value
862 void cvtdq2pd(XMMRegister dst, XMMRegister src); 985 void cvtdq2pd(XMMRegister dst, XMMRegister src);
863 986
864 // Convert Packed Signed Doubleword Integers to Packed Single-Precision Floating-Point Value 987 // Convert Packed Signed Doubleword Integers to Packed Single-Precision Floating-Point Value
865 void cvtdq2ps(XMMRegister dst, XMMRegister src); 988 void cvtdq2ps(XMMRegister dst, XMMRegister src);
866 989
867 // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value 990 // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
868 void cvtss2sd(XMMRegister dst, XMMRegister src); 991 void cvtss2sd(XMMRegister dst, XMMRegister src);
992 void cvtss2sd(XMMRegister dst, Address src);
869 993
870 // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer 994 // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
871 void cvttsd2sil(Register dst, Address src); 995 void cvttsd2sil(Register dst, Address src);
872 void cvttsd2sil(Register dst, XMMRegister src); 996 void cvttsd2sil(Register dst, XMMRegister src);
873 void cvttsd2siq(Register dst, XMMRegister src); 997 void cvttsd2siq(Register dst, XMMRegister src);
1138 // Move Double Quadword 1262 // Move Double Quadword
1139 void movdq(XMMRegister dst, Register src); 1263 void movdq(XMMRegister dst, Register src);
1140 void movdq(Register dst, XMMRegister src); 1264 void movdq(Register dst, XMMRegister src);
1141 1265
1142 // Move Aligned Double Quadword 1266 // Move Aligned Double Quadword
1143 void movdqa(Address dst, XMMRegister src);
1144 void movdqa(XMMRegister dst, Address src);
1145 void movdqa(XMMRegister dst, XMMRegister src); 1267 void movdqa(XMMRegister dst, XMMRegister src);
1146 1268
1147 // Move Unaligned Double Quadword 1269 // Move Unaligned Double Quadword
1148 void movdqu(Address dst, XMMRegister src); 1270 void movdqu(Address dst, XMMRegister src);
1149 void movdqu(XMMRegister dst, Address src); 1271 void movdqu(XMMRegister dst, Address src);
1259 void orq(Address dst, int32_t imm32); 1381 void orq(Address dst, int32_t imm32);
1260 void orq(Register dst, int32_t imm32); 1382 void orq(Register dst, int32_t imm32);
1261 void orq(Register dst, Address src); 1383 void orq(Register dst, Address src);
1262 void orq(Register dst, Register src); 1384 void orq(Register dst, Register src);
1263 1385
1386 // Pack with unsigned saturation
1387 void packuswb(XMMRegister dst, XMMRegister src);
1388 void packuswb(XMMRegister dst, Address src);
1389
1264 // SSE4.2 string instructions 1390 // SSE4.2 string instructions
1265 void pcmpestri(XMMRegister xmm1, XMMRegister xmm2, int imm8); 1391 void pcmpestri(XMMRegister xmm1, XMMRegister xmm2, int imm8);
1266 void pcmpestri(XMMRegister xmm1, Address src, int imm8); 1392 void pcmpestri(XMMRegister xmm1, Address src, int imm8);
1393
1394 // SSE4.1 packed move
1395 void pmovzxbw(XMMRegister dst, XMMRegister src);
1396 void pmovzxbw(XMMRegister dst, Address src);
1267 1397
1268 #ifndef _LP64 // no 32bit push/pop on amd64 1398 #ifndef _LP64 // no 32bit push/pop on amd64
1269 void popl(Address dst); 1399 void popl(Address dst);
1270 #endif 1400 #endif
1271 1401
1290 void prefetcht2(Address src); 1420 void prefetcht2(Address src);
1291 void prefetchw(Address src); 1421 void prefetchw(Address src);
1292 1422
1293 // POR - Bitwise logical OR 1423 // POR - Bitwise logical OR
1294 void por(XMMRegister dst, XMMRegister src); 1424 void por(XMMRegister dst, XMMRegister src);
1425 void por(XMMRegister dst, Address src);
1295 1426
1296 // Shuffle Packed Doublewords 1427 // Shuffle Packed Doublewords
1297 void pshufd(XMMRegister dst, XMMRegister src, int mode); 1428 void pshufd(XMMRegister dst, XMMRegister src, int mode);
1298 void pshufd(XMMRegister dst, Address src, int mode); 1429 void pshufd(XMMRegister dst, Address src, int mode);
1299 1430
1311 void ptest(XMMRegister dst, XMMRegister src); 1442 void ptest(XMMRegister dst, XMMRegister src);
1312 void ptest(XMMRegister dst, Address src); 1443 void ptest(XMMRegister dst, Address src);
1313 1444
1314 // Interleave Low Bytes 1445 // Interleave Low Bytes
1315 void punpcklbw(XMMRegister dst, XMMRegister src); 1446 void punpcklbw(XMMRegister dst, XMMRegister src);
1447 void punpcklbw(XMMRegister dst, Address src);
1448
1449 // Interleave Low Doublewords
1450 void punpckldq(XMMRegister dst, XMMRegister src);
1451 void punpckldq(XMMRegister dst, Address src);
1316 1452
1317 #ifndef _LP64 // no 32bit push/pop on amd64 1453 #ifndef _LP64 // no 32bit push/pop on amd64
1318 void pushl(Address src); 1454 void pushl(Address src);
1319 #endif 1455 #endif
1320 1456
1390 void subq(Address dst, Register src); 1526 void subq(Address dst, Register src);
1391 void subq(Register dst, int32_t imm32); 1527 void subq(Register dst, int32_t imm32);
1392 void subq(Register dst, Address src); 1528 void subq(Register dst, Address src);
1393 void subq(Register dst, Register src); 1529 void subq(Register dst, Register src);
1394 1530
1531 // Force generation of a 4 byte immediate value even if it fits into 8bit
1532 void subl_imm32(Register dst, int32_t imm32);
1533 void subq_imm32(Register dst, int32_t imm32);
1395 1534
1396 // Subtract Scalar Double-Precision Floating-Point Values 1535 // Subtract Scalar Double-Precision Floating-Point Values
1397 void subsd(XMMRegister dst, Address src); 1536 void subsd(XMMRegister dst, Address src);
1398 void subsd(XMMRegister dst, XMMRegister src); 1537 void subsd(XMMRegister dst, XMMRegister src);
1399 1538
1427 void xchgl(Register dst, Register src); 1566 void xchgl(Register dst, Register src);
1428 1567
1429 void xchgq(Register reg, Address adr); 1568 void xchgq(Register reg, Address adr);
1430 void xchgq(Register dst, Register src); 1569 void xchgq(Register dst, Register src);
1431 1570
1571 // Get Value of Extended Control Register
1572 void xgetbv() {
1573 emit_byte(0x0F);
1574 emit_byte(0x01);
1575 emit_byte(0xD0);
1576 }
1577
1432 void xorl(Register dst, int32_t imm32); 1578 void xorl(Register dst, int32_t imm32);
1433 void xorl(Register dst, Address src); 1579 void xorl(Register dst, Address src);
1434 void xorl(Register dst, Register src); 1580 void xorl(Register dst, Register src);
1435 1581
1436 void xorq(Register dst, Address src); 1582 void xorq(Register dst, Address src);
1437 void xorq(Register dst, Register src); 1583 void xorq(Register dst, Register src);
1438 1584
1439 // Bitwise Logical XOR of Packed Double-Precision Floating-Point Values 1585 // Bitwise Logical XOR of Packed Double-Precision Floating-Point Values
1586 void xorpd(XMMRegister dst, XMMRegister src);
1587
1588 // Bitwise Logical XOR of Packed Single-Precision Floating-Point Values
1589 void xorps(XMMRegister dst, XMMRegister src);
1590
1591 void set_byte_if_not_zero(Register dst); // sets reg to 1 if not zero, otherwise 0
1592
1593 // AVX 3-operands instructions (encoded with VEX prefix)
1594 void vaddsd(XMMRegister dst, XMMRegister nds, Address src);
1595 void vaddsd(XMMRegister dst, XMMRegister nds, XMMRegister src);
1596 void vaddss(XMMRegister dst, XMMRegister nds, Address src);
1597 void vaddss(XMMRegister dst, XMMRegister nds, XMMRegister src);
1598 void vandpd(XMMRegister dst, XMMRegister nds, Address src);
1599 void vandps(XMMRegister dst, XMMRegister nds, Address src);
1600 void vdivsd(XMMRegister dst, XMMRegister nds, Address src);
1601 void vdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src);
1602 void vdivss(XMMRegister dst, XMMRegister nds, Address src);
1603 void vdivss(XMMRegister dst, XMMRegister nds, XMMRegister src);
1604 void vmulsd(XMMRegister dst, XMMRegister nds, Address src);
1605 void vmulsd(XMMRegister dst, XMMRegister nds, XMMRegister src);
1606 void vmulss(XMMRegister dst, XMMRegister nds, Address src);
1607 void vmulss(XMMRegister dst, XMMRegister nds, XMMRegister src);
1608 void vsubsd(XMMRegister dst, XMMRegister nds, Address src);
1609 void vsubsd(XMMRegister dst, XMMRegister nds, XMMRegister src);
1610 void vsubss(XMMRegister dst, XMMRegister nds, Address src);
1611 void vsubss(XMMRegister dst, XMMRegister nds, XMMRegister src);
1612 void vxorpd(XMMRegister dst, XMMRegister nds, Address src);
1613 void vxorps(XMMRegister dst, XMMRegister nds, Address src);
1614
1615
1616 protected:
1617 // Next instructions require address alignment 16 bytes SSE mode.
1618 // They should be called only from corresponding MacroAssembler instructions.
1619 void andpd(XMMRegister dst, Address src);
1620 void andps(XMMRegister dst, Address src);
1440 void xorpd(XMMRegister dst, Address src); 1621 void xorpd(XMMRegister dst, Address src);
1441 void xorpd(XMMRegister dst, XMMRegister src);
1442
1443 // Bitwise Logical XOR of Packed Single-Precision Floating-Point Values
1444 void xorps(XMMRegister dst, Address src); 1622 void xorps(XMMRegister dst, Address src);
1445 void xorps(XMMRegister dst, XMMRegister src); 1623
1446
1447 void set_byte_if_not_zero(Register dst); // sets reg to 1 if not zero, otherwise 0
1448 }; 1624 };
1449 1625
1450 1626
1451 // MacroAssembler extends Assembler by frequently used macros. 1627 // MacroAssembler extends Assembler by frequently used macros.
1452 // 1628 //
1590 void incrementl(ArrayAddress dst); 1766 void incrementl(ArrayAddress dst);
1591 1767
1592 // Alignment 1768 // Alignment
1593 void align(int modulus); 1769 void align(int modulus);
1594 1770
1595 // Misc 1771 // A 5 byte nop that is safe for patching (see patch_verified_entry)
1596 void fat_nop(); // 5 byte nop 1772 void fat_nop();
1597 1773
1598 // Stack frame creation/removal 1774 // Stack frame creation/removal
1599 void enter(); 1775 void enter();
1600 void leave(); 1776 void leave();
1601 1777
2102 2278
2103 void subptr(Address dst, int32_t src) { LP64_ONLY(subq(dst, src)) NOT_LP64(subl(dst, src)); } 2279 void subptr(Address dst, int32_t src) { LP64_ONLY(subq(dst, src)) NOT_LP64(subl(dst, src)); }
2104 2280
2105 void subptr(Register dst, Address src) { LP64_ONLY(subq(dst, src)) NOT_LP64(subl(dst, src)); } 2281 void subptr(Register dst, Address src) { LP64_ONLY(subq(dst, src)) NOT_LP64(subl(dst, src)); }
2106 void subptr(Register dst, int32_t src); 2282 void subptr(Register dst, int32_t src);
2283 // Force generation of a 4 byte immediate value even if it fits into 8bit
2284 void subptr_imm32(Register dst, int32_t src);
2107 void subptr(Register dst, Register src); 2285 void subptr(Register dst, Register src);
2108 void subptr(Register dst, RegisterOrConstant src) { 2286 void subptr(Register dst, RegisterOrConstant src) {
2109 if (src.is_constant()) subptr(dst, (int) src.as_constant()); 2287 if (src.is_constant()) subptr(dst, (int) src.as_constant());
2110 else subptr(dst, src.as_register()); 2288 else subptr(dst, src.as_register());
2111 } 2289 }
2173 // Floating 2351 // Floating
2174 2352
2175 void andpd(XMMRegister dst, Address src) { Assembler::andpd(dst, src); } 2353 void andpd(XMMRegister dst, Address src) { Assembler::andpd(dst, src); }
2176 void andpd(XMMRegister dst, AddressLiteral src); 2354 void andpd(XMMRegister dst, AddressLiteral src);
2177 2355
2356 void andps(XMMRegister dst, XMMRegister src) { Assembler::andps(dst, src); }
2357 void andps(XMMRegister dst, Address src) { Assembler::andps(dst, src); }
2358 void andps(XMMRegister dst, AddressLiteral src);
2359
2360 void comiss(XMMRegister dst, XMMRegister src) { Assembler::comiss(dst, src); }
2178 void comiss(XMMRegister dst, Address src) { Assembler::comiss(dst, src); } 2361 void comiss(XMMRegister dst, Address src) { Assembler::comiss(dst, src); }
2179 void comiss(XMMRegister dst, AddressLiteral src); 2362 void comiss(XMMRegister dst, AddressLiteral src);
2180 2363
2364 void comisd(XMMRegister dst, XMMRegister src) { Assembler::comisd(dst, src); }
2181 void comisd(XMMRegister dst, Address src) { Assembler::comisd(dst, src); } 2365 void comisd(XMMRegister dst, Address src) { Assembler::comisd(dst, src); }
2182 void comisd(XMMRegister dst, AddressLiteral src); 2366 void comisd(XMMRegister dst, AddressLiteral src);
2183 2367
2184 void fadd_s(Address src) { Assembler::fadd_s(src); } 2368 void fadd_s(Address src) { Assembler::fadd_s(src); }
2185 void fadd_s(AddressLiteral src) { Assembler::fadd_s(as_Address(src)); } 2369 void fadd_s(AddressLiteral src) { Assembler::fadd_s(as_Address(src)); }
2209 void movss(Address dst, XMMRegister src) { Assembler::movss(dst, src); } 2393 void movss(Address dst, XMMRegister src) { Assembler::movss(dst, src); }
2210 void movss(XMMRegister dst, XMMRegister src) { Assembler::movss(dst, src); } 2394 void movss(XMMRegister dst, XMMRegister src) { Assembler::movss(dst, src); }
2211 void movss(XMMRegister dst, Address src) { Assembler::movss(dst, src); } 2395 void movss(XMMRegister dst, Address src) { Assembler::movss(dst, src); }
2212 void movss(XMMRegister dst, AddressLiteral src); 2396 void movss(XMMRegister dst, AddressLiteral src);
2213 2397
2214 void movlpd(XMMRegister dst, Address src) {Assembler::movlpd(dst, src); } 2398 void movlpd(XMMRegister dst, Address src) {Assembler::movlpd(dst, src); }
2215 void movlpd(XMMRegister dst, AddressLiteral src); 2399 void movlpd(XMMRegister dst, AddressLiteral src);
2216 2400
2217 public: 2401 public:
2218 2402
2219 void addsd(XMMRegister dst, XMMRegister src) { Assembler::addsd(dst, src); } 2403 void addsd(XMMRegister dst, XMMRegister src) { Assembler::addsd(dst, src); }
2220 void addsd(XMMRegister dst, Address src) { Assembler::addsd(dst, src); } 2404 void addsd(XMMRegister dst, Address src) { Assembler::addsd(dst, src); }
2221 void addsd(XMMRegister dst, AddressLiteral src) { Assembler::addsd(dst, as_Address(src)); } 2405 void addsd(XMMRegister dst, AddressLiteral src);
2222 2406
2223 void addss(XMMRegister dst, XMMRegister src) { Assembler::addss(dst, src); } 2407 void addss(XMMRegister dst, XMMRegister src) { Assembler::addss(dst, src); }
2224 void addss(XMMRegister dst, Address src) { Assembler::addss(dst, src); } 2408 void addss(XMMRegister dst, Address src) { Assembler::addss(dst, src); }
2225 void addss(XMMRegister dst, AddressLiteral src) { Assembler::addss(dst, as_Address(src)); } 2409 void addss(XMMRegister dst, AddressLiteral src);
2226 2410
2227 void divsd(XMMRegister dst, XMMRegister src) { Assembler::divsd(dst, src); } 2411 void divsd(XMMRegister dst, XMMRegister src) { Assembler::divsd(dst, src); }
2228 void divsd(XMMRegister dst, Address src) { Assembler::divsd(dst, src); } 2412 void divsd(XMMRegister dst, Address src) { Assembler::divsd(dst, src); }
2229 void divsd(XMMRegister dst, AddressLiteral src) { Assembler::divsd(dst, as_Address(src)); } 2413 void divsd(XMMRegister dst, AddressLiteral src);
2230 2414
2231 void divss(XMMRegister dst, XMMRegister src) { Assembler::divss(dst, src); } 2415 void divss(XMMRegister dst, XMMRegister src) { Assembler::divss(dst, src); }
2232 void divss(XMMRegister dst, Address src) { Assembler::divss(dst, src); } 2416 void divss(XMMRegister dst, Address src) { Assembler::divss(dst, src); }
2233 void divss(XMMRegister dst, AddressLiteral src) { Assembler::divss(dst, as_Address(src)); } 2417 void divss(XMMRegister dst, AddressLiteral src);
2234 2418
2235 void movsd(XMMRegister dst, XMMRegister src) { Assembler::movsd(dst, src); } 2419 void movsd(XMMRegister dst, XMMRegister src) { Assembler::movsd(dst, src); }
2236 void movsd(Address dst, XMMRegister src) { Assembler::movsd(dst, src); } 2420 void movsd(Address dst, XMMRegister src) { Assembler::movsd(dst, src); }
2237 void movsd(XMMRegister dst, Address src) { Assembler::movsd(dst, src); } 2421 void movsd(XMMRegister dst, Address src) { Assembler::movsd(dst, src); }
2238 void movsd(XMMRegister dst, AddressLiteral src) { Assembler::movsd(dst, as_Address(src)); } 2422 void movsd(XMMRegister dst, AddressLiteral src);
2239 2423
2240 void mulsd(XMMRegister dst, XMMRegister src) { Assembler::mulsd(dst, src); } 2424 void mulsd(XMMRegister dst, XMMRegister src) { Assembler::mulsd(dst, src); }
2241 void mulsd(XMMRegister dst, Address src) { Assembler::mulsd(dst, src); } 2425 void mulsd(XMMRegister dst, Address src) { Assembler::mulsd(dst, src); }
2242 void mulsd(XMMRegister dst, AddressLiteral src) { Assembler::mulsd(dst, as_Address(src)); } 2426 void mulsd(XMMRegister dst, AddressLiteral src);
2243 2427
2244 void mulss(XMMRegister dst, XMMRegister src) { Assembler::mulss(dst, src); } 2428 void mulss(XMMRegister dst, XMMRegister src) { Assembler::mulss(dst, src); }
2245 void mulss(XMMRegister dst, Address src) { Assembler::mulss(dst, src); } 2429 void mulss(XMMRegister dst, Address src) { Assembler::mulss(dst, src); }
2246 void mulss(XMMRegister dst, AddressLiteral src) { Assembler::mulss(dst, as_Address(src)); } 2430 void mulss(XMMRegister dst, AddressLiteral src);
2247 2431
2248 void sqrtsd(XMMRegister dst, XMMRegister src) { Assembler::sqrtsd(dst, src); } 2432 void sqrtsd(XMMRegister dst, XMMRegister src) { Assembler::sqrtsd(dst, src); }
2249 void sqrtsd(XMMRegister dst, Address src) { Assembler::sqrtsd(dst, src); } 2433 void sqrtsd(XMMRegister dst, Address src) { Assembler::sqrtsd(dst, src); }
2250 void sqrtsd(XMMRegister dst, AddressLiteral src) { Assembler::sqrtsd(dst, as_Address(src)); } 2434 void sqrtsd(XMMRegister dst, AddressLiteral src);
2251 2435
2252 void sqrtss(XMMRegister dst, XMMRegister src) { Assembler::sqrtss(dst, src); } 2436 void sqrtss(XMMRegister dst, XMMRegister src) { Assembler::sqrtss(dst, src); }
2253 void sqrtss(XMMRegister dst, Address src) { Assembler::sqrtss(dst, src); } 2437 void sqrtss(XMMRegister dst, Address src) { Assembler::sqrtss(dst, src); }
2254 void sqrtss(XMMRegister dst, AddressLiteral src) { Assembler::sqrtss(dst, as_Address(src)); } 2438 void sqrtss(XMMRegister dst, AddressLiteral src);
2255 2439
2256 void subsd(XMMRegister dst, XMMRegister src) { Assembler::subsd(dst, src); } 2440 void subsd(XMMRegister dst, XMMRegister src) { Assembler::subsd(dst, src); }
2257 void subsd(XMMRegister dst, Address src) { Assembler::subsd(dst, src); } 2441 void subsd(XMMRegister dst, Address src) { Assembler::subsd(dst, src); }
2258 void subsd(XMMRegister dst, AddressLiteral src) { Assembler::subsd(dst, as_Address(src)); } 2442 void subsd(XMMRegister dst, AddressLiteral src);
2259 2443
2260 void subss(XMMRegister dst, XMMRegister src) { Assembler::subss(dst, src); } 2444 void subss(XMMRegister dst, XMMRegister src) { Assembler::subss(dst, src); }
2261 void subss(XMMRegister dst, Address src) { Assembler::subss(dst, src); } 2445 void subss(XMMRegister dst, Address src) { Assembler::subss(dst, src); }
2262 void subss(XMMRegister dst, AddressLiteral src) { Assembler::subss(dst, as_Address(src)); } 2446 void subss(XMMRegister dst, AddressLiteral src);
2263 2447
2264 void ucomiss(XMMRegister dst, XMMRegister src) { Assembler::ucomiss(dst, src); } 2448 void ucomiss(XMMRegister dst, XMMRegister src) { Assembler::ucomiss(dst, src); }
2265 void ucomiss(XMMRegister dst, Address src) { Assembler::ucomiss(dst, src); } 2449 void ucomiss(XMMRegister dst, Address src) { Assembler::ucomiss(dst, src); }
2266 void ucomiss(XMMRegister dst, AddressLiteral src); 2450 void ucomiss(XMMRegister dst, AddressLiteral src);
2267 2451
2268 void ucomisd(XMMRegister dst, XMMRegister src) { Assembler::ucomisd(dst, src); } 2452 void ucomisd(XMMRegister dst, XMMRegister src) { Assembler::ucomisd(dst, src); }
2269 void ucomisd(XMMRegister dst, Address src) { Assembler::ucomisd(dst, src); } 2453 void ucomisd(XMMRegister dst, Address src) { Assembler::ucomisd(dst, src); }
2270 void ucomisd(XMMRegister dst, AddressLiteral src); 2454 void ucomisd(XMMRegister dst, AddressLiteral src);
2271 2455
2272 // Bitwise Logical XOR of Packed Double-Precision Floating-Point Values 2456 // Bitwise Logical XOR of Packed Double-Precision Floating-Point Values
2273 void xorpd(XMMRegister dst, XMMRegister src) { Assembler::xorpd(dst, src); } 2457 void xorpd(XMMRegister dst, XMMRegister src) { Assembler::xorpd(dst, src); }
2274 void xorpd(XMMRegister dst, Address src) { Assembler::xorpd(dst, src); } 2458 void xorpd(XMMRegister dst, Address src) { Assembler::xorpd(dst, src); }
2277 // Bitwise Logical XOR of Packed Single-Precision Floating-Point Values 2461 // Bitwise Logical XOR of Packed Single-Precision Floating-Point Values
2278 void xorps(XMMRegister dst, XMMRegister src) { Assembler::xorps(dst, src); } 2462 void xorps(XMMRegister dst, XMMRegister src) { Assembler::xorps(dst, src); }
2279 void xorps(XMMRegister dst, Address src) { Assembler::xorps(dst, src); } 2463 void xorps(XMMRegister dst, Address src) { Assembler::xorps(dst, src); }
2280 void xorps(XMMRegister dst, AddressLiteral src); 2464 void xorps(XMMRegister dst, AddressLiteral src);
2281 2465
2466 // AVX 3-operands instructions
2467
2468 void vaddsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vaddsd(dst, nds, src); }
2469 void vaddsd(XMMRegister dst, XMMRegister nds, Address src) { Assembler::vaddsd(dst, nds, src); }
2470 void vaddsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
2471
2472 void vaddss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vaddss(dst, nds, src); }
2473 void vaddss(XMMRegister dst, XMMRegister nds, Address src) { Assembler::vaddss(dst, nds, src); }
2474 void vaddss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
2475
2476 void vandpd(XMMRegister dst, XMMRegister nds, Address src) { Assembler::vandpd(dst, nds, src); }
2477 void vandpd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
2478
2479 void vandps(XMMRegister dst, XMMRegister nds, Address src) { Assembler::vandps(dst, nds, src); }
2480 void vandps(XMMRegister dst, XMMRegister nds, AddressLiteral src);
2481
2482 void vdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vdivsd(dst, nds, src); }
2483 void vdivsd(XMMRegister dst, XMMRegister nds, Address src) { Assembler::vdivsd(dst, nds, src); }
2484 void vdivsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
2485
2486 void vdivss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vdivss(dst, nds, src); }
2487 void vdivss(XMMRegister dst, XMMRegister nds, Address src) { Assembler::vdivss(dst, nds, src); }
2488 void vdivss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
2489
2490 void vmulsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vmulsd(dst, nds, src); }
2491 void vmulsd(XMMRegister dst, XMMRegister nds, Address src) { Assembler::vmulsd(dst, nds, src); }
2492 void vmulsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
2493
2494 void vmulss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vmulss(dst, nds, src); }
2495 void vmulss(XMMRegister dst, XMMRegister nds, Address src) { Assembler::vmulss(dst, nds, src); }
2496 void vmulss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
2497
2498 void vsubsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vsubsd(dst, nds, src); }
2499 void vsubsd(XMMRegister dst, XMMRegister nds, Address src) { Assembler::vsubsd(dst, nds, src); }
2500 void vsubsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
2501
2502 void vsubss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vsubss(dst, nds, src); }
2503 void vsubss(XMMRegister dst, XMMRegister nds, Address src) { Assembler::vsubss(dst, nds, src); }
2504 void vsubss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
2505
2506 void vxorpd(XMMRegister dst, XMMRegister nds, Address src) { Assembler::vxorpd(dst, nds, src); }
2507 void vxorpd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
2508
2509 void vxorps(XMMRegister dst, XMMRegister nds, Address src) { Assembler::vxorps(dst, nds, src); }
2510 void vxorps(XMMRegister dst, XMMRegister nds, AddressLiteral src);
2511
2512
2282 // Data 2513 // Data
2283 2514
2284 void cmov32( Condition cc, Register dst, Address src); 2515 void cmov32( Condition cc, Register dst, Address src);
2285 void cmov32( Condition cc, Register dst, Register src); 2516 void cmov32( Condition cc, Register dst, Register src);
2286 2517
2339 void pushoop(jobject obj); 2570 void pushoop(jobject obj);
2340 2571
2341 // sign extend as need a l to ptr sized element 2572 // sign extend as need a l to ptr sized element
2342 void movl2ptr(Register dst, Address src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(movl(dst, src)); } 2573 void movl2ptr(Register dst, Address src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(movl(dst, src)); }
2343 void movl2ptr(Register dst, Register src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(if (dst != src) movl(dst, src)); } 2574 void movl2ptr(Register dst, Register src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(if (dst != src) movl(dst, src)); }
2575
2576 // C2 compiled method's prolog code.
2577 void verified_entry(int framesize, bool stack_bang, bool fp_mode_24b);
2344 2578
2345 // IndexOf strings. 2579 // IndexOf strings.
2346 // Small strings are loaded through stack if they cross page boundary. 2580 // Small strings are loaded through stack if they cross page boundary.
2347 void string_indexof(Register str1, Register str2, 2581 void string_indexof(Register str1, Register str2,
2348 Register cnt1, Register cnt2, 2582 Register cnt1, Register cnt2,