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comparison src/cpu/x86/vm/vm_version_x86.cpp @ 4970:33df1aeaebbf

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Merge with http://hg.openjdk.java.net/hsx/hsx24/hotspot/
author Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
date Mon, 27 Feb 2012 13:10:13 +0100
parents 04b9a2566eec 0368109684cb
children 957c266d8bc5
comparison
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4703:2cfb7fb2dce7 4970:33df1aeaebbf
1 /* 1 /*
2 * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. 2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 * 4 *
5 * This code is free software; you can redistribute it and/or modify it 5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as 6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation. 7 * published by the Free Software Foundation.
48 int VM_Version::_cpuFeatures; 48 int VM_Version::_cpuFeatures;
49 const char* VM_Version::_features_str = ""; 49 const char* VM_Version::_features_str = "";
50 VM_Version::CpuidInfo VM_Version::_cpuid_info = { 0, }; 50 VM_Version::CpuidInfo VM_Version::_cpuid_info = { 0, };
51 51
52 static BufferBlob* stub_blob; 52 static BufferBlob* stub_blob;
53 static const int stub_size = 400; 53 static const int stub_size = 550;
54 54
55 extern "C" { 55 extern "C" {
56 typedef void (*getPsrInfo_stub_t)(void*); 56 typedef void (*getPsrInfo_stub_t)(void*);
57 } 57 }
58 static getPsrInfo_stub_t getPsrInfo_stub = NULL; 58 static getPsrInfo_stub_t getPsrInfo_stub = NULL;
63 63
64 VM_Version_StubGenerator(CodeBuffer *c) : StubCodeGenerator(c) {} 64 VM_Version_StubGenerator(CodeBuffer *c) : StubCodeGenerator(c) {}
65 65
66 address generate_getPsrInfo() { 66 address generate_getPsrInfo() {
67 // Flags to test CPU type. 67 // Flags to test CPU type.
68 const uint32_t EFL_AC = 0x40000; 68 const uint32_t HS_EFL_AC = 0x40000;
69 const uint32_t EFL_ID = 0x200000; 69 const uint32_t HS_EFL_ID = 0x200000;
70 // Values for when we don't have a CPUID instruction. 70 // Values for when we don't have a CPUID instruction.
71 const int CPU_FAMILY_SHIFT = 8; 71 const int CPU_FAMILY_SHIFT = 8;
72 const uint32_t CPU_FAMILY_386 = (3 << CPU_FAMILY_SHIFT); 72 const uint32_t CPU_FAMILY_386 = (3 << CPU_FAMILY_SHIFT);
73 const uint32_t CPU_FAMILY_486 = (4 << CPU_FAMILY_SHIFT); 73 const uint32_t CPU_FAMILY_486 = (4 << CPU_FAMILY_SHIFT);
74 74
75 Label detect_486, cpu486, detect_586, std_cpuid1, std_cpuid4; 75 Label detect_486, cpu486, detect_586, std_cpuid1, std_cpuid4;
76 Label ext_cpuid1, ext_cpuid5, done; 76 Label sef_cpuid, ext_cpuid, ext_cpuid1, ext_cpuid5, ext_cpuid7, done;
77 77
78 StubCodeMark mark(this, "VM_Version", "getPsrInfo_stub"); 78 StubCodeMark mark(this, "VM_Version", "getPsrInfo_stub");
79 # define __ _masm-> 79 # define __ _masm->
80 80
81 address start = __ pc(); 81 address start = __ pc();
98 __ push(rax); 98 __ push(rax);
99 __ mov(rcx, rax); 99 __ mov(rcx, rax);
100 // 100 //
101 // if we are unable to change the AC flag, we have a 386 101 // if we are unable to change the AC flag, we have a 386
102 // 102 //
103 __ xorl(rax, EFL_AC); 103 __ xorl(rax, HS_EFL_AC);
104 __ push(rax); 104 __ push(rax);
105 __ popf(); 105 __ popf();
106 __ pushf(); 106 __ pushf();
107 __ pop(rax); 107 __ pop(rax);
108 __ cmpptr(rax, rcx); 108 __ cmpptr(rax, rcx);
116 // If we are unable to change the ID flag, we have a 486 which does 116 // If we are unable to change the ID flag, we have a 486 which does
117 // not support the "cpuid" instruction. 117 // not support the "cpuid" instruction.
118 // 118 //
119 __ bind(detect_486); 119 __ bind(detect_486);
120 __ mov(rax, rcx); 120 __ mov(rax, rcx);
121 __ xorl(rax, EFL_ID); 121 __ xorl(rax, HS_EFL_ID);
122 __ push(rax); 122 __ push(rax);
123 __ popf(); 123 __ popf();
124 __ pushf(); 124 __ pushf();
125 __ pop(rax); 125 __ pop(rax);
126 __ cmpptr(rcx, rax); 126 __ cmpptr(rcx, rax);
227 __ movl(Address(rsi, 0), rax); 227 __ movl(Address(rsi, 0), rax);
228 __ movl(Address(rsi, 4), rbx); 228 __ movl(Address(rsi, 4), rbx);
229 __ movl(Address(rsi, 8), rcx); 229 __ movl(Address(rsi, 8), rcx);
230 __ movl(Address(rsi,12), rdx); 230 __ movl(Address(rsi,12), rdx);
231 231
232 //
233 // Check if OS has enabled XGETBV instruction to access XCR0
234 // (OSXSAVE feature flag) and CPU supports AVX
235 //
236 __ andl(rcx, 0x18000000);
237 __ cmpl(rcx, 0x18000000);
238 __ jccb(Assembler::notEqual, sef_cpuid);
239
240 //
241 // XCR0, XFEATURE_ENABLED_MASK register
242 //
243 __ xorl(rcx, rcx); // zero for XCR0 register
244 __ xgetbv();
245 __ lea(rsi, Address(rbp, in_bytes(VM_Version::xem_xcr0_offset())));
246 __ movl(Address(rsi, 0), rax);
247 __ movl(Address(rsi, 4), rdx);
248
249 //
250 // cpuid(0x7) Structured Extended Features
251 //
252 __ bind(sef_cpuid);
253 __ movl(rax, 7);
254 __ cmpl(rax, Address(rbp, in_bytes(VM_Version::std_cpuid0_offset()))); // Is cpuid(0x7) supported?
255 __ jccb(Assembler::greater, ext_cpuid);
256
257 __ xorl(rcx, rcx);
258 __ cpuid();
259 __ lea(rsi, Address(rbp, in_bytes(VM_Version::sef_cpuid7_offset())));
260 __ movl(Address(rsi, 0), rax);
261 __ movl(Address(rsi, 4), rbx);
262
263 //
264 // Extended cpuid(0x80000000)
265 //
266 __ bind(ext_cpuid);
232 __ movl(rax, 0x80000000); 267 __ movl(rax, 0x80000000);
233 __ cpuid(); 268 __ cpuid();
234 __ cmpl(rax, 0x80000000); // Is cpuid(0x80000001) supported? 269 __ cmpl(rax, 0x80000000); // Is cpuid(0x80000001) supported?
235 __ jcc(Assembler::belowEqual, done); 270 __ jcc(Assembler::belowEqual, done);
236 __ cmpl(rax, 0x80000004); // Is cpuid(0x80000005) supported? 271 __ cmpl(rax, 0x80000004); // Is cpuid(0x80000005) supported?
237 __ jccb(Assembler::belowEqual, ext_cpuid1); 272 __ jccb(Assembler::belowEqual, ext_cpuid1);
273 __ cmpl(rax, 0x80000006); // Is cpuid(0x80000007) supported?
274 __ jccb(Assembler::belowEqual, ext_cpuid5);
238 __ cmpl(rax, 0x80000007); // Is cpuid(0x80000008) supported? 275 __ cmpl(rax, 0x80000007); // Is cpuid(0x80000008) supported?
239 __ jccb(Assembler::belowEqual, ext_cpuid5); 276 __ jccb(Assembler::belowEqual, ext_cpuid7);
240 // 277 //
241 // Extended cpuid(0x80000008) 278 // Extended cpuid(0x80000008)
242 // 279 //
243 __ movl(rax, 0x80000008); 280 __ movl(rax, 0x80000008);
244 __ cpuid(); 281 __ cpuid();
245 __ lea(rsi, Address(rbp, in_bytes(VM_Version::ext_cpuid8_offset()))); 282 __ lea(rsi, Address(rbp, in_bytes(VM_Version::ext_cpuid8_offset())));
283 __ movl(Address(rsi, 0), rax);
284 __ movl(Address(rsi, 4), rbx);
285 __ movl(Address(rsi, 8), rcx);
286 __ movl(Address(rsi,12), rdx);
287
288 //
289 // Extended cpuid(0x80000007)
290 //
291 __ bind(ext_cpuid7);
292 __ movl(rax, 0x80000007);
293 __ cpuid();
294 __ lea(rsi, Address(rbp, in_bytes(VM_Version::ext_cpuid7_offset())));
246 __ movl(Address(rsi, 0), rax); 295 __ movl(Address(rsi, 0), rax);
247 __ movl(Address(rsi, 4), rbx); 296 __ movl(Address(rsi, 4), rbx);
248 __ movl(Address(rsi, 8), rcx); 297 __ movl(Address(rsi, 8), rcx);
249 __ movl(Address(rsi,12), rdx); 298 __ movl(Address(rsi,12), rdx);
250 299
357 _cpuFeatures &= ~CPU_SSE2; 406 _cpuFeatures &= ~CPU_SSE2;
358 407
359 if (UseSSE < 1) 408 if (UseSSE < 1)
360 _cpuFeatures &= ~CPU_SSE; 409 _cpuFeatures &= ~CPU_SSE;
361 410
411 if (UseAVX < 2)
412 _cpuFeatures &= ~CPU_AVX2;
413
414 if (UseAVX < 1)
415 _cpuFeatures &= ~CPU_AVX;
416
362 if (logical_processors_per_package() == 1) { 417 if (logical_processors_per_package() == 1) {
363 // HT processor could be installed on a system which doesn't support HT. 418 // HT processor could be installed on a system which doesn't support HT.
364 _cpuFeatures &= ~CPU_HT; 419 _cpuFeatures &= ~CPU_HT;
365 } 420 }
366 421
367 char buf[256]; 422 char buf[256];
368 jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", 423 jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
369 cores_per_cpu(), threads_per_core(), 424 cores_per_cpu(), threads_per_core(),
370 cpu_family(), _model, _stepping, 425 cpu_family(), _model, _stepping,
371 (supports_cmov() ? ", cmov" : ""), 426 (supports_cmov() ? ", cmov" : ""),
372 (supports_cmpxchg8() ? ", cx8" : ""), 427 (supports_cmpxchg8() ? ", cx8" : ""),
373 (supports_fxsr() ? ", fxsr" : ""), 428 (supports_fxsr() ? ", fxsr" : ""),
377 (supports_sse3() ? ", sse3" : ""), 432 (supports_sse3() ? ", sse3" : ""),
378 (supports_ssse3()? ", ssse3": ""), 433 (supports_ssse3()? ", ssse3": ""),
379 (supports_sse4_1() ? ", sse4.1" : ""), 434 (supports_sse4_1() ? ", sse4.1" : ""),
380 (supports_sse4_2() ? ", sse4.2" : ""), 435 (supports_sse4_2() ? ", sse4.2" : ""),
381 (supports_popcnt() ? ", popcnt" : ""), 436 (supports_popcnt() ? ", popcnt" : ""),
437 (supports_avx() ? ", avx" : ""),
438 (supports_avx2() ? ", avx2" : ""),
382 (supports_mmx_ext() ? ", mmxext" : ""), 439 (supports_mmx_ext() ? ", mmxext" : ""),
383 (supports_3dnow_prefetch() ? ", 3dnowpref" : ""), 440 (supports_3dnow_prefetch() ? ", 3dnowpref" : ""),
384 (supports_lzcnt() ? ", lzcnt": ""), 441 (supports_lzcnt() ? ", lzcnt": ""),
385 (supports_sse4a() ? ", sse4a": ""), 442 (supports_sse4a() ? ", sse4a": ""),
386 (supports_ht() ? ", ht": "")); 443 (supports_ht() ? ", ht": ""),
444 (supports_tsc() ? ", tsc": ""),
445 (supports_tscinv_bit() ? ", tscinvbit": ""),
446 (supports_tscinv() ? ", tscinv": ""));
387 _features_str = strdup(buf); 447 _features_str = strdup(buf);
388 448
389 // UseSSE is set to the smaller of what hardware supports and what 449 // UseSSE is set to the smaller of what hardware supports and what
390 // the command line requires. I.e., you cannot set UseSSE to 2 on 450 // the command line requires. I.e., you cannot set UseSSE to 2 on
391 // older Pentiums which do not support it. 451 // older Pentiums which do not support it.
392 if( UseSSE > 4 ) UseSSE=4; 452 if (UseSSE > 4) UseSSE=4;
393 if( UseSSE < 0 ) UseSSE=0; 453 if (UseSSE < 0) UseSSE=0;
394 if( !supports_sse4_1() ) // Drop to 3 if no SSE4 support 454 if (!supports_sse4_1()) // Drop to 3 if no SSE4 support
395 UseSSE = MIN2((intx)3,UseSSE); 455 UseSSE = MIN2((intx)3,UseSSE);
396 if( !supports_sse3() ) // Drop to 2 if no SSE3 support 456 if (!supports_sse3()) // Drop to 2 if no SSE3 support
397 UseSSE = MIN2((intx)2,UseSSE); 457 UseSSE = MIN2((intx)2,UseSSE);
398 if( !supports_sse2() ) // Drop to 1 if no SSE2 support 458 if (!supports_sse2()) // Drop to 1 if no SSE2 support
399 UseSSE = MIN2((intx)1,UseSSE); 459 UseSSE = MIN2((intx)1,UseSSE);
400 if( !supports_sse () ) // Drop to 0 if no SSE support 460 if (!supports_sse ()) // Drop to 0 if no SSE support
401 UseSSE = 0; 461 UseSSE = 0;
462
463 if (UseAVX > 2) UseAVX=2;
464 if (UseAVX < 0) UseAVX=0;
465 if (!supports_avx2()) // Drop to 1 if no AVX2 support
466 UseAVX = MIN2((intx)1,UseAVX);
467 if (!supports_avx ()) // Drop to 0 if no AVX support
468 UseAVX = 0;
402 469
403 // On new cpus instructions which update whole XMM register should be used 470 // On new cpus instructions which update whole XMM register should be used
404 // to prevent partial register stall due to dependencies on high half. 471 // to prevent partial register stall due to dependencies on high half.
405 // 472 //
406 // UseXmmLoadAndClearUpper == true --> movsd(xmm, mem) 473 // UseXmmLoadAndClearUpper == true --> movsd(xmm, mem)
532 // Use population count instruction if available. 599 // Use population count instruction if available.
533 if (supports_popcnt()) { 600 if (supports_popcnt()) {
534 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) { 601 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
535 UsePopCountInstruction = true; 602 UsePopCountInstruction = true;
536 } 603 }
604 } else if (UsePopCountInstruction) {
605 warning("POPCNT instruction is not available on this CPU");
606 FLAG_SET_DEFAULT(UsePopCountInstruction, false);
537 } 607 }
538 608
539 #ifdef COMPILER2 609 #ifdef COMPILER2
540 if (UseFPUForSpilling) { 610 if (UseFPUForSpilling) {
541 if (UseSSE < 2) { 611 if (UseSSE < 2) {
603 673
604 #ifndef PRODUCT 674 #ifndef PRODUCT
605 if (PrintMiscellaneous && Verbose) { 675 if (PrintMiscellaneous && Verbose) {
606 tty->print_cr("Logical CPUs per core: %u", 676 tty->print_cr("Logical CPUs per core: %u",
607 logical_processors_per_package()); 677 logical_processors_per_package());
608 tty->print_cr("UseSSE=%d",UseSSE); 678 tty->print("UseSSE=%d",UseSSE);
679 if (UseAVX > 0) {
680 tty->print(" UseAVX=%d",UseAVX);
681 }
682 tty->cr();
609 tty->print("Allocation"); 683 tty->print("Allocation");
610 if (AllocatePrefetchStyle <= 0 || UseSSE == 0 && !supports_3dnow_prefetch()) { 684 if (AllocatePrefetchStyle <= 0 || UseSSE == 0 && !supports_3dnow_prefetch()) {
611 tty->print_cr(": no prefetching"); 685 tty->print_cr(": no prefetching");
612 } else { 686 } else {
613 tty->print(" prefetching: "); 687 tty->print(" prefetching: ");