Mercurial > hg > truffle
comparison src/cpu/x86/vm/x86_64.ad @ 1575:3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
Summary: Hoist DecodeN instruction above null check
Reviewed-by: never, twisti
author | kvn |
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date | Wed, 02 Jun 2010 09:49:32 -0700 |
parents | 2d127394260e |
children | e9ff18c4ace7 |
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1574:1eb493f33423 | 1575:3657cb01ffc5 |
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2035 // Should the Matcher clone shifts on addressing modes, expecting them | 2035 // Should the Matcher clone shifts on addressing modes, expecting them |
2036 // to be subsumed into complex addressing expressions or compute them | 2036 // to be subsumed into complex addressing expressions or compute them |
2037 // into registers? True for Intel but false for most RISCs | 2037 // into registers? True for Intel but false for most RISCs |
2038 const bool Matcher::clone_shift_expressions = true; | 2038 const bool Matcher::clone_shift_expressions = true; |
2039 | 2039 |
2040 bool Matcher::narrow_oop_use_complex_address() { | |
2041 assert(UseCompressedOops, "only for compressed oops code"); | |
2042 return (LogMinObjAlignmentInBytes <= 3); | |
2043 } | |
2044 | |
2040 // Is it better to copy float constants, or load them directly from | 2045 // Is it better to copy float constants, or load them directly from |
2041 // memory? Intel can load a float constant from a direct address, | 2046 // memory? Intel can load a float constant from a direct address, |
2042 // requiring no extra registers. Most RISCs will have to materialize | 2047 // requiring no extra registers. Most RISCs will have to materialize |
2043 // an address into a register first, so they would do better to copy | 2048 // an address into a register first, so they would do better to copy |
2044 // the constant from stack. | 2049 // the constant from stack. |