Mercurial > hg > truffle
comparison src/cpu/x86/vm/x86_64.ad @ 558:3b5ac9e7e6ea
6796746: rename LoadC (char) opcode class to LoadUS (unsigned short)
Summary: Renaming LoadC to LoadUS would round up the planned introduction of LoadUB and LoadUI.
Reviewed-by: phh, kvn
author | twisti |
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date | Mon, 26 Jan 2009 16:22:12 +0100 |
parents | a1980da045cc |
children | 2cacccded90f |
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557:465813e0303a | 558:3b5ac9e7e6ea |
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6094 // opcode(0x0F, 0xBF); | 6094 // opcode(0x0F, 0xBF); |
6095 // ins_encode(REX_reg_mem_wide(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); | 6095 // ins_encode(REX_reg_mem_wide(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); |
6096 // ins_pipe(ialu_reg_mem); | 6096 // ins_pipe(ialu_reg_mem); |
6097 // %} | 6097 // %} |
6098 | 6098 |
6099 // Load Char (16 bit UNsigned) | 6099 // Load Unsigned Short/Char (16 bit UNsigned) |
6100 instruct loadC(rRegI dst, memory mem) | 6100 instruct loadUS(rRegI dst, memory mem) |
6101 %{ | 6101 %{ |
6102 match(Set dst (LoadC mem)); | 6102 match(Set dst (LoadUS mem)); |
6103 | 6103 |
6104 ins_cost(125); | 6104 ins_cost(125); |
6105 format %{ "movzwl $dst, $mem\t# char" %} | 6105 format %{ "movzwl $dst, $mem\t# ushort/char" %} |
6106 opcode(0x0F, 0xB7); | 6106 opcode(0x0F, 0xB7); |
6107 ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); | 6107 ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); |
6108 ins_pipe(ialu_reg_mem); | 6108 ins_pipe(ialu_reg_mem); |
6109 %} | 6109 %} |
6110 | 6110 |
6111 // Load Char (16 bit UNsigned) into long | 6111 // Load Unsigned Short/Char (16 bit UNsigned) into long |
6112 // instruct loadC2L(rRegL dst, memory mem) | 6112 // instruct loadUS2L(rRegL dst, memory mem) |
6113 // %{ | 6113 // %{ |
6114 // match(Set dst (ConvI2L (LoadC mem))); | 6114 // match(Set dst (ConvI2L (LoadUS mem))); |
6115 | 6115 |
6116 // ins_cost(125); | 6116 // ins_cost(125); |
6117 // format %{ "movzwl $dst, $mem\t# char -> long" %} | 6117 // format %{ "movzwl $dst, $mem\t# ushort/char -> long" %} |
6118 // opcode(0x0F, 0xB7); | 6118 // opcode(0x0F, 0xB7); |
6119 // ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); | 6119 // ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); |
6120 // ins_pipe(ialu_reg_mem); | 6120 // ins_pipe(ialu_reg_mem); |
6121 // %} | 6121 // %} |
6122 | 6122 |