Mercurial > hg > truffle
comparison src/cpu/x86/vm/vm_version_x86.hpp @ 4933:4a24c4f648bd
7142113: Add Ivy Bridge to the known Intel x86 cpu families
Summary: In vm_version_x86.hpp, add and use CPU_MODEL_IVYBRIDGE_EP, and restrict is_intel_tsc_synced_at_init() to EP models.
Reviewed-by: kvn, acorn
author | phh |
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date | Thu, 16 Feb 2012 13:50:54 -0500 |
parents | 22cee0ee8927 |
children | 33df1aeaebbf b9a9ed0f8eeb |
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4932:f1cb6f9cfe21 | 4933:4a24c4f648bd |
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247 CPU_AVX2 = (1 << 18) | 247 CPU_AVX2 = (1 << 18) |
248 } cpuFeatureFlags; | 248 } cpuFeatureFlags; |
249 | 249 |
250 enum { | 250 enum { |
251 // AMD | 251 // AMD |
252 CPU_FAMILY_AMD_11H = 17, | 252 CPU_FAMILY_AMD_11H = 0x11, |
253 // Intel | 253 // Intel |
254 CPU_FAMILY_INTEL_CORE = 6, | 254 CPU_FAMILY_INTEL_CORE = 6, |
255 CPU_MODEL_NEHALEM_EP = 26, | 255 CPU_MODEL_NEHALEM = 0x1e, |
256 CPU_MODEL_WESTMERE_EP = 44, | 256 CPU_MODEL_NEHALEM_EP = 0x1a, |
257 // CPU_MODEL_IVYBRIDGE_EP = ??, TODO - get real value | 257 CPU_MODEL_NEHALEM_EX = 0x2e, |
258 CPU_MODEL_SANDYBRIDGE_EP = 45 | 258 CPU_MODEL_WESTMERE = 0x25, |
259 CPU_MODEL_WESTMERE_EP = 0x2c, | |
260 CPU_MODEL_WESTMERE_EX = 0x2f, | |
261 CPU_MODEL_SANDYBRIDGE = 0x2a, | |
262 CPU_MODEL_SANDYBRIDGE_EP = 0x2d, | |
263 CPU_MODEL_IVYBRIDGE_EP = 0x3a | |
259 } cpuExtendedFamily; | 264 } cpuExtendedFamily; |
260 | 265 |
261 // cpuid information block. All info derived from executing cpuid with | 266 // cpuid information block. All info derived from executing cpuid with |
262 // various function numbers is stored here. Intel and AMD info is | 267 // various function numbers is stored here. Intel and AMD info is |
263 // merged in this block: accessor methods disentangle it. | 268 // merged in this block: accessor methods disentangle it. |
323 // cpuid functions 0x80000002 thru 0x80000004: example, unused | 328 // cpuid functions 0x80000002 thru 0x80000004: example, unused |
324 uint32_t proc_name_0, proc_name_1, proc_name_2, proc_name_3; | 329 uint32_t proc_name_0, proc_name_1, proc_name_2, proc_name_3; |
325 uint32_t proc_name_4, proc_name_5, proc_name_6, proc_name_7; | 330 uint32_t proc_name_4, proc_name_5, proc_name_6, proc_name_7; |
326 uint32_t proc_name_8, proc_name_9, proc_name_10,proc_name_11; | 331 uint32_t proc_name_8, proc_name_9, proc_name_10,proc_name_11; |
327 | 332 |
328 // cpuid function 0x80000005 //AMD L1, Intel reserved | 333 // cpuid function 0x80000005 // AMD L1, Intel reserved |
329 uint32_t ext_cpuid5_eax; // unused currently | 334 uint32_t ext_cpuid5_eax; // unused currently |
330 uint32_t ext_cpuid5_ebx; // reserved | 335 uint32_t ext_cpuid5_ebx; // reserved |
331 ExtCpuid5Ex ext_cpuid5_ecx; // L1 data cache info (AMD) | 336 ExtCpuid5Ex ext_cpuid5_ecx; // L1 data cache info (AMD) |
332 ExtCpuid5Ex ext_cpuid5_edx; // L1 instruction cache info (AMD) | 337 ExtCpuid5Ex ext_cpuid5_edx; // L1 instruction cache info (AMD) |
333 | 338 |
545 extended_cpu_family() == CPU_FAMILY_INTEL_CORE; } | 550 extended_cpu_family() == CPU_FAMILY_INTEL_CORE; } |
546 | 551 |
547 static bool is_intel_tsc_synched_at_init() { | 552 static bool is_intel_tsc_synched_at_init() { |
548 if (is_intel_family_core()) { | 553 if (is_intel_family_core()) { |
549 uint32_t ext_model = extended_cpu_model(); | 554 uint32_t ext_model = extended_cpu_model(); |
550 if (ext_model == CPU_MODEL_NEHALEM_EP || | 555 if (ext_model == CPU_MODEL_NEHALEM_EP || |
551 ext_model == CPU_MODEL_WESTMERE_EP || | 556 ext_model == CPU_MODEL_WESTMERE_EP || |
552 // TODO ext_model == CPU_MODEL_IVYBRIDGE_EP || | 557 ext_model == CPU_MODEL_SANDYBRIDGE_EP || |
553 ext_model == CPU_MODEL_SANDYBRIDGE_EP) { | 558 ext_model == CPU_MODEL_IVYBRIDGE_EP) { |
554 // 2-socket invtsc support. EX versions with 4 sockets are not | 559 // <= 2-socket invariant tsc support. EX versions are usually used |
555 // guaranteed to synchronize tscs at initialization via a double | 560 // in > 2-socket systems and likely don't synchronize tscs at |
556 // handshake. The tscs can be explicitly set in software. Code | 561 // initialization. |
557 // that uses tsc values must be prepared for them to arbitrarily | 562 // Code that uses tsc values must be prepared for them to arbitrarily |
558 // jump backward or forward. | 563 // jump forward or backward. |
559 return true; | 564 return true; |
560 } | 565 } |
561 } | 566 } |
562 return false; | 567 return false; |
563 } | 568 } |