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6754519: don't emit flag fixup for NaN when condition being tested doesn't need it Reviewed-by: kvn, rasbold
author never
date Tue, 28 Oct 2008 09:31:30 -0700
parents 9c2ecc2ffb12
children a1980da045cc
comparison
equal deleted inserted replaced
407:ebfd4ae89bf6 415:4d9884b01ba6
1741 1741
1742 // Is this branch offset short enough that a short branch can be used? 1742 // Is this branch offset short enough that a short branch can be used?
1743 // 1743 //
1744 // NOTE: If the platform does not provide any short branch variants, then 1744 // NOTE: If the platform does not provide any short branch variants, then
1745 // this method should return false for offset 0. 1745 // this method should return false for offset 0.
1746 bool Matcher::is_short_branch_offset(int offset) { 1746 bool Matcher::is_short_branch_offset(int rule, int offset) {
1747 return false; 1747 return false;
1748 } 1748 }
1749 1749
1750 const bool Matcher::isSimpleConstant64(jlong value) { 1750 const bool Matcher::isSimpleConstant64(jlong value) {
1751 // Will one (StoreL ConL) be cheaper than two (StoreI ConI)?. 1751 // Will one (StoreL ConL) be cheaper than two (StoreI ConI)?.
1924 enc_class form3_mem_reg( memory mem, iRegI dst ) %{ 1924 enc_class form3_mem_reg( memory mem, iRegI dst ) %{
1925 emit_form3_mem_reg(cbuf, this, $primary, $tertiary, 1925 emit_form3_mem_reg(cbuf, this, $primary, $tertiary,
1926 $mem$$base, $mem$$disp, $mem$$index, $dst$$reg); 1926 $mem$$base, $mem$$disp, $mem$$index, $dst$$reg);
1927 %} 1927 %}
1928 1928
1929 enc_class simple_form3_mem_reg( memory mem, iRegI dst ) %{
1930 emit_form3_mem_reg(cbuf, this, $primary, -1,
1931 $mem$$base, $mem$$disp, $mem$$index, $dst$$reg);
1932 %}
1933
1929 enc_class form3_mem_reg_little( memory mem, iRegI dst) %{ 1934 enc_class form3_mem_reg_little( memory mem, iRegI dst) %{
1930 emit_form3_mem_reg_asi(cbuf, this, $primary, $tertiary, 1935 emit_form3_mem_reg_asi(cbuf, this, $primary, -1,
1931 $mem$$base, $mem$$disp, $mem$$index, $dst$$reg, Assembler::ASI_PRIMARY_LITTLE); 1936 $mem$$base, $mem$$disp, $mem$$index, $dst$$reg, Assembler::ASI_PRIMARY_LITTLE);
1932 %} 1937 %}
1933 1938
1934 enc_class form3_mem_prefetch_read( memory mem ) %{ 1939 enc_class form3_mem_prefetch_read( memory mem ) %{
1935 emit_form3_mem_reg(cbuf, this, $primary, $tertiary, 1940 emit_form3_mem_reg(cbuf, this, $primary, -1,
1936 $mem$$base, $mem$$disp, $mem$$index, 0/*prefetch function many-reads*/); 1941 $mem$$base, $mem$$disp, $mem$$index, 0/*prefetch function many-reads*/);
1937 %} 1942 %}
1938 1943
1939 enc_class form3_mem_prefetch_write( memory mem ) %{ 1944 enc_class form3_mem_prefetch_write( memory mem ) %{
1940 emit_form3_mem_reg(cbuf, this, $primary, $tertiary, 1945 emit_form3_mem_reg(cbuf, this, $primary, -1,
1941 $mem$$base, $mem$$disp, $mem$$index, 2/*prefetch function many-writes*/); 1946 $mem$$base, $mem$$disp, $mem$$index, 2/*prefetch function many-writes*/);
1942 %} 1947 %}
1943 1948
1944 enc_class form3_mem_reg_long_unaligned_marshal( memory mem, iRegL reg ) %{ 1949 enc_class form3_mem_reg_long_unaligned_marshal( memory mem, iRegL reg ) %{
1945 assert( Assembler::is_simm13($mem$$disp ), "need disp and disp+4" ); 1950 assert( Assembler::is_simm13($mem$$disp ), "need disp and disp+4" );
1946 assert( Assembler::is_simm13($mem$$disp+4), "need disp and disp+4" ); 1951 assert( Assembler::is_simm13($mem$$disp+4), "need disp and disp+4" );
1947 guarantee($mem$$index == R_G0_enc, "double index?"); 1952 guarantee($mem$$index == R_G0_enc, "double index?");
1948 emit_form3_mem_reg(cbuf, this, $primary, $tertiary, $mem$$base, $mem$$disp+4, R_G0_enc, R_O7_enc ); 1953 emit_form3_mem_reg(cbuf, this, $primary, -1, $mem$$base, $mem$$disp+4, R_G0_enc, R_O7_enc );
1949 emit_form3_mem_reg(cbuf, this, $primary, $tertiary, $mem$$base, $mem$$disp, R_G0_enc, $reg$$reg ); 1954 emit_form3_mem_reg(cbuf, this, $primary, -1, $mem$$base, $mem$$disp, R_G0_enc, $reg$$reg );
1950 emit3_simm13( cbuf, Assembler::arith_op, $reg$$reg, Assembler::sllx_op3, $reg$$reg, 0x1020 ); 1955 emit3_simm13( cbuf, Assembler::arith_op, $reg$$reg, Assembler::sllx_op3, $reg$$reg, 0x1020 );
1951 emit3( cbuf, Assembler::arith_op, $reg$$reg, Assembler::or_op3, $reg$$reg, 0, R_O7_enc ); 1956 emit3( cbuf, Assembler::arith_op, $reg$$reg, Assembler::or_op3, $reg$$reg, 0, R_O7_enc );
1952 %} 1957 %}
1953 1958
1954 enc_class form3_mem_reg_double_unaligned( memory mem, RegD_low reg ) %{ 1959 enc_class form3_mem_reg_double_unaligned( memory mem, RegD_low reg ) %{
1955 assert( Assembler::is_simm13($mem$$disp ), "need disp and disp+4" ); 1960 assert( Assembler::is_simm13($mem$$disp ), "need disp and disp+4" );
1956 assert( Assembler::is_simm13($mem$$disp+4), "need disp and disp+4" ); 1961 assert( Assembler::is_simm13($mem$$disp+4), "need disp and disp+4" );
1957 guarantee($mem$$index == R_G0_enc, "double index?"); 1962 guarantee($mem$$index == R_G0_enc, "double index?");
1958 // Load long with 2 instructions 1963 // Load long with 2 instructions
1959 emit_form3_mem_reg(cbuf, this, $primary, $tertiary, $mem$$base, $mem$$disp, R_G0_enc, $reg$$reg+0 ); 1964 emit_form3_mem_reg(cbuf, this, $primary, -1, $mem$$base, $mem$$disp, R_G0_enc, $reg$$reg+0 );
1960 emit_form3_mem_reg(cbuf, this, $primary, $tertiary, $mem$$base, $mem$$disp+4, R_G0_enc, $reg$$reg+1 ); 1965 emit_form3_mem_reg(cbuf, this, $primary, -1, $mem$$base, $mem$$disp+4, R_G0_enc, $reg$$reg+1 );
1961 %} 1966 %}
1962 1967
1963 //%%% form3_mem_plus_4_reg is a hack--get rid of it 1968 //%%% form3_mem_plus_4_reg is a hack--get rid of it
1964 enc_class form3_mem_plus_4_reg( memory mem, iRegI dst ) %{ 1969 enc_class form3_mem_plus_4_reg( memory mem, iRegI dst ) %{
1965 guarantee($mem$$disp, "cannot offset a reg-reg operand by 4"); 1970 guarantee($mem$$disp, "cannot offset a reg-reg operand by 4");
1966 emit_form3_mem_reg(cbuf, this, $primary, $tertiary, $mem$$base, $mem$$disp + 4, $mem$$index, $dst$$reg); 1971 emit_form3_mem_reg(cbuf, this, $primary, -1, $mem$$base, $mem$$disp + 4, $mem$$index, $dst$$reg);
1967 %} 1972 %}
1968 1973
1969 enc_class form3_g0_rs2_rd_move( iRegI rs2, iRegI rd ) %{ 1974 enc_class form3_g0_rs2_rd_move( iRegI rs2, iRegI rd ) %{
1970 // Encode a reg-reg copy. If it is useless, then empty encoding. 1975 // Encode a reg-reg copy. If it is useless, then empty encoding.
1971 if( $rs2$$reg != $rd$$reg ) 1976 if( $rs2$$reg != $rd$$reg )
5060 effect(DEF dst, USE src); 5065 effect(DEF dst, USE src);
5061 ins_cost(MEMORY_REF_COST); 5066 ins_cost(MEMORY_REF_COST);
5062 size(4); 5067 size(4);
5063 format %{ "LDF $src,$dst\t! stkI to regF" %} 5068 format %{ "LDF $src,$dst\t! stkI to regF" %}
5064 opcode(Assembler::ldf_op3); 5069 opcode(Assembler::ldf_op3);
5065 ins_encode(form3_mem_reg(src, dst)); 5070 ins_encode(simple_form3_mem_reg(src, dst));
5066 ins_pipe(floadF_stk); 5071 ins_pipe(floadF_stk);
5067 %} 5072 %}
5068 5073
5069 instruct stkL_to_regD(regD dst, stackSlotL src) %{ 5074 instruct stkL_to_regD(regD dst, stackSlotL src) %{
5070 // No match rule to avoid chain rule match. 5075 // No match rule to avoid chain rule match.
5071 effect(DEF dst, USE src); 5076 effect(DEF dst, USE src);
5072 ins_cost(MEMORY_REF_COST); 5077 ins_cost(MEMORY_REF_COST);
5073 size(4); 5078 size(4);
5074 format %{ "LDDF $src,$dst\t! stkL to regD" %} 5079 format %{ "LDDF $src,$dst\t! stkL to regD" %}
5075 opcode(Assembler::lddf_op3); 5080 opcode(Assembler::lddf_op3);
5076 ins_encode(form3_mem_reg(src, dst)); 5081 ins_encode(simple_form3_mem_reg(src, dst));
5077 ins_pipe(floadD_stk); 5082 ins_pipe(floadD_stk);
5078 %} 5083 %}
5079 5084
5080 instruct regF_to_stkI(stackSlotI dst, regF src) %{ 5085 instruct regF_to_stkI(stackSlotI dst, regF src) %{
5081 // No match rule to avoid chain rule match. 5086 // No match rule to avoid chain rule match.
5082 effect(DEF dst, USE src); 5087 effect(DEF dst, USE src);
5083 ins_cost(MEMORY_REF_COST); 5088 ins_cost(MEMORY_REF_COST);
5084 size(4); 5089 size(4);
5085 format %{ "STF $src,$dst\t! regF to stkI" %} 5090 format %{ "STF $src,$dst\t! regF to stkI" %}
5086 opcode(Assembler::stf_op3); 5091 opcode(Assembler::stf_op3);
5087 ins_encode(form3_mem_reg(dst, src)); 5092 ins_encode(simple_form3_mem_reg(dst, src));
5088 ins_pipe(fstoreF_stk_reg); 5093 ins_pipe(fstoreF_stk_reg);
5089 %} 5094 %}
5090 5095
5091 instruct regD_to_stkL(stackSlotL dst, regD src) %{ 5096 instruct regD_to_stkL(stackSlotL dst, regD src) %{
5092 // No match rule to avoid chain rule match. 5097 // No match rule to avoid chain rule match.
5093 effect(DEF dst, USE src); 5098 effect(DEF dst, USE src);
5094 ins_cost(MEMORY_REF_COST); 5099 ins_cost(MEMORY_REF_COST);
5095 size(4); 5100 size(4);
5096 format %{ "STDF $src,$dst\t! regD to stkL" %} 5101 format %{ "STDF $src,$dst\t! regD to stkL" %}
5097 opcode(Assembler::stdf_op3); 5102 opcode(Assembler::stdf_op3);
5098 ins_encode(form3_mem_reg(dst, src)); 5103 ins_encode(simple_form3_mem_reg(dst, src));
5099 ins_pipe(fstoreD_stk_reg); 5104 ins_pipe(fstoreD_stk_reg);
5100 %} 5105 %}
5101 5106
5102 instruct regI_to_stkLHi(stackSlotL dst, iRegI src) %{ 5107 instruct regI_to_stkLHi(stackSlotL dst, iRegI src) %{
5103 effect(DEF dst, USE src); 5108 effect(DEF dst, USE src);
5104 ins_cost(MEMORY_REF_COST*2); 5109 ins_cost(MEMORY_REF_COST*2);
5105 size(8); 5110 size(8);
5106 format %{ "STW $src,$dst.hi\t! long\n\t" 5111 format %{ "STW $src,$dst.hi\t! long\n\t"
5107 "STW R_G0,$dst.lo" %} 5112 "STW R_G0,$dst.lo" %}
5108 opcode(Assembler::stw_op3); 5113 opcode(Assembler::stw_op3);
5109 ins_encode(form3_mem_reg(dst, src), form3_mem_plus_4_reg(dst, R_G0)); 5114 ins_encode(simple_form3_mem_reg(dst, src), form3_mem_plus_4_reg(dst, R_G0));
5110 ins_pipe(lstoreI_stk_reg); 5115 ins_pipe(lstoreI_stk_reg);
5111 %} 5116 %}
5112 5117
5113 instruct regL_to_stkD(stackSlotD dst, iRegL src) %{ 5118 instruct regL_to_stkD(stackSlotD dst, iRegL src) %{
5114 // No match rule to avoid chain rule match. 5119 // No match rule to avoid chain rule match.
5115 effect(DEF dst, USE src); 5120 effect(DEF dst, USE src);
5116 ins_cost(MEMORY_REF_COST); 5121 ins_cost(MEMORY_REF_COST);
5117 size(4); 5122 size(4);
5118 format %{ "STX $src,$dst\t! regL to stkD" %} 5123 format %{ "STX $src,$dst\t! regL to stkD" %}
5119 opcode(Assembler::stx_op3); 5124 opcode(Assembler::stx_op3);
5120 ins_encode( form3_mem_reg( dst, src ) ); 5125 ins_encode(simple_form3_mem_reg( dst, src ) );
5121 ins_pipe(istore_stk_reg); 5126 ins_pipe(istore_stk_reg);
5122 %} 5127 %}
5123 5128
5124 //---------- Chain stack slots between similar types -------- 5129 //---------- Chain stack slots between similar types --------
5125 5130
5129 ins_cost(MEMORY_REF_COST); 5134 ins_cost(MEMORY_REF_COST);
5130 5135
5131 size(4); 5136 size(4);
5132 format %{ "LDUW $src,$dst\t!stk" %} 5137 format %{ "LDUW $src,$dst\t!stk" %}
5133 opcode(Assembler::lduw_op3); 5138 opcode(Assembler::lduw_op3);
5134 ins_encode( form3_mem_reg( src, dst ) ); 5139 ins_encode(simple_form3_mem_reg( src, dst ) );
5135 ins_pipe(iload_mem); 5140 ins_pipe(iload_mem);
5136 %} 5141 %}
5137 5142
5138 // Store integer to stack slot 5143 // Store integer to stack slot
5139 instruct regI_to_stkI( stackSlotI dst, iRegI src ) %{ 5144 instruct regI_to_stkI( stackSlotI dst, iRegI src ) %{
5141 ins_cost(MEMORY_REF_COST); 5146 ins_cost(MEMORY_REF_COST);
5142 5147
5143 size(4); 5148 size(4);
5144 format %{ "STW $src,$dst\t!stk" %} 5149 format %{ "STW $src,$dst\t!stk" %}
5145 opcode(Assembler::stw_op3); 5150 opcode(Assembler::stw_op3);
5146 ins_encode( form3_mem_reg( dst, src ) ); 5151 ins_encode(simple_form3_mem_reg( dst, src ) );
5147 ins_pipe(istore_mem_reg); 5152 ins_pipe(istore_mem_reg);
5148 %} 5153 %}
5149 5154
5150 // Load long from stack slot 5155 // Load long from stack slot
5151 instruct stkL_to_regL( iRegL dst, stackSlotL src ) %{ 5156 instruct stkL_to_regL( iRegL dst, stackSlotL src ) %{
5153 5158
5154 ins_cost(MEMORY_REF_COST); 5159 ins_cost(MEMORY_REF_COST);
5155 size(4); 5160 size(4);
5156 format %{ "LDX $src,$dst\t! long" %} 5161 format %{ "LDX $src,$dst\t! long" %}
5157 opcode(Assembler::ldx_op3); 5162 opcode(Assembler::ldx_op3);
5158 ins_encode( form3_mem_reg( src, dst ) ); 5163 ins_encode(simple_form3_mem_reg( src, dst ) );
5159 ins_pipe(iload_mem); 5164 ins_pipe(iload_mem);
5160 %} 5165 %}
5161 5166
5162 // Store long to stack slot 5167 // Store long to stack slot
5163 instruct regL_to_stkL(stackSlotL dst, iRegL src) %{ 5168 instruct regL_to_stkL(stackSlotL dst, iRegL src) %{
5165 5170
5166 ins_cost(MEMORY_REF_COST); 5171 ins_cost(MEMORY_REF_COST);
5167 size(4); 5172 size(4);
5168 format %{ "STX $src,$dst\t! long" %} 5173 format %{ "STX $src,$dst\t! long" %}
5169 opcode(Assembler::stx_op3); 5174 opcode(Assembler::stx_op3);
5170 ins_encode( form3_mem_reg( dst, src ) ); 5175 ins_encode(simple_form3_mem_reg( dst, src ) );
5171 ins_pipe(istore_mem_reg); 5176 ins_pipe(istore_mem_reg);
5172 %} 5177 %}
5173 5178
5174 #ifdef _LP64 5179 #ifdef _LP64
5175 // Load pointer from stack slot, 64-bit encoding 5180 // Load pointer from stack slot, 64-bit encoding
5177 match(Set dst src); 5182 match(Set dst src);
5178 ins_cost(MEMORY_REF_COST); 5183 ins_cost(MEMORY_REF_COST);
5179 size(4); 5184 size(4);
5180 format %{ "LDX $src,$dst\t!ptr" %} 5185 format %{ "LDX $src,$dst\t!ptr" %}
5181 opcode(Assembler::ldx_op3); 5186 opcode(Assembler::ldx_op3);
5182 ins_encode( form3_mem_reg( src, dst ) ); 5187 ins_encode(simple_form3_mem_reg( src, dst ) );
5183 ins_pipe(iload_mem); 5188 ins_pipe(iload_mem);
5184 %} 5189 %}
5185 5190
5186 // Store pointer to stack slot 5191 // Store pointer to stack slot
5187 instruct regP_to_stkP(stackSlotP dst, iRegP src) %{ 5192 instruct regP_to_stkP(stackSlotP dst, iRegP src) %{
5188 match(Set dst src); 5193 match(Set dst src);
5189 ins_cost(MEMORY_REF_COST); 5194 ins_cost(MEMORY_REF_COST);
5190 size(4); 5195 size(4);
5191 format %{ "STX $src,$dst\t!ptr" %} 5196 format %{ "STX $src,$dst\t!ptr" %}
5192 opcode(Assembler::stx_op3); 5197 opcode(Assembler::stx_op3);
5193 ins_encode( form3_mem_reg( dst, src ) ); 5198 ins_encode(simple_form3_mem_reg( dst, src ) );
5194 ins_pipe(istore_mem_reg); 5199 ins_pipe(istore_mem_reg);
5195 %} 5200 %}
5196 #else // _LP64 5201 #else // _LP64
5197 // Load pointer from stack slot, 32-bit encoding 5202 // Load pointer from stack slot, 32-bit encoding
5198 instruct stkP_to_regP( iRegP dst, stackSlotP src ) %{ 5203 instruct stkP_to_regP( iRegP dst, stackSlotP src ) %{
5199 match(Set dst src); 5204 match(Set dst src);
5200 ins_cost(MEMORY_REF_COST); 5205 ins_cost(MEMORY_REF_COST);
5201 format %{ "LDUW $src,$dst\t!ptr" %} 5206 format %{ "LDUW $src,$dst\t!ptr" %}
5202 opcode(Assembler::lduw_op3, Assembler::ldst_op); 5207 opcode(Assembler::lduw_op3, Assembler::ldst_op);
5203 ins_encode( form3_mem_reg( src, dst ) ); 5208 ins_encode(simple_form3_mem_reg( src, dst ) );
5204 ins_pipe(iload_mem); 5209 ins_pipe(iload_mem);
5205 %} 5210 %}
5206 5211
5207 // Store pointer to stack slot 5212 // Store pointer to stack slot
5208 instruct regP_to_stkP(stackSlotP dst, iRegP src) %{ 5213 instruct regP_to_stkP(stackSlotP dst, iRegP src) %{
5209 match(Set dst src); 5214 match(Set dst src);
5210 ins_cost(MEMORY_REF_COST); 5215 ins_cost(MEMORY_REF_COST);
5211 format %{ "STW $src,$dst\t!ptr" %} 5216 format %{ "STW $src,$dst\t!ptr" %}
5212 opcode(Assembler::stw_op3, Assembler::ldst_op); 5217 opcode(Assembler::stw_op3, Assembler::ldst_op);
5213 ins_encode( form3_mem_reg( dst, src ) ); 5218 ins_encode(simple_form3_mem_reg( dst, src ) );
5214 ins_pipe(istore_mem_reg); 5219 ins_pipe(istore_mem_reg);
5215 %} 5220 %}
5216 #endif // _LP64 5221 #endif // _LP64
5217 5222
5218 //------------Special Nop instructions for bundling - no match rules----------- 5223 //------------Special Nop instructions for bundling - no match rules-----------
5271 ins_cost(MEMORY_REF_COST); 5276 ins_cost(MEMORY_REF_COST);
5272 5277
5273 size(4); 5278 size(4);
5274 format %{ "LDSB $mem,$dst" %} 5279 format %{ "LDSB $mem,$dst" %}
5275 opcode(Assembler::ldsb_op3); 5280 opcode(Assembler::ldsb_op3);
5276 ins_encode( form3_mem_reg( mem, dst ) ); 5281 ins_encode(simple_form3_mem_reg( mem, dst ) );
5277 ins_pipe(iload_mask_mem); 5282 ins_pipe(iload_mask_mem);
5278 %} 5283 %}
5279 5284
5280 // Load Byte (8bit UNsigned) into an int reg 5285 // Load Byte (8bit UNsigned) into an int reg
5281 instruct loadUB(iRegI dst, memory mem, immI_255 bytemask) %{ 5286 instruct loadUB(iRegI dst, memory mem, immI_255 bytemask) %{
5283 ins_cost(MEMORY_REF_COST); 5288 ins_cost(MEMORY_REF_COST);
5284 5289
5285 size(4); 5290 size(4);
5286 format %{ "LDUB $mem,$dst" %} 5291 format %{ "LDUB $mem,$dst" %}
5287 opcode(Assembler::ldub_op3); 5292 opcode(Assembler::ldub_op3);
5288 ins_encode( form3_mem_reg( mem, dst ) ); 5293 ins_encode(simple_form3_mem_reg( mem, dst ) );
5289 ins_pipe(iload_mask_mem); 5294 ins_pipe(iload_mask_mem);
5290 %} 5295 %}
5291 5296
5292 // Load Byte (8bit UNsigned) into a Long Register 5297 // Load Byte (8bit UNsigned) into a Long Register
5293 instruct loadUBL(iRegL dst, memory mem, immL_FF bytemask) %{ 5298 instruct loadUBL(iRegL dst, memory mem, immL_FF bytemask) %{
5295 ins_cost(MEMORY_REF_COST); 5300 ins_cost(MEMORY_REF_COST);
5296 5301
5297 size(4); 5302 size(4);
5298 format %{ "LDUB $mem,$dst" %} 5303 format %{ "LDUB $mem,$dst" %}
5299 opcode(Assembler::ldub_op3); 5304 opcode(Assembler::ldub_op3);
5300 ins_encode( form3_mem_reg( mem, dst ) ); 5305 ins_encode(simple_form3_mem_reg( mem, dst ) );
5301 ins_pipe(iload_mask_mem); 5306 ins_pipe(iload_mask_mem);
5302 %} 5307 %}
5303 5308
5304 // Load Char (16bit UNsigned) into a Long Register 5309 // Load Char (16bit UNsigned) into a Long Register
5305 instruct loadUCL(iRegL dst, memory mem, immL_FFFF bytemask) %{ 5310 instruct loadUCL(iRegL dst, memory mem, immL_FFFF bytemask) %{
5307 ins_cost(MEMORY_REF_COST); 5312 ins_cost(MEMORY_REF_COST);
5308 5313
5309 size(4); 5314 size(4);
5310 format %{ "LDUH $mem,$dst" %} 5315 format %{ "LDUH $mem,$dst" %}
5311 opcode(Assembler::lduh_op3); 5316 opcode(Assembler::lduh_op3);
5312 ins_encode( form3_mem_reg( mem, dst ) ); 5317 ins_encode(simple_form3_mem_reg( mem, dst ) );
5313 ins_pipe(iload_mask_mem); 5318 ins_pipe(iload_mask_mem);
5314 %} 5319 %}
5315 5320
5316 // Load Char (16bit unsigned) 5321 // Load Char (16bit unsigned)
5317 instruct loadC(iRegI dst, memory mem) %{ 5322 instruct loadC(iRegI dst, memory mem) %{
5319 ins_cost(MEMORY_REF_COST); 5324 ins_cost(MEMORY_REF_COST);
5320 5325
5321 size(4); 5326 size(4);
5322 format %{ "LDUH $mem,$dst" %} 5327 format %{ "LDUH $mem,$dst" %}
5323 opcode(Assembler::lduh_op3); 5328 opcode(Assembler::lduh_op3);
5324 ins_encode( form3_mem_reg( mem, dst ) ); 5329 ins_encode(simple_form3_mem_reg( mem, dst ) );
5325 ins_pipe(iload_mask_mem); 5330 ins_pipe(iload_mask_mem);
5326 %} 5331 %}
5327 5332
5328 // Load Integer 5333 // Load Integer
5329 instruct loadI(iRegI dst, memory mem) %{ 5334 instruct loadI(iRegI dst, memory mem) %{
5331 ins_cost(MEMORY_REF_COST); 5336 ins_cost(MEMORY_REF_COST);
5332 size(4); 5337 size(4);
5333 5338
5334 format %{ "LDUW $mem,$dst" %} 5339 format %{ "LDUW $mem,$dst" %}
5335 opcode(Assembler::lduw_op3); 5340 opcode(Assembler::lduw_op3);
5336 ins_encode( form3_mem_reg( mem, dst ) ); 5341 ins_encode(simple_form3_mem_reg( mem, dst ) );
5337 ins_pipe(iload_mem); 5342 ins_pipe(iload_mem);
5338 %} 5343 %}
5339 5344
5340 // Load Long - aligned 5345 // Load Long - aligned
5341 instruct loadL(iRegL dst, memory mem ) %{ 5346 instruct loadL(iRegL dst, memory mem ) %{
5342 match(Set dst (LoadL mem)); 5347 match(Set dst (LoadL mem));
5343 ins_cost(MEMORY_REF_COST); 5348 ins_cost(MEMORY_REF_COST);
5344 size(4); 5349 size(4);
5345 format %{ "LDX $mem,$dst\t! long" %} 5350 format %{ "LDX $mem,$dst\t! long" %}
5346 opcode(Assembler::ldx_op3); 5351 opcode(Assembler::ldx_op3);
5347 ins_encode( form3_mem_reg( mem, dst ) ); 5352 ins_encode(simple_form3_mem_reg( mem, dst ) );
5348 ins_pipe(iload_mem); 5353 ins_pipe(iload_mem);
5349 %} 5354 %}
5350 5355
5351 // Load Long - UNaligned 5356 // Load Long - UNaligned
5352 instruct loadL_unaligned(iRegL dst, memory mem, o7RegI tmp) %{ 5357 instruct loadL_unaligned(iRegL dst, memory mem, o7RegI tmp) %{
5357 format %{ "LDUW $mem+4,R_O7\t! misaligned long\n" 5362 format %{ "LDUW $mem+4,R_O7\t! misaligned long\n"
5358 "\tLDUW $mem ,$dst\n" 5363 "\tLDUW $mem ,$dst\n"
5359 "\tSLLX #32, $dst, $dst\n" 5364 "\tSLLX #32, $dst, $dst\n"
5360 "\tOR $dst, R_O7, $dst" %} 5365 "\tOR $dst, R_O7, $dst" %}
5361 opcode(Assembler::lduw_op3); 5366 opcode(Assembler::lduw_op3);
5362 ins_encode( form3_mem_reg_long_unaligned_marshal( mem, dst )); 5367 ins_encode(form3_mem_reg_long_unaligned_marshal( mem, dst ));
5363 ins_pipe(iload_mem); 5368 ins_pipe(iload_mem);
5364 %} 5369 %}
5365 5370
5366 // Load Aligned Packed Byte into a Double Register 5371 // Load Aligned Packed Byte into a Double Register
5367 instruct loadA8B(regD dst, memory mem) %{ 5372 instruct loadA8B(regD dst, memory mem) %{
5368 match(Set dst (Load8B mem)); 5373 match(Set dst (Load8B mem));
5369 ins_cost(MEMORY_REF_COST); 5374 ins_cost(MEMORY_REF_COST);
5370 size(4); 5375 size(4);
5371 format %{ "LDDF $mem,$dst\t! packed8B" %} 5376 format %{ "LDDF $mem,$dst\t! packed8B" %}
5372 opcode(Assembler::lddf_op3); 5377 opcode(Assembler::lddf_op3);
5373 ins_encode( form3_mem_reg( mem, dst ) ); 5378 ins_encode(simple_form3_mem_reg( mem, dst ) );
5374 ins_pipe(floadD_mem); 5379 ins_pipe(floadD_mem);
5375 %} 5380 %}
5376 5381
5377 // Load Aligned Packed Char into a Double Register 5382 // Load Aligned Packed Char into a Double Register
5378 instruct loadA4C(regD dst, memory mem) %{ 5383 instruct loadA4C(regD dst, memory mem) %{
5379 match(Set dst (Load4C mem)); 5384 match(Set dst (Load4C mem));
5380 ins_cost(MEMORY_REF_COST); 5385 ins_cost(MEMORY_REF_COST);
5381 size(4); 5386 size(4);
5382 format %{ "LDDF $mem,$dst\t! packed4C" %} 5387 format %{ "LDDF $mem,$dst\t! packed4C" %}
5383 opcode(Assembler::lddf_op3); 5388 opcode(Assembler::lddf_op3);
5384 ins_encode( form3_mem_reg( mem, dst ) ); 5389 ins_encode(simple_form3_mem_reg( mem, dst ) );
5385 ins_pipe(floadD_mem); 5390 ins_pipe(floadD_mem);
5386 %} 5391 %}
5387 5392
5388 // Load Aligned Packed Short into a Double Register 5393 // Load Aligned Packed Short into a Double Register
5389 instruct loadA4S(regD dst, memory mem) %{ 5394 instruct loadA4S(regD dst, memory mem) %{
5390 match(Set dst (Load4S mem)); 5395 match(Set dst (Load4S mem));
5391 ins_cost(MEMORY_REF_COST); 5396 ins_cost(MEMORY_REF_COST);
5392 size(4); 5397 size(4);
5393 format %{ "LDDF $mem,$dst\t! packed4S" %} 5398 format %{ "LDDF $mem,$dst\t! packed4S" %}
5394 opcode(Assembler::lddf_op3); 5399 opcode(Assembler::lddf_op3);
5395 ins_encode( form3_mem_reg( mem, dst ) ); 5400 ins_encode(simple_form3_mem_reg( mem, dst ) );
5396 ins_pipe(floadD_mem); 5401 ins_pipe(floadD_mem);
5397 %} 5402 %}
5398 5403
5399 // Load Aligned Packed Int into a Double Register 5404 // Load Aligned Packed Int into a Double Register
5400 instruct loadA2I(regD dst, memory mem) %{ 5405 instruct loadA2I(regD dst, memory mem) %{
5401 match(Set dst (Load2I mem)); 5406 match(Set dst (Load2I mem));
5402 ins_cost(MEMORY_REF_COST); 5407 ins_cost(MEMORY_REF_COST);
5403 size(4); 5408 size(4);
5404 format %{ "LDDF $mem,$dst\t! packed2I" %} 5409 format %{ "LDDF $mem,$dst\t! packed2I" %}
5405 opcode(Assembler::lddf_op3); 5410 opcode(Assembler::lddf_op3);
5406 ins_encode( form3_mem_reg( mem, dst ) ); 5411 ins_encode(simple_form3_mem_reg( mem, dst ) );
5407 ins_pipe(floadD_mem); 5412 ins_pipe(floadD_mem);
5408 %} 5413 %}
5409 5414
5410 // Load Range 5415 // Load Range
5411 instruct loadRange(iRegI dst, memory mem) %{ 5416 instruct loadRange(iRegI dst, memory mem) %{
5413 ins_cost(MEMORY_REF_COST); 5418 ins_cost(MEMORY_REF_COST);
5414 5419
5415 size(4); 5420 size(4);
5416 format %{ "LDUW $mem,$dst\t! range" %} 5421 format %{ "LDUW $mem,$dst\t! range" %}
5417 opcode(Assembler::lduw_op3); 5422 opcode(Assembler::lduw_op3);
5418 ins_encode( form3_mem_reg( mem, dst ) ); 5423 ins_encode(simple_form3_mem_reg( mem, dst ) );
5419 ins_pipe(iload_mem); 5424 ins_pipe(iload_mem);
5420 %} 5425 %}
5421 5426
5422 // Load Integer into %f register (for fitos/fitod) 5427 // Load Integer into %f register (for fitos/fitod)
5423 instruct loadI_freg(regF dst, memory mem) %{ 5428 instruct loadI_freg(regF dst, memory mem) %{
5425 ins_cost(MEMORY_REF_COST); 5430 ins_cost(MEMORY_REF_COST);
5426 size(4); 5431 size(4);
5427 5432
5428 format %{ "LDF $mem,$dst\t! for fitos/fitod" %} 5433 format %{ "LDF $mem,$dst\t! for fitos/fitod" %}
5429 opcode(Assembler::ldf_op3); 5434 opcode(Assembler::ldf_op3);
5430 ins_encode( form3_mem_reg( mem, dst ) ); 5435 ins_encode(simple_form3_mem_reg( mem, dst ) );
5431 ins_pipe(floadF_mem); 5436 ins_pipe(floadF_mem);
5432 %} 5437 %}
5433 5438
5434 // Load Pointer 5439 // Load Pointer
5435 instruct loadP(iRegP dst, memory mem) %{ 5440 instruct loadP(iRegP dst, memory mem) %{
5512 ins_cost(MEMORY_REF_COST); 5517 ins_cost(MEMORY_REF_COST);
5513 5518
5514 size(4); 5519 size(4);
5515 format %{ "LDSH $mem,$dst" %} 5520 format %{ "LDSH $mem,$dst" %}
5516 opcode(Assembler::ldsh_op3); 5521 opcode(Assembler::ldsh_op3);
5517 ins_encode( form3_mem_reg( mem, dst ) ); 5522 ins_encode(simple_form3_mem_reg( mem, dst ) );
5518 ins_pipe(iload_mask_mem); 5523 ins_pipe(iload_mask_mem);
5519 %} 5524 %}
5520 5525
5521 // Load Double 5526 // Load Double
5522 instruct loadD(regD dst, memory mem) %{ 5527 instruct loadD(regD dst, memory mem) %{
5524 ins_cost(MEMORY_REF_COST); 5529 ins_cost(MEMORY_REF_COST);
5525 5530
5526 size(4); 5531 size(4);
5527 format %{ "LDDF $mem,$dst" %} 5532 format %{ "LDDF $mem,$dst" %}
5528 opcode(Assembler::lddf_op3); 5533 opcode(Assembler::lddf_op3);
5529 ins_encode( form3_mem_reg( mem, dst ) ); 5534 ins_encode(simple_form3_mem_reg( mem, dst ) );
5530 ins_pipe(floadD_mem); 5535 ins_pipe(floadD_mem);
5531 %} 5536 %}
5532 5537
5533 // Load Double - UNaligned 5538 // Load Double - UNaligned
5534 instruct loadD_unaligned(regD_low dst, memory mem ) %{ 5539 instruct loadD_unaligned(regD_low dst, memory mem ) %{
5548 ins_cost(MEMORY_REF_COST); 5553 ins_cost(MEMORY_REF_COST);
5549 5554
5550 size(4); 5555 size(4);
5551 format %{ "LDF $mem,$dst" %} 5556 format %{ "LDF $mem,$dst" %}
5552 opcode(Assembler::ldf_op3); 5557 opcode(Assembler::ldf_op3);
5553 ins_encode( form3_mem_reg( mem, dst ) ); 5558 ins_encode(simple_form3_mem_reg( mem, dst ) );
5554 ins_pipe(floadF_mem); 5559 ins_pipe(floadF_mem);
5555 %} 5560 %}
5556 5561
5557 // Load Constant 5562 // Load Constant
5558 instruct loadConI( iRegI dst, immI src ) %{ 5563 instruct loadConI( iRegI dst, immI src ) %{
5717 ins_cost(MEMORY_REF_COST); 5722 ins_cost(MEMORY_REF_COST);
5718 5723
5719 size(4); 5724 size(4);
5720 format %{ "STB $src,$mem\t! byte" %} 5725 format %{ "STB $src,$mem\t! byte" %}
5721 opcode(Assembler::stb_op3); 5726 opcode(Assembler::stb_op3);
5722 ins_encode( form3_mem_reg( mem, src ) ); 5727 ins_encode(simple_form3_mem_reg( mem, src ) );
5723 ins_pipe(istore_mem_reg); 5728 ins_pipe(istore_mem_reg);
5724 %} 5729 %}
5725 5730
5726 instruct storeB0(memory mem, immI0 src) %{ 5731 instruct storeB0(memory mem, immI0 src) %{
5727 match(Set mem (StoreB mem src)); 5732 match(Set mem (StoreB mem src));
5728 ins_cost(MEMORY_REF_COST); 5733 ins_cost(MEMORY_REF_COST);
5729 5734
5730 size(4); 5735 size(4);
5731 format %{ "STB $src,$mem\t! byte" %} 5736 format %{ "STB $src,$mem\t! byte" %}
5732 opcode(Assembler::stb_op3); 5737 opcode(Assembler::stb_op3);
5733 ins_encode( form3_mem_reg( mem, R_G0 ) ); 5738 ins_encode(simple_form3_mem_reg( mem, R_G0 ) );
5734 ins_pipe(istore_mem_zero); 5739 ins_pipe(istore_mem_zero);
5735 %} 5740 %}
5736 5741
5737 instruct storeCM0(memory mem, immI0 src) %{ 5742 instruct storeCM0(memory mem, immI0 src) %{
5738 match(Set mem (StoreCM mem src)); 5743 match(Set mem (StoreCM mem src));
5739 ins_cost(MEMORY_REF_COST); 5744 ins_cost(MEMORY_REF_COST);
5740 5745
5741 size(4); 5746 size(4);
5742 format %{ "STB $src,$mem\t! CMS card-mark byte 0" %} 5747 format %{ "STB $src,$mem\t! CMS card-mark byte 0" %}
5743 opcode(Assembler::stb_op3); 5748 opcode(Assembler::stb_op3);
5744 ins_encode( form3_mem_reg( mem, R_G0 ) ); 5749 ins_encode(simple_form3_mem_reg( mem, R_G0 ) );
5745 ins_pipe(istore_mem_zero); 5750 ins_pipe(istore_mem_zero);
5746 %} 5751 %}
5747 5752
5748 // Store Char/Short 5753 // Store Char/Short
5749 instruct storeC(memory mem, iRegI src) %{ 5754 instruct storeC(memory mem, iRegI src) %{
5751 ins_cost(MEMORY_REF_COST); 5756 ins_cost(MEMORY_REF_COST);
5752 5757
5753 size(4); 5758 size(4);
5754 format %{ "STH $src,$mem\t! short" %} 5759 format %{ "STH $src,$mem\t! short" %}
5755 opcode(Assembler::sth_op3); 5760 opcode(Assembler::sth_op3);
5756 ins_encode( form3_mem_reg( mem, src ) ); 5761 ins_encode(simple_form3_mem_reg( mem, src ) );
5757 ins_pipe(istore_mem_reg); 5762 ins_pipe(istore_mem_reg);
5758 %} 5763 %}
5759 5764
5760 instruct storeC0(memory mem, immI0 src) %{ 5765 instruct storeC0(memory mem, immI0 src) %{
5761 match(Set mem (StoreC mem src)); 5766 match(Set mem (StoreC mem src));
5762 ins_cost(MEMORY_REF_COST); 5767 ins_cost(MEMORY_REF_COST);
5763 5768
5764 size(4); 5769 size(4);
5765 format %{ "STH $src,$mem\t! short" %} 5770 format %{ "STH $src,$mem\t! short" %}
5766 opcode(Assembler::sth_op3); 5771 opcode(Assembler::sth_op3);
5767 ins_encode( form3_mem_reg( mem, R_G0 ) ); 5772 ins_encode(simple_form3_mem_reg( mem, R_G0 ) );
5768 ins_pipe(istore_mem_zero); 5773 ins_pipe(istore_mem_zero);
5769 %} 5774 %}
5770 5775
5771 // Store Integer 5776 // Store Integer
5772 instruct storeI(memory mem, iRegI src) %{ 5777 instruct storeI(memory mem, iRegI src) %{
5774 ins_cost(MEMORY_REF_COST); 5779 ins_cost(MEMORY_REF_COST);
5775 5780
5776 size(4); 5781 size(4);
5777 format %{ "STW $src,$mem" %} 5782 format %{ "STW $src,$mem" %}
5778 opcode(Assembler::stw_op3); 5783 opcode(Assembler::stw_op3);
5779 ins_encode( form3_mem_reg( mem, src ) ); 5784 ins_encode(simple_form3_mem_reg( mem, src ) );
5780 ins_pipe(istore_mem_reg); 5785 ins_pipe(istore_mem_reg);
5781 %} 5786 %}
5782 5787
5783 // Store Long 5788 // Store Long
5784 instruct storeL(memory mem, iRegL src) %{ 5789 instruct storeL(memory mem, iRegL src) %{
5785 match(Set mem (StoreL mem src)); 5790 match(Set mem (StoreL mem src));
5786 ins_cost(MEMORY_REF_COST); 5791 ins_cost(MEMORY_REF_COST);
5787 size(4); 5792 size(4);
5788 format %{ "STX $src,$mem\t! long" %} 5793 format %{ "STX $src,$mem\t! long" %}
5789 opcode(Assembler::stx_op3); 5794 opcode(Assembler::stx_op3);
5790 ins_encode( form3_mem_reg( mem, src ) ); 5795 ins_encode(simple_form3_mem_reg( mem, src ) );
5791 ins_pipe(istore_mem_reg); 5796 ins_pipe(istore_mem_reg);
5792 %} 5797 %}
5793 5798
5794 instruct storeI0(memory mem, immI0 src) %{ 5799 instruct storeI0(memory mem, immI0 src) %{
5795 match(Set mem (StoreI mem src)); 5800 match(Set mem (StoreI mem src));
5796 ins_cost(MEMORY_REF_COST); 5801 ins_cost(MEMORY_REF_COST);
5797 5802
5798 size(4); 5803 size(4);
5799 format %{ "STW $src,$mem" %} 5804 format %{ "STW $src,$mem" %}
5800 opcode(Assembler::stw_op3); 5805 opcode(Assembler::stw_op3);
5801 ins_encode( form3_mem_reg( mem, R_G0 ) ); 5806 ins_encode(simple_form3_mem_reg( mem, R_G0 ) );
5802 ins_pipe(istore_mem_zero); 5807 ins_pipe(istore_mem_zero);
5803 %} 5808 %}
5804 5809
5805 instruct storeL0(memory mem, immL0 src) %{ 5810 instruct storeL0(memory mem, immL0 src) %{
5806 match(Set mem (StoreL mem src)); 5811 match(Set mem (StoreL mem src));
5807 ins_cost(MEMORY_REF_COST); 5812 ins_cost(MEMORY_REF_COST);
5808 5813
5809 size(4); 5814 size(4);
5810 format %{ "STX $src,$mem" %} 5815 format %{ "STX $src,$mem" %}
5811 opcode(Assembler::stx_op3); 5816 opcode(Assembler::stx_op3);
5812 ins_encode( form3_mem_reg( mem, R_G0 ) ); 5817 ins_encode(simple_form3_mem_reg( mem, R_G0 ) );
5813 ins_pipe(istore_mem_zero); 5818 ins_pipe(istore_mem_zero);
5814 %} 5819 %}
5815 5820
5816 // Store Integer from float register (used after fstoi) 5821 // Store Integer from float register (used after fstoi)
5817 instruct storeI_Freg(memory mem, regF src) %{ 5822 instruct storeI_Freg(memory mem, regF src) %{
5819 ins_cost(MEMORY_REF_COST); 5824 ins_cost(MEMORY_REF_COST);
5820 5825
5821 size(4); 5826 size(4);
5822 format %{ "STF $src,$mem\t! after fstoi/fdtoi" %} 5827 format %{ "STF $src,$mem\t! after fstoi/fdtoi" %}
5823 opcode(Assembler::stf_op3); 5828 opcode(Assembler::stf_op3);
5824 ins_encode( form3_mem_reg( mem, src ) ); 5829 ins_encode(simple_form3_mem_reg( mem, src ) );
5825 ins_pipe(fstoreF_mem_reg); 5830 ins_pipe(fstoreF_mem_reg);
5826 %} 5831 %}
5827 5832
5828 // Store Pointer 5833 // Store Pointer
5829 instruct storeP(memory dst, sp_ptr_RegP src) %{ 5834 instruct storeP(memory dst, sp_ptr_RegP src) %{
5902 ins_cost(MEMORY_REF_COST); 5907 ins_cost(MEMORY_REF_COST);
5903 5908
5904 size(4); 5909 size(4);
5905 format %{ "STDF $src,$mem" %} 5910 format %{ "STDF $src,$mem" %}
5906 opcode(Assembler::stdf_op3); 5911 opcode(Assembler::stdf_op3);
5907 ins_encode( form3_mem_reg( mem, src ) ); 5912 ins_encode(simple_form3_mem_reg( mem, src ) );
5908 ins_pipe(fstoreD_mem_reg); 5913 ins_pipe(fstoreD_mem_reg);
5909 %} 5914 %}
5910 5915
5911 instruct storeD0( memory mem, immD0 src) %{ 5916 instruct storeD0( memory mem, immD0 src) %{
5912 match(Set mem (StoreD mem src)); 5917 match(Set mem (StoreD mem src));
5913 ins_cost(MEMORY_REF_COST); 5918 ins_cost(MEMORY_REF_COST);
5914 5919
5915 size(4); 5920 size(4);
5916 format %{ "STX $src,$mem" %} 5921 format %{ "STX $src,$mem" %}
5917 opcode(Assembler::stx_op3); 5922 opcode(Assembler::stx_op3);
5918 ins_encode( form3_mem_reg( mem, R_G0 ) ); 5923 ins_encode(simple_form3_mem_reg( mem, R_G0 ) );
5919 ins_pipe(fstoreD_mem_zero); 5924 ins_pipe(fstoreD_mem_zero);
5920 %} 5925 %}
5921 5926
5922 // Store Float 5927 // Store Float
5923 instruct storeF( memory mem, regF src) %{ 5928 instruct storeF( memory mem, regF src) %{
5925 ins_cost(MEMORY_REF_COST); 5930 ins_cost(MEMORY_REF_COST);
5926 5931
5927 size(4); 5932 size(4);
5928 format %{ "STF $src,$mem" %} 5933 format %{ "STF $src,$mem" %}
5929 opcode(Assembler::stf_op3); 5934 opcode(Assembler::stf_op3);
5930 ins_encode( form3_mem_reg( mem, src ) ); 5935 ins_encode(simple_form3_mem_reg( mem, src ) );
5931 ins_pipe(fstoreF_mem_reg); 5936 ins_pipe(fstoreF_mem_reg);
5932 %} 5937 %}
5933 5938
5934 instruct storeF0( memory mem, immF0 src) %{ 5939 instruct storeF0( memory mem, immF0 src) %{
5935 match(Set mem (StoreF mem src)); 5940 match(Set mem (StoreF mem src));
5936 ins_cost(MEMORY_REF_COST); 5941 ins_cost(MEMORY_REF_COST);
5937 5942
5938 size(4); 5943 size(4);
5939 format %{ "STW $src,$mem\t! storeF0" %} 5944 format %{ "STW $src,$mem\t! storeF0" %}
5940 opcode(Assembler::stw_op3); 5945 opcode(Assembler::stw_op3);
5941 ins_encode( form3_mem_reg( mem, R_G0 ) ); 5946 ins_encode(simple_form3_mem_reg( mem, R_G0 ) );
5942 ins_pipe(fstoreF_mem_zero); 5947 ins_pipe(fstoreF_mem_zero);
5943 %} 5948 %}
5944 5949
5945 // Store Aligned Packed Bytes in Double register to memory 5950 // Store Aligned Packed Bytes in Double register to memory
5946 instruct storeA8B(memory mem, regD src) %{ 5951 instruct storeA8B(memory mem, regD src) %{
5947 match(Set mem (Store8B mem src)); 5952 match(Set mem (Store8B mem src));
5948 ins_cost(MEMORY_REF_COST); 5953 ins_cost(MEMORY_REF_COST);
5949 size(4); 5954 size(4);
5950 format %{ "STDF $src,$mem\t! packed8B" %} 5955 format %{ "STDF $src,$mem\t! packed8B" %}
5951 opcode(Assembler::stdf_op3); 5956 opcode(Assembler::stdf_op3);
5952 ins_encode( form3_mem_reg( mem, src ) ); 5957 ins_encode(simple_form3_mem_reg( mem, src ) );
5953 ins_pipe(fstoreD_mem_reg); 5958 ins_pipe(fstoreD_mem_reg);
5954 %} 5959 %}
5955 5960
5956 // Convert oop pointer into compressed form 5961 // Convert oop pointer into compressed form
5957 instruct encodeHeapOop(iRegN dst, iRegP src) %{ 5962 instruct encodeHeapOop(iRegN dst, iRegP src) %{
6002 match(Set mem (Store8B mem zero)); 6007 match(Set mem (Store8B mem zero));
6003 ins_cost(MEMORY_REF_COST); 6008 ins_cost(MEMORY_REF_COST);
6004 size(4); 6009 size(4);
6005 format %{ "STX $zero,$mem\t! packed8B" %} 6010 format %{ "STX $zero,$mem\t! packed8B" %}
6006 opcode(Assembler::stx_op3); 6011 opcode(Assembler::stx_op3);
6007 ins_encode( form3_mem_reg( mem, R_G0 ) ); 6012 ins_encode(simple_form3_mem_reg( mem, R_G0 ) );
6008 ins_pipe(fstoreD_mem_zero); 6013 ins_pipe(fstoreD_mem_zero);
6009 %} 6014 %}
6010 6015
6011 // Store Aligned Packed Chars/Shorts in Double register to memory 6016 // Store Aligned Packed Chars/Shorts in Double register to memory
6012 instruct storeA4C(memory mem, regD src) %{ 6017 instruct storeA4C(memory mem, regD src) %{
6013 match(Set mem (Store4C mem src)); 6018 match(Set mem (Store4C mem src));
6014 ins_cost(MEMORY_REF_COST); 6019 ins_cost(MEMORY_REF_COST);
6015 size(4); 6020 size(4);
6016 format %{ "STDF $src,$mem\t! packed4C" %} 6021 format %{ "STDF $src,$mem\t! packed4C" %}
6017 opcode(Assembler::stdf_op3); 6022 opcode(Assembler::stdf_op3);
6018 ins_encode( form3_mem_reg( mem, src ) ); 6023 ins_encode(simple_form3_mem_reg( mem, src ) );
6019 ins_pipe(fstoreD_mem_reg); 6024 ins_pipe(fstoreD_mem_reg);
6020 %} 6025 %}
6021 6026
6022 // Store Zero into Aligned Packed Chars/Shorts 6027 // Store Zero into Aligned Packed Chars/Shorts
6023 instruct storeA4C0(memory mem, immI0 zero) %{ 6028 instruct storeA4C0(memory mem, immI0 zero) %{
6024 match(Set mem (Store4C mem (Replicate4C zero))); 6029 match(Set mem (Store4C mem (Replicate4C zero)));
6025 ins_cost(MEMORY_REF_COST); 6030 ins_cost(MEMORY_REF_COST);
6026 size(4); 6031 size(4);
6027 format %{ "STX $zero,$mem\t! packed4C" %} 6032 format %{ "STX $zero,$mem\t! packed4C" %}
6028 opcode(Assembler::stx_op3); 6033 opcode(Assembler::stx_op3);
6029 ins_encode( form3_mem_reg( mem, R_G0 ) ); 6034 ins_encode(simple_form3_mem_reg( mem, R_G0 ) );
6030 ins_pipe(fstoreD_mem_zero); 6035 ins_pipe(fstoreD_mem_zero);
6031 %} 6036 %}
6032 6037
6033 // Store Aligned Packed Ints in Double register to memory 6038 // Store Aligned Packed Ints in Double register to memory
6034 instruct storeA2I(memory mem, regD src) %{ 6039 instruct storeA2I(memory mem, regD src) %{
6035 match(Set mem (Store2I mem src)); 6040 match(Set mem (Store2I mem src));
6036 ins_cost(MEMORY_REF_COST); 6041 ins_cost(MEMORY_REF_COST);
6037 size(4); 6042 size(4);
6038 format %{ "STDF $src,$mem\t! packed2I" %} 6043 format %{ "STDF $src,$mem\t! packed2I" %}
6039 opcode(Assembler::stdf_op3); 6044 opcode(Assembler::stdf_op3);
6040 ins_encode( form3_mem_reg( mem, src ) ); 6045 ins_encode(simple_form3_mem_reg( mem, src ) );
6041 ins_pipe(fstoreD_mem_reg); 6046 ins_pipe(fstoreD_mem_reg);
6042 %} 6047 %}
6043 6048
6044 // Store Zero into Aligned Packed Ints 6049 // Store Zero into Aligned Packed Ints
6045 instruct storeA2I0(memory mem, immI0 zero) %{ 6050 instruct storeA2I0(memory mem, immI0 zero) %{
6046 match(Set mem (Store2I mem zero)); 6051 match(Set mem (Store2I mem zero));
6047 ins_cost(MEMORY_REF_COST); 6052 ins_cost(MEMORY_REF_COST);
6048 size(4); 6053 size(4);
6049 format %{ "STX $zero,$mem\t! packed2I" %} 6054 format %{ "STX $zero,$mem\t! packed2I" %}
6050 opcode(Assembler::stx_op3); 6055 opcode(Assembler::stx_op3);
6051 ins_encode( form3_mem_reg( mem, R_G0 ) ); 6056 ins_encode(simple_form3_mem_reg( mem, R_G0 ) );
6052 ins_pipe(fstoreD_mem_zero); 6057 ins_pipe(fstoreD_mem_zero);
6053 %} 6058 %}
6054 6059
6055 6060
6056 //----------MemBar Instructions----------------------------------------------- 6061 //----------MemBar Instructions-----------------------------------------------
6160 // %%%% TO DO: Tell the coalescer that this kind of node is a copy! 6165 // %%%% TO DO: Tell the coalescer that this kind of node is a copy!
6161 match(Set stkSlot src); // chain rule 6166 match(Set stkSlot src); // chain rule
6162 ins_cost(MEMORY_REF_COST); 6167 ins_cost(MEMORY_REF_COST);
6163 format %{ "STDF $src,$stkSlot\t!stk" %} 6168 format %{ "STDF $src,$stkSlot\t!stk" %}
6164 opcode(Assembler::stdf_op3); 6169 opcode(Assembler::stdf_op3);
6165 ins_encode(form3_mem_reg(stkSlot, src)); 6170 ins_encode(simple_form3_mem_reg(stkSlot, src));
6166 ins_pipe(fstoreD_stk_reg); 6171 ins_pipe(fstoreD_stk_reg);
6167 %} 6172 %}
6168 6173
6169 instruct ldfSSD(regD dst, stackSlotD stkSlot) %{ 6174 instruct ldfSSD(regD dst, stackSlotD stkSlot) %{
6170 // %%%% TO DO: Tell the coalescer that this kind of node is a copy! 6175 // %%%% TO DO: Tell the coalescer that this kind of node is a copy!
6171 match(Set dst stkSlot); // chain rule 6176 match(Set dst stkSlot); // chain rule
6172 ins_cost(MEMORY_REF_COST); 6177 ins_cost(MEMORY_REF_COST);
6173 format %{ "LDDF $stkSlot,$dst\t!stk" %} 6178 format %{ "LDDF $stkSlot,$dst\t!stk" %}
6174 opcode(Assembler::lddf_op3); 6179 opcode(Assembler::lddf_op3);
6175 ins_encode(form3_mem_reg(stkSlot, dst)); 6180 ins_encode(simple_form3_mem_reg(stkSlot, dst));
6176 ins_pipe(floadD_stk); 6181 ins_pipe(floadD_stk);
6177 %} 6182 %}
6178 6183
6179 instruct stfSSF(stackSlotF stkSlot, regF src) %{ 6184 instruct stfSSF(stackSlotF stkSlot, regF src) %{
6180 // %%%% TO DO: Tell the coalescer that this kind of node is a copy! 6185 // %%%% TO DO: Tell the coalescer that this kind of node is a copy!
6181 match(Set stkSlot src); // chain rule 6186 match(Set stkSlot src); // chain rule
6182 ins_cost(MEMORY_REF_COST); 6187 ins_cost(MEMORY_REF_COST);
6183 format %{ "STF $src,$stkSlot\t!stk" %} 6188 format %{ "STF $src,$stkSlot\t!stk" %}
6184 opcode(Assembler::stf_op3); 6189 opcode(Assembler::stf_op3);
6185 ins_encode(form3_mem_reg(stkSlot, src)); 6190 ins_encode(simple_form3_mem_reg(stkSlot, src));
6186 ins_pipe(fstoreF_stk_reg); 6191 ins_pipe(fstoreF_stk_reg);
6187 %} 6192 %}
6188 6193
6189 //----------Conditional Move--------------------------------------------------- 6194 //----------Conditional Move---------------------------------------------------
6190 // Conditional move 6195 // Conditional move
6582 match(Set dst (LoadLLocked mem)); 6587 match(Set dst (LoadLLocked mem));
6583 ins_cost(MEMORY_REF_COST); 6588 ins_cost(MEMORY_REF_COST);
6584 size(4); 6589 size(4);
6585 format %{ "LDX $mem,$dst\t! long" %} 6590 format %{ "LDX $mem,$dst\t! long" %}
6586 opcode(Assembler::ldx_op3); 6591 opcode(Assembler::ldx_op3);
6587 ins_encode( form3_mem_reg( mem, dst ) ); 6592 ins_encode(simple_form3_mem_reg( mem, dst ) );
6588 ins_pipe(iload_mem); 6593 ins_pipe(iload_mem);
6589 %} 6594 %}
6590 6595
6591 instruct storePConditional( iRegP heap_top_ptr, iRegP oldval, g3RegP newval, flagsRegP pcc ) %{ 6596 instruct storePConditional( iRegP heap_top_ptr, iRegP oldval, g3RegP newval, flagsRegP pcc ) %{
6592 match(Set pcc (StorePConditional heap_top_ptr (Binary oldval newval))); 6597 match(Set pcc (StorePConditional heap_top_ptr (Binary oldval newval)));
7664 ins_cost(DEFAULT_COST + MEMORY_REF_COST); 7669 ins_cost(DEFAULT_COST + MEMORY_REF_COST);
7665 size(8); 7670 size(8);
7666 format %{ "LDF $mem,$dst\n\t" 7671 format %{ "LDF $mem,$dst\n\t"
7667 "FITOD $dst,$dst" %} 7672 "FITOD $dst,$dst" %}
7668 opcode(Assembler::ldf_op3, Assembler::fitod_opf); 7673 opcode(Assembler::ldf_op3, Assembler::fitod_opf);
7669 ins_encode( form3_mem_reg( mem, dst ), form3_convI2F(dst, dst)); 7674 ins_encode(simple_form3_mem_reg( mem, dst ), form3_convI2F(dst, dst));
7670 ins_pipe(floadF_mem); 7675 ins_pipe(floadF_mem);
7671 %} 7676 %}
7672 7677
7673 7678
7674 instruct convI2F_helper(regF dst, regF tmp) %{ 7679 instruct convI2F_helper(regF dst, regF tmp) %{
7694 ins_cost(DEFAULT_COST + MEMORY_REF_COST); 7699 ins_cost(DEFAULT_COST + MEMORY_REF_COST);
7695 size(8); 7700 size(8);
7696 format %{ "LDF $mem,$dst\n\t" 7701 format %{ "LDF $mem,$dst\n\t"
7697 "FITOS $dst,$dst" %} 7702 "FITOS $dst,$dst" %}
7698 opcode(Assembler::ldf_op3, Assembler::fitos_opf); 7703 opcode(Assembler::ldf_op3, Assembler::fitos_opf);
7699 ins_encode( form3_mem_reg( mem, dst ), form3_convI2F(dst, dst)); 7704 ins_encode(simple_form3_mem_reg( mem, dst ), form3_convI2F(dst, dst));
7700 ins_pipe(floadF_mem); 7705 ins_pipe(floadF_mem);
7701 %} 7706 %}
7702 7707
7703 7708
7704 instruct convI2L_reg(iRegL dst, iRegI src) %{ 7709 instruct convI2L_reg(iRegL dst, iRegI src) %{
7736 ins_cost(MEMORY_REF_COST); 7741 ins_cost(MEMORY_REF_COST);
7737 7742
7738 size(4); 7743 size(4);
7739 format %{ "LDUW $src,$dst\t! MoveF2I" %} 7744 format %{ "LDUW $src,$dst\t! MoveF2I" %}
7740 opcode(Assembler::lduw_op3); 7745 opcode(Assembler::lduw_op3);
7741 ins_encode( form3_mem_reg( src, dst ) ); 7746 ins_encode(simple_form3_mem_reg( src, dst ) );
7742 ins_pipe(iload_mem); 7747 ins_pipe(iload_mem);
7743 %} 7748 %}
7744 7749
7745 instruct MoveI2F_stack_reg(regF dst, stackSlotI src) %{ 7750 instruct MoveI2F_stack_reg(regF dst, stackSlotI src) %{
7746 match(Set dst (MoveI2F src)); 7751 match(Set dst (MoveI2F src));
7748 ins_cost(MEMORY_REF_COST); 7753 ins_cost(MEMORY_REF_COST);
7749 7754
7750 size(4); 7755 size(4);
7751 format %{ "LDF $src,$dst\t! MoveI2F" %} 7756 format %{ "LDF $src,$dst\t! MoveI2F" %}
7752 opcode(Assembler::ldf_op3); 7757 opcode(Assembler::ldf_op3);
7753 ins_encode(form3_mem_reg(src, dst)); 7758 ins_encode(simple_form3_mem_reg(src, dst));
7754 ins_pipe(floadF_stk); 7759 ins_pipe(floadF_stk);
7755 %} 7760 %}
7756 7761
7757 instruct MoveD2L_stack_reg(iRegL dst, stackSlotD src) %{ 7762 instruct MoveD2L_stack_reg(iRegL dst, stackSlotD src) %{
7758 match(Set dst (MoveD2L src)); 7763 match(Set dst (MoveD2L src));
7760 ins_cost(MEMORY_REF_COST); 7765 ins_cost(MEMORY_REF_COST);
7761 7766
7762 size(4); 7767 size(4);
7763 format %{ "LDX $src,$dst\t! MoveD2L" %} 7768 format %{ "LDX $src,$dst\t! MoveD2L" %}
7764 opcode(Assembler::ldx_op3); 7769 opcode(Assembler::ldx_op3);
7765 ins_encode( form3_mem_reg( src, dst ) ); 7770 ins_encode(simple_form3_mem_reg( src, dst ) );
7766 ins_pipe(iload_mem); 7771 ins_pipe(iload_mem);
7767 %} 7772 %}
7768 7773
7769 instruct MoveL2D_stack_reg(regD dst, stackSlotL src) %{ 7774 instruct MoveL2D_stack_reg(regD dst, stackSlotL src) %{
7770 match(Set dst (MoveL2D src)); 7775 match(Set dst (MoveL2D src));
7772 ins_cost(MEMORY_REF_COST); 7777 ins_cost(MEMORY_REF_COST);
7773 7778
7774 size(4); 7779 size(4);
7775 format %{ "LDDF $src,$dst\t! MoveL2D" %} 7780 format %{ "LDDF $src,$dst\t! MoveL2D" %}
7776 opcode(Assembler::lddf_op3); 7781 opcode(Assembler::lddf_op3);
7777 ins_encode(form3_mem_reg(src, dst)); 7782 ins_encode(simple_form3_mem_reg(src, dst));
7778 ins_pipe(floadD_stk); 7783 ins_pipe(floadD_stk);
7779 %} 7784 %}
7780 7785
7781 instruct MoveF2I_reg_stack(stackSlotI dst, regF src) %{ 7786 instruct MoveF2I_reg_stack(stackSlotI dst, regF src) %{
7782 match(Set dst (MoveF2I src)); 7787 match(Set dst (MoveF2I src));
7784 ins_cost(MEMORY_REF_COST); 7789 ins_cost(MEMORY_REF_COST);
7785 7790
7786 size(4); 7791 size(4);
7787 format %{ "STF $src,$dst\t!MoveF2I" %} 7792 format %{ "STF $src,$dst\t!MoveF2I" %}
7788 opcode(Assembler::stf_op3); 7793 opcode(Assembler::stf_op3);
7789 ins_encode(form3_mem_reg(dst, src)); 7794 ins_encode(simple_form3_mem_reg(dst, src));
7790 ins_pipe(fstoreF_stk_reg); 7795 ins_pipe(fstoreF_stk_reg);
7791 %} 7796 %}
7792 7797
7793 instruct MoveI2F_reg_stack(stackSlotF dst, iRegI src) %{ 7798 instruct MoveI2F_reg_stack(stackSlotF dst, iRegI src) %{
7794 match(Set dst (MoveI2F src)); 7799 match(Set dst (MoveI2F src));
7796 ins_cost(MEMORY_REF_COST); 7801 ins_cost(MEMORY_REF_COST);
7797 7802
7798 size(4); 7803 size(4);
7799 format %{ "STW $src,$dst\t!MoveI2F" %} 7804 format %{ "STW $src,$dst\t!MoveI2F" %}
7800 opcode(Assembler::stw_op3); 7805 opcode(Assembler::stw_op3);
7801 ins_encode( form3_mem_reg( dst, src ) ); 7806 ins_encode(simple_form3_mem_reg( dst, src ) );
7802 ins_pipe(istore_mem_reg); 7807 ins_pipe(istore_mem_reg);
7803 %} 7808 %}
7804 7809
7805 instruct MoveD2L_reg_stack(stackSlotL dst, regD src) %{ 7810 instruct MoveD2L_reg_stack(stackSlotL dst, regD src) %{
7806 match(Set dst (MoveD2L src)); 7811 match(Set dst (MoveD2L src));
7808 ins_cost(MEMORY_REF_COST); 7813 ins_cost(MEMORY_REF_COST);
7809 7814
7810 size(4); 7815 size(4);
7811 format %{ "STDF $src,$dst\t!MoveD2L" %} 7816 format %{ "STDF $src,$dst\t!MoveD2L" %}
7812 opcode(Assembler::stdf_op3); 7817 opcode(Assembler::stdf_op3);
7813 ins_encode(form3_mem_reg(dst, src)); 7818 ins_encode(simple_form3_mem_reg(dst, src));
7814 ins_pipe(fstoreD_stk_reg); 7819 ins_pipe(fstoreD_stk_reg);
7815 %} 7820 %}
7816 7821
7817 instruct MoveL2D_reg_stack(stackSlotD dst, iRegL src) %{ 7822 instruct MoveL2D_reg_stack(stackSlotD dst, iRegL src) %{
7818 match(Set dst (MoveL2D src)); 7823 match(Set dst (MoveL2D src));
7820 ins_cost(MEMORY_REF_COST); 7825 ins_cost(MEMORY_REF_COST);
7821 7826
7822 size(4); 7827 size(4);
7823 format %{ "STX $src,$dst\t!MoveL2D" %} 7828 format %{ "STX $src,$dst\t!MoveL2D" %}
7824 opcode(Assembler::stx_op3); 7829 opcode(Assembler::stx_op3);
7825 ins_encode( form3_mem_reg( dst, src ) ); 7830 ins_encode(simple_form3_mem_reg( dst, src ) );
7826 ins_pipe(istore_mem_reg); 7831 ins_pipe(istore_mem_reg);
7827 %} 7832 %}
7828 7833
7829 7834
7830 //----------- 7835 //-----------