Mercurial > hg > truffle
comparison src/cpu/x86/vm/macroAssembler_x86.cpp @ 7458:4daebd4cc1dd
Merge
author | minqi |
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date | Mon, 24 Dec 2012 11:46:38 -0800 |
parents | d02120b7a34f |
children | 00af3a3a8df4 |
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7457:35431a769282 | 7458:4daebd4cc1dd |
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1021 movptr(dst, rscratch1); | 1021 movptr(dst, rscratch1); |
1022 } | 1022 } |
1023 | 1023 |
1024 void MacroAssembler::leave() { | 1024 void MacroAssembler::leave() { |
1025 // %%% is this really better? Why not on 32bit too? | 1025 // %%% is this really better? Why not on 32bit too? |
1026 emit_byte(0xC9); // LEAVE | 1026 emit_int8((unsigned char)0xC9); // LEAVE |
1027 } | 1027 } |
1028 | 1028 |
1029 void MacroAssembler::lneg(Register hi, Register lo) { | 1029 void MacroAssembler::lneg(Register hi, Register lo) { |
1030 ShouldNotReachHere(); // 64bit doesn't use two regs | 1030 ShouldNotReachHere(); // 64bit doesn't use two regs |
1031 negq(lo); | 1031 negq(lo); |
2110 // A 5 byte nop that is safe for patching (see patch_verified_entry) | 2110 // A 5 byte nop that is safe for patching (see patch_verified_entry) |
2111 void MacroAssembler::fat_nop() { | 2111 void MacroAssembler::fat_nop() { |
2112 if (UseAddressNop) { | 2112 if (UseAddressNop) { |
2113 addr_nop_5(); | 2113 addr_nop_5(); |
2114 } else { | 2114 } else { |
2115 emit_byte(0x26); // es: | 2115 emit_int8(0x26); // es: |
2116 emit_byte(0x2e); // cs: | 2116 emit_int8(0x2e); // cs: |
2117 emit_byte(0x64); // fs: | 2117 emit_int8(0x64); // fs: |
2118 emit_byte(0x65); // gs: | 2118 emit_int8(0x65); // gs: |
2119 emit_byte(0x90); | 2119 emit_int8((unsigned char)0x90); |
2120 } | 2120 } |
2121 } | 2121 } |
2122 | 2122 |
2123 void MacroAssembler::fcmp(Register tmp) { | 2123 void MacroAssembler::fcmp(Register tmp) { |
2124 fcmp(tmp, 1, true, true); | 2124 fcmp(tmp, 1, true, true); |
2532 const int short_size = 2; | 2532 const int short_size = 2; |
2533 const int long_size = 6; | 2533 const int long_size = 6; |
2534 int offs = (intptr_t)dst.target() - ((intptr_t)pc()); | 2534 int offs = (intptr_t)dst.target() - ((intptr_t)pc()); |
2535 if (dst.reloc() == relocInfo::none && is8bit(offs - short_size)) { | 2535 if (dst.reloc() == relocInfo::none && is8bit(offs - short_size)) { |
2536 // 0111 tttn #8-bit disp | 2536 // 0111 tttn #8-bit disp |
2537 emit_byte(0x70 | cc); | 2537 emit_int8(0x70 | cc); |
2538 emit_byte((offs - short_size) & 0xFF); | 2538 emit_int8((offs - short_size) & 0xFF); |
2539 } else { | 2539 } else { |
2540 // 0000 1111 1000 tttn #32-bit disp | 2540 // 0000 1111 1000 tttn #32-bit disp |
2541 emit_byte(0x0F); | 2541 emit_int8(0x0F); |
2542 emit_byte(0x80 | cc); | 2542 emit_int8((unsigned char)(0x80 | cc)); |
2543 emit_long(offs - long_size); | 2543 emit_long(offs - long_size); |
2544 } | 2544 } |
2545 } else { | 2545 } else { |
2546 #ifdef ASSERT | 2546 #ifdef ASSERT |
2547 warning("reversing conditional branch"); | 2547 warning("reversing conditional branch"); |
3083 } | 3083 } |
3084 } | 3084 } |
3085 | 3085 |
3086 void MacroAssembler::pshufb(XMMRegister dst, AddressLiteral src) { | 3086 void MacroAssembler::pshufb(XMMRegister dst, AddressLiteral src) { |
3087 // Used in sign-bit flipping with aligned address. | 3087 // Used in sign-bit flipping with aligned address. |
3088 assert((UseAVX > 0) || (((intptr_t)src.target() & 15) == 0), "SSE mode requires address alignment 16 bytes"); | 3088 bool aligned_adr = (((intptr_t)src.target() & 15) == 0); |
3089 assert((UseAVX > 0) || aligned_adr, "SSE mode requires address alignment 16 bytes"); | |
3089 if (reachable(src)) { | 3090 if (reachable(src)) { |
3090 Assembler::pshufb(dst, as_Address(src)); | 3091 Assembler::pshufb(dst, as_Address(src)); |
3091 } else { | 3092 } else { |
3092 lea(rscratch1, src); | 3093 lea(rscratch1, src); |
3093 Assembler::pshufb(dst, Address(rscratch1, 0)); | 3094 Assembler::pshufb(dst, Address(rscratch1, 0)); |