Mercurial > hg > truffle
comparison src/cpu/sparc/vm/vm_version_sparc.hpp @ 18041:52b4284cb496
Merge with jdk8u20-b26
author | Gilles Duboscq <duboscq@ssw.jku.at> |
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date | Wed, 15 Oct 2014 16:02:50 +0200 |
parents | 89152779163c |
children | 7848fc12602b |
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17606:45d7b2c7029d | 18041:52b4284cb496 |
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47 vis3_instructions = 12, | 47 vis3_instructions = 12, |
48 cbcond_instructions = 13, | 48 cbcond_instructions = 13, |
49 sparc64_family = 14, | 49 sparc64_family = 14, |
50 M_family = 15, | 50 M_family = 15, |
51 T_family = 16, | 51 T_family = 16, |
52 T1_model = 17 | 52 T1_model = 17, |
53 sparc5_instructions = 18, | |
54 aes_instructions = 19 | |
53 }; | 55 }; |
54 | 56 |
55 enum Feature_Flag_Set { | 57 enum Feature_Flag_Set { |
56 unknown_m = 0, | 58 unknown_m = 0, |
57 all_features_m = -1, | 59 all_features_m = -1, |
72 cbcond_instructions_m = 1 << cbcond_instructions, | 74 cbcond_instructions_m = 1 << cbcond_instructions, |
73 sparc64_family_m = 1 << sparc64_family, | 75 sparc64_family_m = 1 << sparc64_family, |
74 M_family_m = 1 << M_family, | 76 M_family_m = 1 << M_family, |
75 T_family_m = 1 << T_family, | 77 T_family_m = 1 << T_family, |
76 T1_model_m = 1 << T1_model, | 78 T1_model_m = 1 << T1_model, |
79 sparc5_instructions_m = 1 << sparc5_instructions, | |
80 aes_instructions_m = 1 << aes_instructions, | |
77 | 81 |
78 generic_v8_m = v8_instructions_m | hardware_mul32_m | hardware_div32_m | hardware_fsmuld_m, | 82 generic_v8_m = v8_instructions_m | hardware_mul32_m | hardware_div32_m | hardware_fsmuld_m, |
79 generic_v9_m = generic_v8_m | v9_instructions_m, | 83 generic_v9_m = generic_v8_m | v9_instructions_m, |
80 ultra3_m = generic_v9_m | vis1_instructions_m | vis2_instructions_m, | 84 ultra3_m = generic_v9_m | vis1_instructions_m | vis2_instructions_m, |
81 | 85 |
122 static bool has_vis1() { return (_features & vis1_instructions_m) != 0; } | 126 static bool has_vis1() { return (_features & vis1_instructions_m) != 0; } |
123 static bool has_vis2() { return (_features & vis2_instructions_m) != 0; } | 127 static bool has_vis2() { return (_features & vis2_instructions_m) != 0; } |
124 static bool has_vis3() { return (_features & vis3_instructions_m) != 0; } | 128 static bool has_vis3() { return (_features & vis3_instructions_m) != 0; } |
125 static bool has_blk_init() { return (_features & blk_init_instructions_m) != 0; } | 129 static bool has_blk_init() { return (_features & blk_init_instructions_m) != 0; } |
126 static bool has_cbcond() { return (_features & cbcond_instructions_m) != 0; } | 130 static bool has_cbcond() { return (_features & cbcond_instructions_m) != 0; } |
131 static bool has_sparc5_instr() { return (_features & sparc5_instructions_m) != 0; } | |
132 static bool has_aes() { return (_features & aes_instructions_m) != 0; } | |
127 | 133 |
128 static bool supports_compare_and_exchange() | 134 static bool supports_compare_and_exchange() |
129 { return has_v9(); } | 135 { return has_v9(); } |
130 | 136 |
131 // Returns true if the platform is in the niagara line (T series) | 137 // Returns true if the platform is in the niagara line (T series) |
132 // and newer than the niagara1. | 138 // and newer than the niagara1. |
133 static bool is_niagara_plus() { return is_T_family(_features) && !is_T1_model(_features); } | 139 static bool is_niagara_plus() { return is_T_family(_features) && !is_T1_model(_features); } |
134 | 140 |
135 static bool is_M_series() { return is_M_family(_features); } | 141 static bool is_M_series() { return is_M_family(_features); } |
136 static bool is_T4() { return is_T_family(_features) && has_cbcond(); } | 142 static bool is_T4() { return is_T_family(_features) && has_cbcond(); } |
143 static bool is_T7() { return is_T_family(_features) && has_sparc5_instr(); } | |
137 | 144 |
138 // Fujitsu SPARC64 | 145 // Fujitsu SPARC64 |
139 static bool is_sparc64() { return (_features & sparc64_family_m) != 0; } | 146 static bool is_sparc64() { return (_features & sparc64_family_m) != 0; } |
140 | 147 |
141 static bool is_sun4v() { return (_features & sun4v_m) != 0; } | 148 static bool is_sun4v() { return (_features & sun4v_m) != 0; } |
151 static bool has_block_zeroing() { return has_blk_init() && is_T4(); } | 158 static bool has_block_zeroing() { return has_blk_init() && is_T4(); } |
152 | 159 |
153 static const char* cpu_features() { return _features_str; } | 160 static const char* cpu_features() { return _features_str; } |
154 | 161 |
155 static intx prefetch_data_size() { | 162 static intx prefetch_data_size() { |
156 return is_T4() ? 32 : 64; // default prefetch block size on sparc | 163 return is_T4() && !is_T7() ? 32 : 64; // default prefetch block size on sparc |
157 } | 164 } |
158 | 165 |
159 // Prefetch | 166 // Prefetch |
160 static intx prefetch_copy_interval_in_bytes() { | 167 static intx prefetch_copy_interval_in_bytes() { |
161 intx interval = PrefetchCopyIntervalInBytes; | 168 intx interval = PrefetchCopyIntervalInBytes; |