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comparison src/cpu/sparc/vm/sparc.ad @ 2012:5fe0781a8560

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7004925: CTW: assert(nbits == 32 || -(1 << nbits-1) <= x && x < ( 1 << nbits-1)) failed: value out of range Summary: Set offset in register if it does not fit 13 bits. Reviewed-by: iveresov
author kvn
date Tue, 07 Dec 2010 11:00:02 -0800
parents 2f644f85485d
children 7737fa7ec2b5
comparison
equal deleted inserted replaced
2011:dad31fc330cd 2012:5fe0781a8560
6092 instruct loadConP_load(iRegP dst, immP_load con) %{ 6092 instruct loadConP_load(iRegP dst, immP_load con) %{
6093 match(Set dst con); 6093 match(Set dst con);
6094 ins_cost(MEMORY_REF_COST); 6094 ins_cost(MEMORY_REF_COST);
6095 format %{ "LD [$constanttablebase + $constantoffset],$dst\t! load from constant table: ptr=$con" %} 6095 format %{ "LD [$constanttablebase + $constantoffset],$dst\t! load from constant table: ptr=$con" %}
6096 ins_encode %{ 6096 ins_encode %{
6097 __ ld_ptr($constanttablebase, $constantoffset($con), $dst$$Register); 6097 RegisterOrConstant con_offset = __ ensure_simm13_or_reg($constantoffset($con), $dst$$Register);
6098 __ ld_ptr($constanttablebase, con_offset, $dst$$Register);
6098 %} 6099 %}
6099 ins_pipe(loadConP); 6100 ins_pipe(loadConP);
6100 %} 6101 %}
6101 #endif // _LP64 6102 #endif // _LP64
6102 6103
6160 instruct loadConL_ldx(iRegL dst, immL_expensive con) %{ 6161 instruct loadConL_ldx(iRegL dst, immL_expensive con) %{
6161 match(Set dst con); 6162 match(Set dst con);
6162 ins_cost(MEMORY_REF_COST); 6163 ins_cost(MEMORY_REF_COST);
6163 format %{ "LDX [$constanttablebase + $constantoffset],$dst\t! load from constant table: long=$con" %} 6164 format %{ "LDX [$constanttablebase + $constantoffset],$dst\t! load from constant table: long=$con" %}
6164 ins_encode %{ 6165 ins_encode %{
6165 __ ldx($constanttablebase, $constantoffset($con), $dst$$Register); 6166 RegisterOrConstant con_offset = __ ensure_simm13_or_reg($constantoffset($con), $dst$$Register);
6167 __ ldx($constanttablebase, con_offset, $dst$$Register);
6166 %} 6168 %}
6167 ins_pipe(loadConL); 6169 ins_pipe(loadConL);
6168 %} 6170 %}
6169 6171
6170 instruct loadConL0( iRegL dst, immL0 src ) %{ 6172 instruct loadConL0( iRegL dst, immL0 src ) %{
6184 format %{ "MOV $src,$dst\t! long" %} 6186 format %{ "MOV $src,$dst\t! long" %}
6185 ins_encode( Set13( src, dst ) ); 6187 ins_encode( Set13( src, dst ) );
6186 ins_pipe(ialu_imm); 6188 ins_pipe(ialu_imm);
6187 %} 6189 %}
6188 6190
6189 instruct loadConF(regF dst, immF con) %{ 6191 instruct loadConF(regF dst, immF con, o7RegI tmp) %{
6190 match(Set dst con); 6192 match(Set dst con);
6191 size(4); 6193 effect(KILL tmp);
6192 format %{ "LDF [$constanttablebase + $constantoffset],$dst\t! load from constant table: float=$con" %} 6194 format %{ "LDF [$constanttablebase + $constantoffset],$dst\t! load from constant table: float=$con" %}
6193 ins_encode %{ 6195 ins_encode %{
6194 __ ldf(FloatRegisterImpl::S, $constanttablebase, $constantoffset($con), $dst$$FloatRegister); 6196 RegisterOrConstant con_offset = __ ensure_simm13_or_reg($constantoffset($con), $tmp$$Register);
6197 __ ldf(FloatRegisterImpl::S, $constanttablebase, con_offset, $dst$$FloatRegister);
6195 %} 6198 %}
6196 ins_pipe(loadConFD); 6199 ins_pipe(loadConFD);
6197 %} 6200 %}
6198 6201
6199 instruct loadConD(regD dst, immD con) %{ 6202 instruct loadConD(regD dst, immD con, o7RegI tmp) %{
6200 match(Set dst con); 6203 match(Set dst con);
6201 size(4); 6204 effect(KILL tmp);
6202 format %{ "LDDF [$constanttablebase + $constantoffset],$dst\t! load from constant table: double=$con" %} 6205 format %{ "LDDF [$constanttablebase + $constantoffset],$dst\t! load from constant table: double=$con" %}
6203 ins_encode %{ 6206 ins_encode %{
6204 // XXX This is a quick fix for 6833573. 6207 // XXX This is a quick fix for 6833573.
6205 //__ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset($con), $dst$$FloatRegister); 6208 //__ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset($con), $dst$$FloatRegister);
6206 __ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset($con), as_DoubleFloatRegister($dst$$reg)); 6209 RegisterOrConstant con_offset = __ ensure_simm13_or_reg($constantoffset($con), $tmp$$Register);
6210 __ ldf(FloatRegisterImpl::D, $constanttablebase, con_offset, as_DoubleFloatRegister($dst$$reg));
6207 %} 6211 %}
6208 ins_pipe(loadConFD); 6212 ins_pipe(loadConFD);
6209 %} 6213 %}
6210 6214
6211 // Prefetch instructions. 6215 // Prefetch instructions.
8653 regL_to_stkD(dst, tmp); 8657 regL_to_stkD(dst, tmp);
8654 %} 8658 %}
8655 %} 8659 %}
8656 8660
8657 // Replicate scalar constant to packed byte values in Double register 8661 // Replicate scalar constant to packed byte values in Double register
8658 instruct Repl8B_immI(regD dst, immI13 con) %{ 8662 instruct Repl8B_immI(regD dst, immI13 con, o7RegI tmp) %{
8659 match(Set dst (Replicate8B con)); 8663 match(Set dst (Replicate8B con));
8660 size(4); 8664 effect(KILL tmp);
8661 format %{ "LDDF [$constanttablebase + $constantoffset],$dst\t! load from constant table: Repl8B($con)" %} 8665 format %{ "LDDF [$constanttablebase + $constantoffset],$dst\t! load from constant table: Repl8B($con)" %}
8662 ins_encode %{ 8666 ins_encode %{
8663 // XXX This is a quick fix for 6833573. 8667 // XXX This is a quick fix for 6833573.
8664 //__ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset(replicate_immI($con$$constant, 8, 1)), $dst$$FloatRegister); 8668 //__ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset(replicate_immI($con$$constant, 8, 1)), $dst$$FloatRegister);
8665 __ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset(replicate_immI($con$$constant, 8, 1)), as_DoubleFloatRegister($dst$$reg)); 8669 RegisterOrConstant con_offset = __ ensure_simm13_or_reg($constantoffset(replicate_immI($con$$constant, 8, 1)), $tmp$$Register);
8670 __ ldf(FloatRegisterImpl::D, $constanttablebase, con_offset, as_DoubleFloatRegister($dst$$reg));
8666 %} 8671 %}
8667 ins_pipe(loadConFD); 8672 ins_pipe(loadConFD);
8668 %} 8673 %}
8669 8674
8670 // Replicate scalar to packed char values into stack slot 8675 // Replicate scalar to packed char values into stack slot
8688 regL_to_stkD(dst, tmp); 8693 regL_to_stkD(dst, tmp);
8689 %} 8694 %}
8690 %} 8695 %}
8691 8696
8692 // Replicate scalar constant to packed char values in Double register 8697 // Replicate scalar constant to packed char values in Double register
8693 instruct Repl4C_immI(regD dst, immI con) %{ 8698 instruct Repl4C_immI(regD dst, immI con, o7RegI tmp) %{
8694 match(Set dst (Replicate4C con)); 8699 match(Set dst (Replicate4C con));
8695 size(4); 8700 effect(KILL tmp);
8696 format %{ "LDDF [$constanttablebase + $constantoffset],$dst\t! load from constant table: Repl4C($con)" %} 8701 format %{ "LDDF [$constanttablebase + $constantoffset],$dst\t! load from constant table: Repl4C($con)" %}
8697 ins_encode %{ 8702 ins_encode %{
8698 // XXX This is a quick fix for 6833573. 8703 // XXX This is a quick fix for 6833573.
8699 //__ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset(replicate_immI($con$$constant, 4, 2)), $dst$$FloatRegister); 8704 //__ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset(replicate_immI($con$$constant, 4, 2)), $dst$$FloatRegister);
8700 __ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset(replicate_immI($con$$constant, 4, 2)), as_DoubleFloatRegister($dst$$reg)); 8705 RegisterOrConstant con_offset = __ ensure_simm13_or_reg($constantoffset(replicate_immI($con$$constant, 4, 2)), $tmp$$Register);
8706 __ ldf(FloatRegisterImpl::D, $constanttablebase, con_offset, as_DoubleFloatRegister($dst$$reg));
8701 %} 8707 %}
8702 ins_pipe(loadConFD); 8708 ins_pipe(loadConFD);
8703 %} 8709 %}
8704 8710
8705 // Replicate scalar to packed short values into stack slot 8711 // Replicate scalar to packed short values into stack slot
8723 regL_to_stkD(dst, tmp); 8729 regL_to_stkD(dst, tmp);
8724 %} 8730 %}
8725 %} 8731 %}
8726 8732
8727 // Replicate scalar constant to packed short values in Double register 8733 // Replicate scalar constant to packed short values in Double register
8728 instruct Repl4S_immI(regD dst, immI con) %{ 8734 instruct Repl4S_immI(regD dst, immI con, o7RegI tmp) %{
8729 match(Set dst (Replicate4S con)); 8735 match(Set dst (Replicate4S con));
8730 size(4); 8736 effect(KILL tmp);
8731 format %{ "LDDF [$constanttablebase + $constantoffset],$dst\t! load from constant table: Repl4S($con)" %} 8737 format %{ "LDDF [$constanttablebase + $constantoffset],$dst\t! load from constant table: Repl4S($con)" %}
8732 ins_encode %{ 8738 ins_encode %{
8733 // XXX This is a quick fix for 6833573. 8739 // XXX This is a quick fix for 6833573.
8734 //__ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset(replicate_immI($con$$constant, 4, 2)), $dst$$FloatRegister); 8740 //__ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset(replicate_immI($con$$constant, 4, 2)), $dst$$FloatRegister);
8735 __ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset(replicate_immI($con$$constant, 4, 2)), as_DoubleFloatRegister($dst$$reg)); 8741 RegisterOrConstant con_offset = __ ensure_simm13_or_reg($constantoffset(replicate_immI($con$$constant, 4, 2)), $tmp$$Register);
8742 __ ldf(FloatRegisterImpl::D, $constanttablebase, con_offset, as_DoubleFloatRegister($dst$$reg));
8736 %} 8743 %}
8737 ins_pipe(loadConFD); 8744 ins_pipe(loadConFD);
8738 %} 8745 %}
8739 8746
8740 // Replicate scalar to packed int values in Double register 8747 // Replicate scalar to packed int values in Double register
8756 regL_to_stkD(dst, tmp); 8763 regL_to_stkD(dst, tmp);
8757 %} 8764 %}
8758 %} 8765 %}
8759 8766
8760 // Replicate scalar zero constant to packed int values in Double register 8767 // Replicate scalar zero constant to packed int values in Double register
8761 instruct Repl2I_immI(regD dst, immI con) %{ 8768 instruct Repl2I_immI(regD dst, immI con, o7RegI tmp) %{
8762 match(Set dst (Replicate2I con)); 8769 match(Set dst (Replicate2I con));
8763 size(4); 8770 effect(KILL tmp);
8764 format %{ "LDDF [$constanttablebase + $constantoffset],$dst\t! load from constant table: Repl2I($con)" %} 8771 format %{ "LDDF [$constanttablebase + $constantoffset],$dst\t! load from constant table: Repl2I($con)" %}
8765 ins_encode %{ 8772 ins_encode %{
8766 // XXX This is a quick fix for 6833573. 8773 // XXX This is a quick fix for 6833573.
8767 //__ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset(replicate_immI($con$$constant, 2, 4)), $dst$$FloatRegister); 8774 //__ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset(replicate_immI($con$$constant, 2, 4)), $dst$$FloatRegister);
8768 __ ldf(FloatRegisterImpl::D, $constanttablebase, $constantoffset(replicate_immI($con$$constant, 2, 4)), as_DoubleFloatRegister($dst$$reg)); 8775 RegisterOrConstant con_offset = __ ensure_simm13_or_reg($constantoffset(replicate_immI($con$$constant, 2, 4)), $tmp$$Register);
8776 __ ldf(FloatRegisterImpl::D, $constanttablebase, con_offset, as_DoubleFloatRegister($dst$$reg));
8769 %} 8777 %}
8770 ins_pipe(loadConFD); 8778 ins_pipe(loadConFD);
8771 %} 8779 %}
8772 8780
8773 //----------Control Flow Instructions------------------------------------------ 8781 //----------Control Flow Instructions------------------------------------------
9032 Register label_reg = O7; 9040 Register label_reg = O7;
9033 if (constant_offset() == 0) { 9041 if (constant_offset() == 0) {
9034 table_reg = $constanttablebase; 9042 table_reg = $constanttablebase;
9035 } else { 9043 } else {
9036 table_reg = O7; 9044 table_reg = O7;
9037 __ add($constanttablebase, $constantoffset, table_reg); 9045 RegisterOrConstant con_offset = __ ensure_simm13_or_reg($constantoffset, O7);
9046 __ add($constanttablebase, con_offset, table_reg);
9038 } 9047 }
9039 9048
9040 // Jump to base address + switch value 9049 // Jump to base address + switch value
9041 __ ld_ptr(table_reg, $switch_val$$Register, label_reg); 9050 __ ld_ptr(table_reg, $switch_val$$Register, label_reg);
9042 __ jmp(label_reg, G0); 9051 __ jmp(label_reg, G0);