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comparison src/cpu/x86/vm/vm_version_x86.cpp @ 3787:6ae7a1561b53

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6990015: Incorrect Icache line size is used for 64 bit x86 Summary: correct Icache::line_size for x64 and add verification code into vm_version_x86. Reviewed-by: never, phh
author kvn
date Tue, 28 Jun 2011 15:04:39 -0700
parents 2a34a4fbc52c
children 1af104d6cf99 3be7439273c5
comparison
equal deleted inserted replaced
3786:498c6cf70f7e 3787:6ae7a1561b53
319 } 319 }
320 // in 64 bit the use of SSE2 is the minimum 320 // in 64 bit the use of SSE2 is the minimum
321 if (UseSSE < 2) UseSSE = 2; 321 if (UseSSE < 2) UseSSE = 2;
322 #endif 322 #endif
323 323
324 #ifdef AMD64
325 // flush_icache_stub have to be generated first.
326 // That is why Icache line size is hard coded in ICache class,
327 // see icache_x86.hpp. It is also the reason why we can't use
328 // clflush instruction in 32-bit VM since it could be running
329 // on CPU which does not support it.
330 //
331 // The only thing we can do is to verify that flushed
332 // ICache::line_size has correct value.
333 guarantee(_cpuid_info.std_cpuid1_edx.bits.clflush != 0, "clflush is not supported");
334 // clflush_size is size in quadwords (8 bytes).
335 guarantee(_cpuid_info.std_cpuid1_ebx.bits.clflush_size == 8, "such clflush size is not supported");
336 #endif
337
324 // If the OS doesn't support SSE, we can't use this feature even if the HW does 338 // If the OS doesn't support SSE, we can't use this feature even if the HW does
325 if (!os::supports_sse()) 339 if (!os::supports_sse())
326 _cpuFeatures &= ~(CPU_SSE|CPU_SSE2|CPU_SSE3|CPU_SSSE3|CPU_SSE4A|CPU_SSE4_1|CPU_SSE4_2); 340 _cpuFeatures &= ~(CPU_SSE|CPU_SSE2|CPU_SSE3|CPU_SSSE3|CPU_SSE4A|CPU_SSE4_1|CPU_SSE4_2);
327 341
328 if (UseSSE < 4) { 342 if (UseSSE < 4) {