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comparison src/cpu/x86/vm/assembler_x86.cpp @ 11173:6b0fd0964b87

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Merge with http://hg.openjdk.java.net/hsx/hsx25/hotspot/
author Doug Simon <doug.simon@oracle.com>
date Wed, 31 Jul 2013 11:00:54 +0200
parents 89e4d67fdd2a b800986664f4
children cefad50507d8
comparison
equal deleted inserted replaced
10912:4ea54634f03e 11173:6b0fd0964b87
1 /* 1 /*
2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. 2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 * 4 *
5 * This code is free software; you can redistribute it and/or modify it 5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as 6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation. 7 * published by the Free Software Foundation.
1671 void Assembler::movdqa(XMMRegister dst, XMMRegister src) { 1671 void Assembler::movdqa(XMMRegister dst, XMMRegister src) {
1672 NOT_LP64(assert(VM_Version::supports_sse2(), "")); 1672 NOT_LP64(assert(VM_Version::supports_sse2(), ""));
1673 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_66); 1673 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_66);
1674 } 1674 }
1675 1675
1676 void Assembler::movdqa(XMMRegister dst, Address src) {
1677 NOT_LP64(assert(VM_Version::supports_sse2(), ""));
1678 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_66);
1679 }
1680
1676 void Assembler::movdqu(XMMRegister dst, Address src) { 1681 void Assembler::movdqu(XMMRegister dst, Address src) {
1677 NOT_LP64(assert(VM_Version::supports_sse2(), "")); 1682 NOT_LP64(assert(VM_Version::supports_sse2(), ""));
1678 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_F3); 1683 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_F3);
1679 } 1684 }
1680 1685
2284 emit_int8(0x61); 2289 emit_int8(0x61);
2285 emit_int8((unsigned char)(0xC0 | encode)); 2290 emit_int8((unsigned char)(0xC0 | encode));
2286 emit_int8(imm8); 2291 emit_int8(imm8);
2287 } 2292 }
2288 2293
2294 void Assembler::pextrd(Register dst, XMMRegister src, int imm8) {
2295 assert(VM_Version::supports_sse4_1(), "");
2296 int encode = simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, false);
2297 emit_int8(0x16);
2298 emit_int8((unsigned char)(0xC0 | encode));
2299 emit_int8(imm8);
2300 }
2301
2302 void Assembler::pextrq(Register dst, XMMRegister src, int imm8) {
2303 assert(VM_Version::supports_sse4_1(), "");
2304 int encode = simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, true);
2305 emit_int8(0x16);
2306 emit_int8((unsigned char)(0xC0 | encode));
2307 emit_int8(imm8);
2308 }
2309
2310 void Assembler::pinsrd(XMMRegister dst, Register src, int imm8) {
2311 assert(VM_Version::supports_sse4_1(), "");
2312 int encode = simd_prefix_and_encode(dst, dst, as_XMMRegister(src->encoding()), VEX_SIMD_66, VEX_OPCODE_0F_3A, false);
2313 emit_int8(0x22);
2314 emit_int8((unsigned char)(0xC0 | encode));
2315 emit_int8(imm8);
2316 }
2317
2318 void Assembler::pinsrq(XMMRegister dst, Register src, int imm8) {
2319 assert(VM_Version::supports_sse4_1(), "");
2320 int encode = simd_prefix_and_encode(dst, dst, as_XMMRegister(src->encoding()), VEX_SIMD_66, VEX_OPCODE_0F_3A, true);
2321 emit_int8(0x22);
2322 emit_int8((unsigned char)(0xC0 | encode));
2323 emit_int8(imm8);
2324 }
2325
2289 void Assembler::pmovzxbw(XMMRegister dst, Address src) { 2326 void Assembler::pmovzxbw(XMMRegister dst, Address src) {
2290 assert(VM_Version::supports_sse4_1(), ""); 2327 assert(VM_Version::supports_sse4_1(), "");
2291 InstructionMark im(this); 2328 InstructionMark im(this);
2292 simd_prefix(dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); 2329 simd_prefix(dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38);
2293 emit_int8(0x30); 2330 emit_int8(0x30);
3687 assert(VM_Version::supports_avx2(), ""); 3724 assert(VM_Version::supports_avx2(), "");
3688 bool vector256 = true; 3725 bool vector256 = true;
3689 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38); 3726 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38);
3690 emit_int8(0x58); 3727 emit_int8(0x58);
3691 emit_int8((unsigned char)(0xC0 | encode)); 3728 emit_int8((unsigned char)(0xC0 | encode));
3729 }
3730
3731 // Carry-Less Multiplication Quadword
3732 void Assembler::vpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask) {
3733 assert(VM_Version::supports_avx() && VM_Version::supports_clmul(), "");
3734 bool vector256 = false;
3735 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A);
3736 emit_int8(0x44);
3737 emit_int8((unsigned char)(0xC0 | encode));
3738 emit_int8((unsigned char)mask);
3692 } 3739 }
3693 3740
3694 void Assembler::vzeroupper() { 3741 void Assembler::vzeroupper() {
3695 assert(VM_Version::supports_avx(), ""); 3742 assert(VM_Version::supports_avx(), "");
3696 (void)vex_prefix_and_encode(xmm0, xmm0, xmm0, VEX_SIMD_NONE); 3743 (void)vex_prefix_and_encode(xmm0, xmm0, xmm0, VEX_SIMD_NONE);