Mercurial > hg > truffle
comparison src/share/vm/opto/compile.cpp @ 418:72c5366e5d86
6743900: frequency based block layout
Summary: post-register allocation pass that drives block layout by edge frequencies
Reviewed-by: never, kvn
author | rasbold |
---|---|
date | Thu, 06 Nov 2008 14:59:10 -0800 |
parents | f4fe12e429a4 |
children | a1980da045cc |
comparison
equal
deleted
inserted
replaced
417:f4fe12e429a4 | 418:72c5366e5d86 |
---|---|
820 _major_progress = true; // start out assuming good things will happen | 820 _major_progress = true; // start out assuming good things will happen |
821 set_has_unsafe_access(false); | 821 set_has_unsafe_access(false); |
822 Copy::zero_to_bytes(_trap_hist, sizeof(_trap_hist)); | 822 Copy::zero_to_bytes(_trap_hist, sizeof(_trap_hist)); |
823 set_decompile_count(0); | 823 set_decompile_count(0); |
824 | 824 |
825 set_do_freq_based_layout(BlockLayoutByFrequency || method_has_option("BlockLayoutByFrequency")); | |
825 // Compilation level related initialization | 826 // Compilation level related initialization |
826 if (env()->comp_level() == CompLevel_fast_compile) { | 827 if (env()->comp_level() == CompLevel_fast_compile) { |
827 set_num_loop_opts(Tier1LoopOptsCount); | 828 set_num_loop_opts(Tier1LoopOptsCount); |
828 set_do_inlining(Tier1Inline != 0); | 829 set_do_inlining(Tier1Inline != 0); |
829 set_max_inline_size(Tier1MaxInlineSize); | 830 set_max_inline_size(Tier1MaxInlineSize); |
1699 // Prior to register allocation we kept empty basic blocks in case the | 1700 // Prior to register allocation we kept empty basic blocks in case the |
1700 // the allocator needed a place to spill. After register allocation we | 1701 // the allocator needed a place to spill. After register allocation we |
1701 // are not adding any new instructions. If any basic block is empty, we | 1702 // are not adding any new instructions. If any basic block is empty, we |
1702 // can now safely remove it. | 1703 // can now safely remove it. |
1703 { | 1704 { |
1704 NOT_PRODUCT( TracePhase t2("removeEmpty", &_t_removeEmptyBlocks, TimeCompiler); ) | 1705 NOT_PRODUCT( TracePhase t2("blockOrdering", &_t_blockOrdering, TimeCompiler); ) |
1705 cfg.RemoveEmpty(); | 1706 cfg.remove_empty(); |
1707 if (do_freq_based_layout()) { | |
1708 PhaseBlockLayout layout(cfg); | |
1709 } else { | |
1710 cfg.set_loop_alignment(); | |
1711 } | |
1712 cfg.fixup_flow(); | |
1706 } | 1713 } |
1707 | 1714 |
1708 // Perform any platform dependent postallocation verifications. | 1715 // Perform any platform dependent postallocation verifications. |
1709 debug_only( _regalloc->pd_postallocate_verify_hook(); ) | 1716 debug_only( _regalloc->pd_postallocate_verify_hook(); ) |
1710 | 1717 |