Mercurial > hg > truffle
comparison src/cpu/x86/vm/x86_32.ad @ 2401:7e88bdae86ec
7029017: Additional architecture support for c2 compiler
Summary: Enables cross building of a c2 VM. Support masking of shift counts when the processor architecture mandates it.
Reviewed-by: kvn, never
author | roland |
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date | Fri, 25 Mar 2011 09:35:39 +0100 |
parents | 41d4973cf100 |
children | 15c9a0e16269 |
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2399:b2949bf39900 | 2401:7e88bdae86ec |
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1390 | 1390 |
1391 // Should the Matcher clone shifts on addressing modes, expecting them to | 1391 // Should the Matcher clone shifts on addressing modes, expecting them to |
1392 // be subsumed into complex addressing expressions or compute them into | 1392 // be subsumed into complex addressing expressions or compute them into |
1393 // registers? True for Intel but false for most RISCs | 1393 // registers? True for Intel but false for most RISCs |
1394 const bool Matcher::clone_shift_expressions = true; | 1394 const bool Matcher::clone_shift_expressions = true; |
1395 | |
1396 // Do we need to mask the count passed to shift instructions or does | |
1397 // the cpu only look at the lower 5/6 bits anyway? | |
1398 const bool Matcher::need_masked_shift_count = false; | |
1395 | 1399 |
1396 bool Matcher::narrow_oop_use_complex_address() { | 1400 bool Matcher::narrow_oop_use_complex_address() { |
1397 ShouldNotCallThis(); | 1401 ShouldNotCallThis(); |
1398 return true; | 1402 return true; |
1399 } | 1403 } |