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comparison src/share/vm/adlc/formssel.hpp @ 11002:7fa25f5575c9

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8016157: During CTW: C2: assert(!def_outside->member(r)) failed: Use of external LRG overlaps the same LRG defined in this block Summary: Disable rematerialization for negD node Reviewed-by: kvn, roland
author adlertz
date Fri, 14 Jun 2013 01:19:56 +0200
parents f15fe46d8c00
children c9ccd7b85f20
comparison
equal deleted inserted replaced
11001:c52abc8a0b08 11002:7fa25f5575c9
145 virtual const char *ideal_Opcode(FormDict &globals) const; 145 virtual const char *ideal_Opcode(FormDict &globals) const;
146 virtual int is_expensive() const; // node matches ideal 'CosD' 146 virtual int is_expensive() const; // node matches ideal 'CosD'
147 virtual int is_empty_encoding() const; // _size=0 and/or _insencode empty 147 virtual int is_empty_encoding() const; // _size=0 and/or _insencode empty
148 virtual int is_tls_instruction() const; // tlsLoadP rule or ideal ThreadLocal 148 virtual int is_tls_instruction() const; // tlsLoadP rule or ideal ThreadLocal
149 virtual int is_ideal_copy() const; // node matches ideal 'Copy*' 149 virtual int is_ideal_copy() const; // node matches ideal 'Copy*'
150 virtual bool is_ideal_negD() const; // node matches ideal 'NegD'
150 virtual bool is_ideal_if() const; // node matches ideal 'If' 151 virtual bool is_ideal_if() const; // node matches ideal 'If'
151 virtual bool is_ideal_fastlock() const; // node matches 'FastLock' 152 virtual bool is_ideal_fastlock() const; // node matches 'FastLock'
152 virtual bool is_ideal_membar() const; // node matches ideal 'MemBarXXX' 153 virtual bool is_ideal_membar() const; // node matches ideal 'MemBarXXX'
153 virtual bool is_ideal_loadPC() const; // node matches ideal 'LoadPC' 154 virtual bool is_ideal_loadPC() const; // node matches ideal 'LoadPC'
154 virtual bool is_ideal_box() const; // node matches ideal 'Box' 155 virtual bool is_ideal_box() const; // node matches ideal 'Box'