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comparison src/share/vm/opto/reg_split.cpp @ 10111:8373c19be854

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8011621: live_ranges_in_separate_class.patch Reviewed-by: kvn, roland Contributed-by: niclas.adlertz@oracle.com
author neliasso
date Tue, 16 Apr 2013 10:08:41 +0200
parents 2aff40cb4703
children b274ac1dbe11
comparison
equal deleted inserted replaced
10109:1c6887c9afaa 10111:8373c19be854
316 // the inputs. 316 // the inputs.
317 if( def->req() > 1 ) { 317 if( def->req() > 1 ) {
318 for( uint i = 1; i < def->req(); i++ ) { 318 for( uint i = 1; i < def->req(); i++ ) {
319 Node *in = def->in(i); 319 Node *in = def->in(i);
320 // Check for single-def (LRG cannot redefined) 320 // Check for single-def (LRG cannot redefined)
321 uint lidx = n2lidx(in); 321 uint lidx = _lrg_map.live_range_id(in);
322 if( lidx >= _maxlrg ) continue; // Value is a recent spill-copy 322 if (lidx >= _lrg_map.max_lrg_id()) {
323 if (lrgs(lidx).is_singledef()) continue; 323 continue; // Value is a recent spill-copy
324 }
325 if (lrgs(lidx).is_singledef()) {
326 continue;
327 }
324 328
325 Block *b_def = _cfg._bbs[def->_idx]; 329 Block *b_def = _cfg._bbs[def->_idx];
326 int idx_def = b_def->find_node(def); 330 int idx_def = b_def->find_node(def);
327 Node *in_spill = get_spillcopy_wide( in, def, i ); 331 Node *in_spill = get_spillcopy_wide( in, def, i );
328 if( !in_spill ) return 0; // Bailed out 332 if( !in_spill ) return 0; // Bailed out
342 // See if any inputs are currently being spilled, and take the 346 // See if any inputs are currently being spilled, and take the
343 // latest copy of spilled inputs. 347 // latest copy of spilled inputs.
344 if( spill->req() > 1 ) { 348 if( spill->req() > 1 ) {
345 for( uint i = 1; i < spill->req(); i++ ) { 349 for( uint i = 1; i < spill->req(); i++ ) {
346 Node *in = spill->in(i); 350 Node *in = spill->in(i);
347 uint lidx = Find_id(in); 351 uint lidx = _lrg_map.find_id(in);
348 352
349 // Walk backwards thru spill copy node intermediates 353 // Walk backwards thru spill copy node intermediates
350 if (walkThru) { 354 if (walkThru) {
351 while ( in->is_SpillCopy() && lidx >= _maxlrg ) { 355 while (in->is_SpillCopy() && lidx >= _lrg_map.max_lrg_id()) {
352 in = in->in(1); 356 in = in->in(1);
353 lidx = Find_id(in); 357 lidx = _lrg_map.find_id(in);
354 } 358 }
355 359
356 if (lidx < _maxlrg && lrgs(lidx).is_multidef()) { 360 if (lidx < _lrg_map.max_lrg_id() && lrgs(lidx).is_multidef()) {
357 // walkThru found a multidef LRG, which is unsafe to use, so 361 // walkThru found a multidef LRG, which is unsafe to use, so
358 // just keep the original def used in the clone. 362 // just keep the original def used in the clone.
359 in = spill->in(i); 363 in = spill->in(i);
360 lidx = Find_id(in); 364 lidx = _lrg_map.find_id(in);
361 } 365 }
362 } 366 }
363 367
364 if( lidx < _maxlrg && lrgs(lidx).reg() >= LRG::SPILL_REG ) { 368 if (lidx < _lrg_map.max_lrg_id() && lrgs(lidx).reg() >= LRG::SPILL_REG) {
365 Node *rdef = Reachblock[lrg2reach[lidx]]; 369 Node *rdef = Reachblock[lrg2reach[lidx]];
366 if( rdef ) spill->set_req(i,rdef); 370 if (rdef) {
371 spill->set_req(i, rdef);
372 }
367 } 373 }
368 } 374 }
369 } 375 }
370 376
371 377
380 // Increment the counter for this lrg 386 // Increment the counter for this lrg
381 splits.at_put(slidx, splits.at(slidx)+1); 387 splits.at_put(slidx, splits.at(slidx)+1);
382 #endif 388 #endif
383 // See if the cloned def kills any flags, and copy those kills as well 389 // See if the cloned def kills any flags, and copy those kills as well
384 uint i = insidx+1; 390 uint i = insidx+1;
385 if( clone_projs( b, i, def, spill, maxlrg ) ) { 391 if( clone_projs( b, i, def, spill, maxlrg) ) {
386 // Adjust the point where we go hi-pressure 392 // Adjust the point where we go hi-pressure
387 if( i <= b->_ihrp_index ) b->_ihrp_index++; 393 if( i <= b->_ihrp_index ) b->_ihrp_index++;
388 if( i <= b->_fhrp_index ) b->_fhrp_index++; 394 if( i <= b->_fhrp_index ) b->_fhrp_index++;
389 } 395 }
390 396
422 428
423 429
424 //------------------------------prompt_use--------------------------------- 430 //------------------------------prompt_use---------------------------------
425 // True if lidx is used before any real register is def'd in the block 431 // True if lidx is used before any real register is def'd in the block
426 bool PhaseChaitin::prompt_use( Block *b, uint lidx ) { 432 bool PhaseChaitin::prompt_use( Block *b, uint lidx ) {
427 if( lrgs(lidx)._was_spilled2 ) return false; 433 if (lrgs(lidx)._was_spilled2) {
434 return false;
435 }
428 436
429 // Scan block for 1st use. 437 // Scan block for 1st use.
430 for( uint i = 1; i <= b->end_idx(); i++ ) { 438 for( uint i = 1; i <= b->end_idx(); i++ ) {
431 Node *n = b->_nodes[i]; 439 Node *n = b->_nodes[i];
432 // Ignore PHI use, these can be up or down 440 // Ignore PHI use, these can be up or down
433 if( n->is_Phi() ) continue; 441 if (n->is_Phi()) {
434 for( uint j = 1; j < n->req(); j++ ) 442 continue;
435 if( Find_id(n->in(j)) == lidx ) 443 }
444 for (uint j = 1; j < n->req(); j++) {
445 if (_lrg_map.find_id(n->in(j)) == lidx) {
436 return true; // Found 1st use! 446 return true; // Found 1st use!
437 if( n->out_RegMask().is_NotEmpty() ) return false; 447 }
448 }
449 if (n->out_RegMask().is_NotEmpty()) {
450 return false;
451 }
438 } 452 }
439 return false; 453 return false;
440 } 454 }
441 455
442 //------------------------------Split-------------------------------------- 456 //------------------------------Split--------------------------------------
462 Node_List *defs,*phis; 476 Node_List *defs,*phis;
463 bool *UPblock; 477 bool *UPblock;
464 bool u1, u2, u3; 478 bool u1, u2, u3;
465 Block *b, *pred; 479 Block *b, *pred;
466 PhiNode *phi; 480 PhiNode *phi;
467 GrowableArray<uint> lidxs(split_arena, _maxlrg, 0, 0); 481 GrowableArray<uint> lidxs(split_arena, maxlrg, 0, 0);
468 482
469 // Array of counters to count splits per live range 483 // Array of counters to count splits per live range
470 GrowableArray<uint> splits(split_arena, _maxlrg, 0, 0); 484 GrowableArray<uint> splits(split_arena, maxlrg, 0, 0);
471 485
472 #define NEW_SPLIT_ARRAY(type, size)\ 486 #define NEW_SPLIT_ARRAY(type, size)\
473 (type*) split_arena->allocate_bytes((size) * sizeof(type)) 487 (type*) split_arena->allocate_bytes((size) * sizeof(type))
474 488
475 //----------Setup Code---------- 489 //----------Setup Code----------
476 // Create a convenient mapping from lrg numbers to reaches/leaves indices 490 // Create a convenient mapping from lrg numbers to reaches/leaves indices
477 uint *lrg2reach = NEW_SPLIT_ARRAY( uint, _maxlrg ); 491 uint *lrg2reach = NEW_SPLIT_ARRAY(uint, maxlrg);
478 // Keep track of DEFS & Phis for later passes 492 // Keep track of DEFS & Phis for later passes
479 defs = new Node_List(); 493 defs = new Node_List();
480 phis = new Node_List(); 494 phis = new Node_List();
481 // Gather info on which LRG's are spilling, and build maps 495 // Gather info on which LRG's are spilling, and build maps
482 for( bidx = 1; bidx < _maxlrg; bidx++ ) { 496 for (bidx = 1; bidx < maxlrg; bidx++) {
483 if( lrgs(bidx).alive() && lrgs(bidx).reg() >= LRG::SPILL_REG ) { 497 if (lrgs(bidx).alive() && lrgs(bidx).reg() >= LRG::SPILL_REG) {
484 assert(!lrgs(bidx).mask().is_AllStack(),"AllStack should color"); 498 assert(!lrgs(bidx).mask().is_AllStack(),"AllStack should color");
485 lrg2reach[bidx] = spill_cnt; 499 lrg2reach[bidx] = spill_cnt;
486 spill_cnt++; 500 spill_cnt++;
487 lidxs.append(bidx); 501 lidxs.append(bidx);
488 #ifdef ASSERT 502 #ifdef ASSERT
627 non_phi = insidx; 641 non_phi = insidx;
628 // break out of the for loop as we have handled all phi nodes 642 // break out of the for loop as we have handled all phi nodes
629 break; 643 break;
630 } 644 }
631 // must be looking at a phi 645 // must be looking at a phi
632 if( Find_id(n1) == lidxs.at(slidx) ) { 646 if (_lrg_map.find_id(n1) == lidxs.at(slidx)) {
633 // found the necessary phi 647 // found the necessary phi
634 needs_phi = false; 648 needs_phi = false;
635 has_phi = true; 649 has_phi = true;
636 // initialize the Reaches entry for this LRG 650 // initialize the Reaches entry for this LRG
637 Reachblock[slidx] = phi; 651 Reachblock[slidx] = phi;
649 phi = new (C) PhiNode(b->head(), n3->bottom_type()); 663 phi = new (C) PhiNode(b->head(), n3->bottom_type());
650 // initialize the Reaches entry for this LRG 664 // initialize the Reaches entry for this LRG
651 Reachblock[slidx] = phi; 665 Reachblock[slidx] = phi;
652 666
653 // add node to block & node_to_block mapping 667 // add node to block & node_to_block mapping
654 insert_proj( b, insidx++, phi, maxlrg++ ); 668 insert_proj(b, insidx++, phi, maxlrg++);
655 non_phi++; 669 non_phi++;
656 // Reset new phi's mapping to be the spilling live range 670 // Reset new phi's mapping to be the spilling live range
657 _names.map(phi->_idx, lidx); 671 _lrg_map.map(phi->_idx, lidx);
658 assert(Find_id(phi) == lidx,"Bad update on Union-Find mapping"); 672 assert(_lrg_map.find_id(phi) == lidx, "Bad update on Union-Find mapping");
659 } // end if not found correct phi 673 } // end if not found correct phi
660 // Here you have either found or created the Phi, so record it 674 // Here you have either found or created the Phi, so record it
661 assert(phi != NULL,"Must have a Phi Node here"); 675 assert(phi != NULL,"Must have a Phi Node here");
662 phis->push(phi); 676 phis->push(phi);
663 // PhiNodes should either force the LRG UP or DOWN depending 677 // PhiNodes should either force the LRG UP or DOWN depending
719 //----------Walk Instructions in the Block and Split---------- 733 //----------Walk Instructions in the Block and Split----------
720 // For all non-phi instructions in the block 734 // For all non-phi instructions in the block
721 for( insidx = 1; insidx <= b->end_idx(); insidx++ ) { 735 for( insidx = 1; insidx <= b->end_idx(); insidx++ ) {
722 Node *n = b->_nodes[insidx]; 736 Node *n = b->_nodes[insidx];
723 // Find the defining Node's live range index 737 // Find the defining Node's live range index
724 uint defidx = Find_id(n); 738 uint defidx = _lrg_map.find_id(n);
725 uint cnt = n->req(); 739 uint cnt = n->req();
726 740
727 if( n->is_Phi() ) { 741 if (n->is_Phi()) {
728 // Skip phi nodes after removing dead copies. 742 // Skip phi nodes after removing dead copies.
729 if( defidx < _maxlrg ) { 743 if (defidx < _lrg_map.max_lrg_id()) {
730 // Check for useless Phis. These appear if we spill, then 744 // Check for useless Phis. These appear if we spill, then
731 // coalesce away copies. Dont touch Phis in spilling live 745 // coalesce away copies. Dont touch Phis in spilling live
732 // ranges; they are busy getting modifed in this pass. 746 // ranges; they are busy getting modifed in this pass.
733 if( lrgs(defidx).reg() < LRG::SPILL_REG ) { 747 if( lrgs(defidx).reg() < LRG::SPILL_REG ) {
734 uint i; 748 uint i;
742 break; 756 break;
743 u = n->in(i); // Else record it 757 u = n->in(i); // Else record it
744 } 758 }
745 } 759 }
746 assert( u, "at least 1 valid input expected" ); 760 assert( u, "at least 1 valid input expected" );
747 if( i >= cnt ) { // Found one unique input 761 if (i >= cnt) { // Found one unique input
748 assert(Find_id(n) == Find_id(u), "should be the same lrg"); 762 assert(_lrg_map.find_id(n) == _lrg_map.find_id(u), "should be the same lrg");
749 n->replace_by(u); // Then replace with unique input 763 n->replace_by(u); // Then replace with unique input
750 n->disconnect_inputs(NULL, C); 764 n->disconnect_inputs(NULL, C);
751 b->_nodes.remove(insidx); 765 b->_nodes.remove(insidx);
752 insidx--; 766 insidx--;
753 b->_ihrp_index--; 767 b->_ihrp_index--;
791 // Insert point is just past last use or def in the block 805 // Insert point is just past last use or def in the block
792 int insert_point = insidx-1; 806 int insert_point = insidx-1;
793 while( insert_point > 0 ) { 807 while( insert_point > 0 ) {
794 Node *n = b->_nodes[insert_point]; 808 Node *n = b->_nodes[insert_point];
795 // Hit top of block? Quit going backwards 809 // Hit top of block? Quit going backwards
796 if( n->is_Phi() ) break; 810 if (n->is_Phi()) {
811 break;
812 }
797 // Found a def? Better split after it. 813 // Found a def? Better split after it.
798 if( n2lidx(n) == lidx ) break; 814 if (_lrg_map.live_range_id(n) == lidx) {
815 break;
816 }
799 // Look for a use 817 // Look for a use
800 uint i; 818 uint i;
801 for( i = 1; i < n->req(); i++ ) 819 for( i = 1; i < n->req(); i++ ) {
802 if( n2lidx(n->in(i)) == lidx ) 820 if (_lrg_map.live_range_id(n->in(i)) == lidx) {
803 break; 821 break;
822 }
823 }
804 // Found a use? Better split after it. 824 // Found a use? Better split after it.
805 if( i < n->req() ) break; 825 if (i < n->req()) {
826 break;
827 }
806 insert_point--; 828 insert_point--;
807 } 829 }
808 uint orig_eidx = b->end_idx(); 830 uint orig_eidx = b->end_idx();
809 maxlrg = split_DEF( n1, b, insert_point, maxlrg, Reachblock, debug_defs, splits, slidx); 831 maxlrg = split_DEF( n1, b, insert_point, maxlrg, Reachblock, debug_defs, splits, slidx);
810 // If it wasn't split bail 832 // If it wasn't split bail
811 if (!maxlrg) { 833 if (!maxlrg) {
812 return 0; 834 return 0;
813 } 835 }
814 // Spill of NULL check mem op goes into the following block. 836 // Spill of NULL check mem op goes into the following block.
815 if (b->end_idx() > orig_eidx) 837 if (b->end_idx() > orig_eidx) {
816 insidx++; 838 insidx++;
839 }
817 } 840 }
818 // This is a new DEF, so update UP 841 // This is a new DEF, so update UP
819 UPblock[slidx] = false; 842 UPblock[slidx] = false;
820 #ifndef PRODUCT 843 #ifndef PRODUCT
821 // DEBUG 844 // DEBUG
830 } // end for all spilling live ranges 853 } // end for all spilling live ranges
831 assert( b->_nodes[insidx] == n, "got insidx set incorrectly" ); 854 assert( b->_nodes[insidx] == n, "got insidx set incorrectly" );
832 } // end if crossing HRP Boundry 855 } // end if crossing HRP Boundry
833 856
834 // If the LRG index is oob, then this is a new spillcopy, skip it. 857 // If the LRG index is oob, then this is a new spillcopy, skip it.
835 if( defidx >= _maxlrg ) { 858 if (defidx >= _lrg_map.max_lrg_id()) {
836 continue; 859 continue;
837 } 860 }
838 LRG &deflrg = lrgs(defidx); 861 LRG &deflrg = lrgs(defidx);
839 uint copyidx = n->is_Copy(); 862 uint copyidx = n->is_Copy();
840 // Remove coalesced copy from CFG 863 // Remove coalesced copy from CFG
841 if( copyidx && defidx == n2lidx(n->in(copyidx)) ) { 864 if (copyidx && defidx == _lrg_map.live_range_id(n->in(copyidx))) {
842 n->replace_by( n->in(copyidx) ); 865 n->replace_by( n->in(copyidx) );
843 n->set_req( copyidx, NULL ); 866 n->set_req( copyidx, NULL );
844 b->_nodes.remove(insidx--); 867 b->_nodes.remove(insidx--);
845 b->_ihrp_index--; // Adjust the point where we go hi-pressure 868 b->_ihrp_index--; // Adjust the point where we go hi-pressure
846 b->_fhrp_index--; 869 b->_fhrp_index--;
862 for( inpidx = 1; inpidx < cnt; inpidx++ ) { 885 for( inpidx = 1; inpidx < cnt; inpidx++ ) {
863 // Derived/base pairs may be added to our inputs during this loop. 886 // Derived/base pairs may be added to our inputs during this loop.
864 // If inpidx > old_last, then one of these new inputs is being 887 // If inpidx > old_last, then one of these new inputs is being
865 // handled. Skip the derived part of the pair, but process 888 // handled. Skip the derived part of the pair, but process
866 // the base like any other input. 889 // the base like any other input.
867 if( inpidx > old_last && ((inpidx - oopoff) & 1) == DERIVED ) { 890 if (inpidx > old_last && ((inpidx - oopoff) & 1) == DERIVED) {
868 continue; // skip derived_debug added below 891 continue; // skip derived_debug added below
869 } 892 }
870 // Get lidx of input 893 // Get lidx of input
871 uint useidx = Find_id(n->in(inpidx)); 894 uint useidx = _lrg_map.find_id(n->in(inpidx));
872 // Not a brand-new split, and it is a spill use 895 // Not a brand-new split, and it is a spill use
873 if( useidx < _maxlrg && lrgs(useidx).reg() >= LRG::SPILL_REG ) { 896 if (useidx < _lrg_map.max_lrg_id() && lrgs(useidx).reg() >= LRG::SPILL_REG) {
874 // Check for valid reaching DEF 897 // Check for valid reaching DEF
875 slidx = lrg2reach[useidx]; 898 slidx = lrg2reach[useidx];
876 Node *def = Reachblock[slidx]; 899 Node *def = Reachblock[slidx];
877 assert( def != NULL, "Using Undefined Value in Split()\n"); 900 assert( def != NULL, "Using Undefined Value in Split()\n");
878 901
884 // does not attempt to assign it a register. 907 // does not attempt to assign it a register.
885 def = clone_node(def, b, C); 908 def = clone_node(def, b, C);
886 if (def == NULL || C->check_node_count(NodeLimitFudgeFactor, out_of_nodes)) { 909 if (def == NULL || C->check_node_count(NodeLimitFudgeFactor, out_of_nodes)) {
887 return 0; 910 return 0;
888 } 911 }
889 _names.extend(def->_idx,0); 912 _lrg_map.extend(def->_idx, 0);
890 _cfg._bbs.map(def->_idx,b); 913 _cfg._bbs.map(def->_idx,b);
891 n->set_req(inpidx, def); 914 n->set_req(inpidx, def);
892 continue; 915 continue;
893 } 916 }
894 917
1184 } // End if spill def 1207 } // End if spill def
1185 1208
1186 // ********** Split Left Over Mem-Mem Moves ********** 1209 // ********** Split Left Over Mem-Mem Moves **********
1187 // Check for mem-mem copies and split them now. Do not do this 1210 // Check for mem-mem copies and split them now. Do not do this
1188 // to copies about to be spilled; they will be Split shortly. 1211 // to copies about to be spilled; they will be Split shortly.
1189 if( copyidx ) { 1212 if (copyidx) {
1190 Node *use = n->in(copyidx); 1213 Node *use = n->in(copyidx);
1191 uint useidx = Find_id(use); 1214 uint useidx = _lrg_map.find_id(use);
1192 if( useidx < _maxlrg && // This is not a new split 1215 if (useidx < _lrg_map.max_lrg_id() && // This is not a new split
1193 OptoReg::is_stack(deflrg.reg()) && 1216 OptoReg::is_stack(deflrg.reg()) &&
1194 deflrg.reg() < LRG::SPILL_REG ) { // And DEF is from stack 1217 deflrg.reg() < LRG::SPILL_REG ) { // And DEF is from stack
1195 LRG &uselrg = lrgs(useidx); 1218 LRG &uselrg = lrgs(useidx);
1196 if( OptoReg::is_stack(uselrg.reg()) && 1219 if( OptoReg::is_stack(uselrg.reg()) &&
1197 uselrg.reg() < LRG::SPILL_REG && // USE is from stack 1220 uselrg.reg() < LRG::SPILL_REG && // USE is from stack
1226 // instance may be a case to add liveout adjustment in compress_uf_map(). 1249 // instance may be a case to add liveout adjustment in compress_uf_map().
1227 // See 5063219. 1250 // See 5063219.
1228 uint member; 1251 uint member;
1229 IndexSetIterator isi(liveout); 1252 IndexSetIterator isi(liveout);
1230 while ((member = isi.next()) != 0) { 1253 while ((member = isi.next()) != 0) {
1231 assert(defidx != Find_const(member), "Live out member has not been compressed"); 1254 assert(defidx != _lrg_map.find_const(member), "Live out member has not been compressed");
1232 } 1255 }
1233 #endif 1256 #endif
1234 Reachblock[slidx] = NULL; 1257 Reachblock[slidx] = NULL;
1235 } else { 1258 } else {
1236 assert(Reachblock[slidx] != NULL,"No reaching definition for liveout value"); 1259 assert(Reachblock[slidx] != NULL,"No reaching definition for liveout value");
1259 for( insidx = 0; insidx < phis->size(); insidx++ ) { 1282 for( insidx = 0; insidx < phis->size(); insidx++ ) {
1260 Node *phi = phis->at(insidx); 1283 Node *phi = phis->at(insidx);
1261 assert(phi->is_Phi(),"This list must only contain Phi Nodes"); 1284 assert(phi->is_Phi(),"This list must only contain Phi Nodes");
1262 Block *b = _cfg._bbs[phi->_idx]; 1285 Block *b = _cfg._bbs[phi->_idx];
1263 // Grab the live range number 1286 // Grab the live range number
1264 uint lidx = Find_id(phi); 1287 uint lidx = _lrg_map.find_id(phi);
1265 uint slidx = lrg2reach[lidx]; 1288 uint slidx = lrg2reach[lidx];
1266 // Update node to lidx map 1289 // Update node to lidx map
1267 new_lrg(phi, maxlrg++); 1290 new_lrg(phi, maxlrg++);
1268 // Get PASS1's up/down decision for the block. 1291 // Get PASS1's up/down decision for the block.
1269 int phi_up = !!UP_entry[slidx]->test(b->_pre_order); 1292 int phi_up = !!UP_entry[slidx]->test(b->_pre_order);
1294 // phi node splitting. end_idx points at the insertion point 1317 // phi node splitting. end_idx points at the insertion point
1295 // so look at the node before it. 1318 // so look at the node before it.
1296 int insert = pred->end_idx(); 1319 int insert = pred->end_idx();
1297 while (insert >= 1 && 1320 while (insert >= 1 &&
1298 pred->_nodes[insert - 1]->is_SpillCopy() && 1321 pred->_nodes[insert - 1]->is_SpillCopy() &&
1299 Find(pred->_nodes[insert - 1]) >= lrgs_before_phi_split) { 1322 _lrg_map.find(pred->_nodes[insert - 1]) >= lrgs_before_phi_split) {
1300 insert--; 1323 insert--;
1301 } 1324 }
1302 def = split_Rematerialize( def, pred, insert, maxlrg, splits, slidx, lrg2reach, Reachblock, false ); 1325 def = split_Rematerialize(def, pred, insert, maxlrg, splits, slidx, lrg2reach, Reachblock, false);
1303 if( !def ) return 0; // Bail out 1326 if (!def) {
1327 return 0; // Bail out
1328 }
1304 } 1329 }
1305 // Update the Phi's input edge array 1330 // Update the Phi's input edge array
1306 phi->set_req(i,def); 1331 phi->set_req(i,def);
1307 // Grab the UP/DOWN sense for the input 1332 // Grab the UP/DOWN sense for the input
1308 u1 = UP[pidx][slidx]; 1333 u1 = UP[pidx][slidx];
1314 } 1339 }
1315 } 1340 }
1316 } // End for all inputs to the Phi 1341 } // End for all inputs to the Phi
1317 } // End for all Phi Nodes 1342 } // End for all Phi Nodes
1318 // Update _maxlrg to save Union asserts 1343 // Update _maxlrg to save Union asserts
1319 _maxlrg = maxlrg; 1344 _lrg_map.set_max_lrg_id(maxlrg);
1320 1345
1321 1346
1322 //----------PASS 3---------- 1347 //----------PASS 3----------
1323 // Pass over all Phi's to union the live ranges 1348 // Pass over all Phi's to union the live ranges
1324 for( insidx = 0; insidx < phis->size(); insidx++ ) { 1349 for( insidx = 0; insidx < phis->size(); insidx++ ) {
1326 assert(phi->is_Phi(),"This list must only contain Phi Nodes"); 1351 assert(phi->is_Phi(),"This list must only contain Phi Nodes");
1327 // Walk all inputs to Phi and Union input live range with Phi live range 1352 // Walk all inputs to Phi and Union input live range with Phi live range
1328 for( uint i = 1; i < phi->req(); i++ ) { 1353 for( uint i = 1; i < phi->req(); i++ ) {
1329 // Grab the input node 1354 // Grab the input node
1330 Node *n = phi->in(i); 1355 Node *n = phi->in(i);
1331 assert( n, "" ); 1356 assert(n, "node should exist");
1332 uint lidx = Find(n); 1357 uint lidx = _lrg_map.find(n);
1333 uint pidx = Find(phi); 1358 uint pidx = _lrg_map.find(phi);
1334 if( lidx < pidx ) 1359 if (lidx < pidx) {
1335 Union(n, phi); 1360 Union(n, phi);
1336 else if( lidx > pidx ) 1361 }
1362 else if(lidx > pidx) {
1337 Union(phi, n); 1363 Union(phi, n);
1364 }
1338 } // End for all inputs to the Phi Node 1365 } // End for all inputs to the Phi Node
1339 } // End for all Phi Nodes 1366 } // End for all Phi Nodes
1340 // Now union all two address instructions 1367 // Now union all two address instructions
1341 for( insidx = 0; insidx < defs->size(); insidx++ ) { 1368 for (insidx = 0; insidx < defs->size(); insidx++) {
1342 // Grab the def 1369 // Grab the def
1343 n1 = defs->at(insidx); 1370 n1 = defs->at(insidx);
1344 // Set new lidx for DEF & handle 2-addr instructions 1371 // Set new lidx for DEF & handle 2-addr instructions
1345 if( n1->is_Mach() && ((twoidx = n1->as_Mach()->two_adr()) != 0) ) { 1372 if (n1->is_Mach() && ((twoidx = n1->as_Mach()->two_adr()) != 0)) {
1346 assert( Find(n1->in(twoidx)) < maxlrg,"Assigning bad live range index"); 1373 assert(_lrg_map.find(n1->in(twoidx)) < maxlrg,"Assigning bad live range index");
1347 // Union the input and output live ranges 1374 // Union the input and output live ranges
1348 uint lr1 = Find(n1); 1375 uint lr1 = _lrg_map.find(n1);
1349 uint lr2 = Find(n1->in(twoidx)); 1376 uint lr2 = _lrg_map.find(n1->in(twoidx));
1350 if( lr1 < lr2 ) 1377 if (lr1 < lr2) {
1351 Union(n1, n1->in(twoidx)); 1378 Union(n1, n1->in(twoidx));
1352 else if( lr1 > lr2 ) 1379 }
1380 else if (lr1 > lr2) {
1353 Union(n1->in(twoidx), n1); 1381 Union(n1->in(twoidx), n1);
1382 }
1354 } // End if two address 1383 } // End if two address
1355 } // End for all defs 1384 } // End for all defs
1356 // DEBUG 1385 // DEBUG
1357 #ifdef ASSERT 1386 #ifdef ASSERT
1358 // Validate all live range index assignments 1387 // Validate all live range index assignments
1359 for( bidx = 0; bidx < _cfg._num_blocks; bidx++ ) { 1388 for (bidx = 0; bidx < _cfg._num_blocks; bidx++) {
1360 b = _cfg._blocks[bidx]; 1389 b = _cfg._blocks[bidx];
1361 for( insidx = 0; insidx <= b->end_idx(); insidx++ ) { 1390 for (insidx = 0; insidx <= b->end_idx(); insidx++) {
1362 Node *n = b->_nodes[insidx]; 1391 Node *n = b->_nodes[insidx];
1363 uint defidx = Find(n); 1392 uint defidx = _lrg_map.find(n);
1364 assert(defidx < _maxlrg,"Bad live range index in Split"); 1393 assert(defidx < _lrg_map.max_lrg_id(), "Bad live range index in Split");
1365 assert(defidx < maxlrg,"Bad live range index in Split"); 1394 assert(defidx < maxlrg,"Bad live range index in Split");
1366 } 1395 }
1367 } 1396 }
1368 // Issue a warning if splitting made no progress 1397 // Issue a warning if splitting made no progress
1369 int noprogress = 0; 1398 int noprogress = 0;
1370 for( slidx = 0; slidx < spill_cnt; slidx++ ) { 1399 for (slidx = 0; slidx < spill_cnt; slidx++) {
1371 if( PrintOpto && WizardMode && splits.at(slidx) == 0 ) { 1400 if (PrintOpto && WizardMode && splits.at(slidx) == 0) {
1372 tty->print_cr("Failed to split live range %d", lidxs.at(slidx)); 1401 tty->print_cr("Failed to split live range %d", lidxs.at(slidx));
1373 //BREAKPOINT; 1402 //BREAKPOINT;
1374 } 1403 }
1375 else { 1404 else {
1376 noprogress++; 1405 noprogress++;