comparison src/cpu/sparc/vm/sparc.ad @ 9154:886d1fd67dc3

6443505: Ideal() function for CmpLTMask Summary: Repair wrong code generation, added new matching rule Reviewed-by: kvn, twisti
author drchase
date Fri, 12 Apr 2013 19:14:47 -0700
parents 65c8342f726a
children e10e43e58e92
comparison
equal deleted inserted replaced
9153:bc63dd2539a4 9154:886d1fd67dc3
1 // 1 //
2 // Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved. 2 // Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved.
3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 // 4 //
5 // This code is free software; you can redistribute it and/or modify it 5 // This code is free software; you can redistribute it and/or modify it
6 // under the terms of the GNU General Public License version 2 only, as 6 // under the terms of the GNU General Public License version 2 only, as
7 // published by the Free Software Foundation. 7 // published by the Free Software Foundation.
8221 ins_cost(DEFAULT_COST*3); 8221 ins_cost(DEFAULT_COST*3);
8222 8222
8223 format %{ "SUBcc $p,$q,$p\t! p' = p-q\n\t" 8223 format %{ "SUBcc $p,$q,$p\t! p' = p-q\n\t"
8224 "ADD $p,$y,$tmp\t! g3=p-q+y\n\t" 8224 "ADD $p,$y,$tmp\t! g3=p-q+y\n\t"
8225 "MOVlt $tmp,$p\t! p' < 0 ? p'+y : p'" %} 8225 "MOVlt $tmp,$p\t! p' < 0 ? p'+y : p'" %}
8226 ins_encode( enc_cadd_cmpLTMask(p, q, y, tmp) ); 8226 ins_encode(enc_cadd_cmpLTMask(p, q, y, tmp));
8227 ins_pipe( cadd_cmpltmask ); 8227 ins_pipe(cadd_cmpltmask);
8228 %} 8228 %}
8229 8229
8230 instruct and_cmpLTMask(iRegI p, iRegI q, iRegI y, flagsReg ccr) %{
8231 match(Set p (AndI (CmpLTMask p q) y));
8232 effect(KILL ccr);
8233 ins_cost(DEFAULT_COST*3);
8234
8235 format %{ "CMP $p,$q\n\t"
8236 "MOV $y,$p\n\t"
8237 "MOVge G0,$p" %}
8238 ins_encode %{
8239 __ cmp($p$$Register, $q$$Register);
8240 __ mov($y$$Register, $p$$Register);
8241 __ movcc(Assembler::greaterEqual, false, Assembler::icc, G0, $p$$Register);
8242 %}
8243 ins_pipe(ialu_reg_reg_ialu);
8244 %}
8230 8245
8231 //----------------------------------------------------------------- 8246 //-----------------------------------------------------------------
8232 // Direct raw moves between float and general registers using VIS3. 8247 // Direct raw moves between float and general registers using VIS3.
8233 8248
8234 // ins_pipe(faddF_reg); 8249 // ins_pipe(faddF_reg);