Mercurial > hg > truffle
comparison src/cpu/sparc/vm/vm_version_sparc.cpp @ 6179:8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
Summary: Increase vector size up to 256-bits for YMM AVX registers on x86.
Reviewed-by: never, twisti, roland
author | kvn |
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date | Fri, 15 Jun 2012 01:25:19 -0700 |
parents | e3b0dcc327b9 |
children | f99a36499b8c |
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6146:eba1d5bce9e8 | 6179:8c92982cbbc4 |
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1 /* | 1 /* |
2 * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. | 2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | 4 * |
5 * This code is free software; you can redistribute it and/or modify it | 5 * This code is free software; you can redistribute it and/or modify it |
6 * under the terms of the GNU General Public License version 2 only, as | 6 * under the terms of the GNU General Public License version 2 only, as |
7 * published by the Free Software Foundation. | 7 * published by the Free Software Foundation. |
214 FLAG_SET_DEFAULT(UseRDPCForConstantTableBase, true); | 214 FLAG_SET_DEFAULT(UseRDPCForConstantTableBase, true); |
215 } | 215 } |
216 | 216 |
217 // Currently not supported anywhere. | 217 // Currently not supported anywhere. |
218 FLAG_SET_DEFAULT(UseFPUForSpilling, false); | 218 FLAG_SET_DEFAULT(UseFPUForSpilling, false); |
219 | |
220 MaxVectorSize = 8; | |
219 | 221 |
220 assert((InteriorEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); | 222 assert((InteriorEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); |
221 #endif | 223 #endif |
222 | 224 |
223 assert((CodeEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); | 225 assert((CodeEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); |